swtch32.S revision 266004
1/* $FreeBSD: stable/10/sys/powerpc/powerpc/swtch32.S 266004 2014-05-14 04:42:38Z ian $ */ 2/* $NetBSD: locore.S,v 1.24 2000/05/31 05:09:17 thorpej Exp $ */ 3 4/*- 5 * Copyright (C) 2001 Benno Rice 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 22 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 23 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 25 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 26 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27*/ 28/*- 29 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 30 * Copyright (C) 1995, 1996 TooLs GmbH. 31 * All rights reserved. 32 * 33 * Redistribution and use in source and binary forms, with or without 34 * modification, are permitted provided that the following conditions 35 * are met: 36 * 1. Redistributions of source code must retain the above copyright 37 * notice, this list of conditions and the following disclaimer. 38 * 2. Redistributions in binary form must reproduce the above copyright 39 * notice, this list of conditions and the following disclaimer in the 40 * documentation and/or other materials provided with the distribution. 41 * 3. All advertising materials mentioning features or use of this software 42 * must display the following acknowledgement: 43 * This product includes software developed by TooLs GmbH. 44 * 4. The name of TooLs GmbH may not be used to endorse or promote products 45 * derived from this software without specific prior written permission. 46 * 47 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 50 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 51 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 52 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 53 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 54 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 55 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 56 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 57 */ 58 59#include "assym.s" 60#include "opt_sched.h" 61 62#include <sys/syscall.h> 63 64#include <machine/trap.h> 65#include <machine/param.h> 66#include <machine/asm.h> 67#include <machine/spr.h> 68 69/* 70 * void cpu_throw(struct thread *old, struct thread *new) 71 */ 72ENTRY(cpu_throw) 73 mr %r2, %r4 74 b cpu_switchin 75 76/* 77 * void cpu_switch(struct thread *old, 78 * struct thread *new, 79 * struct mutex *mtx); 80 * 81 * Switch to a new thread saving the current state in the old thread. 82 */ 83ENTRY(cpu_switch) 84 lwz %r6,TD_PCB(%r3) /* Get the old thread's PCB ptr */ 85 stmw %r12,PCB_CONTEXT(%r6) /* Save the non-volatile GP regs. 86 These can now be used for scratch */ 87 88 mfcr %r16 /* Save the condition register */ 89 stw %r16,PCB_CR(%r6) 90 mflr %r16 /* Save the link register */ 91 stw %r16,PCB_LR(%r6) 92#ifdef BOOKE 93 mfspr %r16,SPR_DBCR0 94 stw %r16,PCB_BOOKE_DBCR0(%r6) 95#endif 96 stw %r1,PCB_SP(%r6) /* Save the stack pointer */ 97 98 mr %r14,%r3 /* Copy the old thread ptr... */ 99 mr %r2,%r4 /* and the new thread ptr in curthread */ 100 mr %r16,%r5 /* and the new lock */ 101 mr %r17,%r6 /* and the PCB */ 102 103 lwz %r7,PCB_FLAGS(%r17) 104 /* Save FPU context if needed */ 105 andi. %r7, %r7, PCB_FPU 106 beq .L1 107 bl save_fpu 108 109.L1: 110 mr %r3,%r14 /* restore old thread ptr */ 111 lwz %r7,PCB_FLAGS(%r17) 112 /* Save Altivec context if needed */ 113 andi. %r7, %r7, PCB_VEC 114 beq .L2 115 bl save_vec 116 117.L2: 118 mr %r3,%r14 /* restore old thread ptr */ 119 bl pmap_deactivate /* Deactivate the current pmap */ 120 121 sync /* Make sure all of that finished */ 122 stw %r16,TD_LOCK(%r14) /* ULE: update old thread's lock */ 123 124cpu_switchin: 125#if defined(SMP) && defined(SCHED_ULE) 126 /* Wait for the new thread to become unblocked */ 127 lis %r6,blocked_lock@ha 128 addi %r6,%r6,blocked_lock@l 129blocked_loop: 130 lwz %r7,TD_LOCK(%r2) 131 cmpw %r6,%r7 132 beq- blocked_loop 133 isync 134#endif 135 136 mfsprg %r7,0 /* Get the pcpu pointer */ 137 stw %r2,PC_CURTHREAD(%r7) /* Store new current thread */ 138 lwz %r17,TD_PCB(%r2) /* Store new current PCB */ 139 stw %r17,PC_CURPCB(%r7) 140 141 mr %r3,%r2 /* Get new thread ptr */ 142 bl pmap_activate /* Activate the new address space */ 143 144 lwz %r6, PCB_FLAGS(%r17) 145 /* Restore FPU context if needed */ 146 andi. %r6, %r6, PCB_FPU 147 beq .L3 148 mr %r3,%r2 /* Pass curthread to enable_fpu */ 149 bl enable_fpu 150 151.L3: 152 lwz %r6, PCB_FLAGS(%r17) 153 /* Restore Altivec context if needed */ 154 andi. %r6, %r6, PCB_VEC 155 beq .L4 156 mr %r3,%r2 /* Pass curthread to enable_vec */ 157 bl enable_vec 158 159.L4: 160 /* thread to restore is in r3 */ 161 mr %r3,%r17 /* Recover PCB ptr */ 162 lmw %r12,PCB_CONTEXT(%r3) /* Load the non-volatile GP regs */ 163 lwz %r5,PCB_CR(%r3) /* Load the condition register */ 164 mtcr %r5 165 lwz %r5,PCB_LR(%r3) /* Load the link register */ 166 mtlr %r5 167#ifdef AIM 168 lwz %r5,PCB_AIM_USR_VSID(%r3) /* Load the USER_SR segment reg */ 169 isync 170 mtsr USER_SR,%r5 171 isync 172#endif 173#ifdef BOOKE 174 lwz %r5,PCB_BOOKE_DBCR0(%r3) 175 mtspr SPR_DBCR0,%r5 176#endif 177 lwz %r1,PCB_SP(%r3) /* Load the stack pointer */ 178 /* 179 * Perform a dummy stwcx. to clear any reservations we may have 180 * inherited from the previous thread. It doesn't matter if the 181 * stwcx succeeds or not. pcb_context[0] can be clobbered. 182 */ 183 stwcx. %r1, 0, %r3 184 blr 185 186/* 187 * savectx(pcb) 188 * Update pcb, saving current processor state 189 */ 190ENTRY(savectx) 191 stmw %r12,PCB_CONTEXT(%r3) /* Save the non-volatile GP regs */ 192 mfcr %r4 /* Save the condition register */ 193 stw %r4,PCB_CR(%r3) 194 blr 195 196/* 197 * fork_trampoline() 198 * Set up the return from cpu_fork() 199 */ 200ENTRY(fork_trampoline) 201 lwz %r3,CF_FUNC(%r1) 202 lwz %r4,CF_ARG0(%r1) 203 lwz %r5,CF_ARG1(%r1) 204 bl fork_exit 205 addi %r1,%r1,CF_SIZE-FSP /* Allow 8 bytes in front of 206 trapframe to simulate FRAME_SETUP 207 does when allocating space for 208 a frame pointer/saved LR */ 209 b trapexit 210