tlb.h revision 265996 
1/*-
2 * Copyright (C) 2006-2012 Semihalf.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 * 3. The name of the author may not be used to endorse or promote products
14 *    derived from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
19 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
21 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
22 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
23 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
24 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
25 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 *
27 * $FreeBSD: stable/10/sys/powerpc/include/tlb.h 265996 2014-05-14 00:51:26Z ian $
28 */
29
30#ifndef	_MACHINE_TLB_H_
31#define	_MACHINE_TLB_H_
32
33#if defined(BOOKE_E500)
34
35/*  PowerPC E500 MAS registers */
36#define MAS0_TLBSEL(x)		((x << 28) & 0x10000000)
37#define MAS0_ESEL(x)		((x << 16) & 0x000F0000)
38
39#define MAS0_TLBSEL1		0x10000000
40#define MAS0_TLBSEL0		0x00000000
41#define MAS0_ESEL_TLB1MASK	0x000F0000
42#define MAS0_ESEL_TLB0MASK	0x00030000
43#define MAS0_ESEL_SHIFT		16
44#define MAS0_NV_MASK		0x00000003
45#define MAS0_NV_SHIFT		0
46
47#define MAS1_VALID		0x80000000
48#define MAS1_IPROT		0x40000000
49#define MAS1_TID_MASK		0x00FF0000
50#define MAS1_TID_SHIFT		16
51#define MAS1_TS_MASK		0x00001000
52#define MAS1_TS_SHIFT		12
53#define MAS1_TSIZE_MASK		0x00000F00
54#define MAS1_TSIZE_SHIFT	8
55
56#define	TLB_SIZE_4K		1
57#define	TLB_SIZE_16K		2
58#define	TLB_SIZE_64K		3
59#define	TLB_SIZE_256K		4
60#define	TLB_SIZE_1M		5
61#define	TLB_SIZE_4M		6
62#define	TLB_SIZE_16M		7
63#define	TLB_SIZE_64M		8
64#define	TLB_SIZE_256M		9
65#define	TLB_SIZE_1G		10
66#define	TLB_SIZE_4G		11
67
68#define	MAS2_EPN_MASK		0xFFFFF000
69#define	MAS2_EPN_SHIFT		12
70#define	MAS2_X0			0x00000040
71#define	MAS2_X1			0x00000020
72#define	MAS2_W			0x00000010
73#define	MAS2_I			0x00000008
74#define	MAS2_M			0x00000004
75#define	MAS2_G			0x00000002
76#define	MAS2_E			0x00000001
77
78#define	MAS3_RPN		0xFFFFF000
79#define	MAS3_RPN_SHIFT		12
80#define	MAS3_U0			0x00000200
81#define	MAS3_U1			0x00000100
82#define	MAS3_U2			0x00000080
83#define	MAS3_U3			0x00000040
84#define	MAS3_UX			0x00000020
85#define	MAS3_SX			0x00000010
86#define	MAS3_UW			0x00000008
87#define	MAS3_SW			0x00000004
88#define	MAS3_UR			0x00000002
89#define	MAS3_SR			0x00000001
90
91#define MAS4_TLBSELD1		0x10000000
92#define MAS4_TLBSELD0		0x00000000
93#define MAS4_TIDSELD_MASK	0x00030000
94#define MAS4_TIDSELD_SHIFT	16
95#define MAS4_TSIZED_MASK	0x00000F00
96#define MAS4_TSIZED_SHIFT	8
97#define MAS4_X0D		0x00000040
98#define MAS4_X1D		0x00000020
99#define MAS4_WD			0x00000010
100#define MAS4_ID			0x00000008
101#define MAS4_MD			0x00000004
102#define MAS4_GD			0x00000002
103#define MAS4_ED			0x00000001
104
105#define MAS6_SPID0_MASK		0x00FF0000
106#define MAS6_SPID0_SHIFT	16
107#define MAS6_SAS		0x00000001
108
109#define MAS1_GETTID(mas1)	(((mas1) & MAS1_TID_MASK) >> MAS1_TID_SHIFT)
110
111#define MAS2_TLB0_ENTRY_IDX_MASK	0x0007f000
112#define MAS2_TLB0_ENTRY_IDX_SHIFT	12
113
114/*
115 * Maximum number of TLB1 entries used for a permanent mapping of kernel
116 * region (kernel image plus statically allocated data).
117 */
118#define KERNEL_REGION_MAX_TLB_ENTRIES   4
119
120#define _TLB_ENTRY_IO	(MAS2_I | MAS2_G)
121#ifdef SMP
122#define _TLB_ENTRY_MEM	(MAS2_M)
123#else
124#define _TLB_ENTRY_MEM	(0)
125#endif
126
127#if !defined(LOCORE)
128typedef struct tlb_entry {
129	vm_paddr_t phys;
130	vm_offset_t virt;
131	vm_size_t size;
132	uint32_t mas1;
133	uint32_t mas2;
134	uint32_t mas3;
135} tlb_entry_t;
136
137void tlb0_print_tlbentries(void);
138
139void tlb1_inval_entry(unsigned int);
140void tlb1_init(void);
141void tlb1_print_entries(void);
142void tlb1_print_tlbentries(void);
143#endif /* !LOCORE */
144
145#elif defined(BOOKE_PPC4XX)
146
147/* TLB Words */
148#define	TLB_PAGEID		0
149#define	TLB_XLAT		1
150#define	TLB_ATTRIB		2
151
152/* Page identification fields */
153#define	TLB_EPN_MASK		(0xFFFFFC00 >> 0)
154#define	TLB_VALID		(0x80000000 >> 22)
155#define	TLB_TS			(0x80000000 >> 23)
156#define	TLB_SIZE_1K		(0x00000000 >> 24)
157#define	TLB_SIZE_MASK		(0xF0000000 >> 24)
158
159/* Translation fields */
160#define	TLB_RPN_MASK		(0xFFFFFC00 >> 0)
161#define	TLB_ERPN_MASK		(0xF0000000 >> 28)
162
163/* Storage attribute and access control fields */
164#define	TLB_WL1			(0x80000000 >> 11)
165#define	TLB_IL1I		(0x80000000 >> 12)
166#define	TLB_IL1D		(0x80000000 >> 13)
167#define	TLB_IL2I		(0x80000000 >> 14)
168#define	TLB_IL2D		(0x80000000 >> 15)
169#define	TLB_U0			(0x80000000 >> 16)
170#define	TLB_U1			(0x80000000 >> 17)
171#define	TLB_U2			(0x80000000 >> 18)
172#define	TLB_U3			(0x80000000 >> 19)
173#define	TLB_W			(0x80000000 >> 20)
174#define	TLB_I			(0x80000000 >> 21)
175#define	TLB_M			(0x80000000 >> 22)
176#define	TLB_G			(0x80000000 >> 23)
177#define	TLB_E			(0x80000000 >> 24)
178#define	TLB_UX			(0x80000000 >> 26)
179#define	TLB_UW			(0x80000000 >> 27)
180#define	TLB_UR			(0x80000000 >> 28)
181#define	TLB_SX			(0x80000000 >> 29)
182#define	TLB_SW			(0x80000000 >> 30)
183#define	TLB_SR			(0x80000000 >> 31)
184#define	TLB_SIZE		64
185
186#define	TLB_SIZE_4K		(0x10000000 >> 24)
187#define	TLB_SIZE_16K		(0x20000000 >> 24)
188#define	TLB_SIZE_64K		(0x30000000 >> 24)
189#define	TLB_SIZE_256K		(0x40000000 >> 24)
190#define	TLB_SIZE_1M		(0x50000000 >> 24)
191#define	TLB_SIZE_16M		(0x70000000 >> 24)
192#define	TLB_SIZE_256M		(0x90000000 >> 24)
193#define	TLB_SIZE_1G		(0xA0000000 >> 24)
194
195#endif /* BOOKE_E500 */
196
197#define TID_KERNEL	0	/* TLB TID to use for kernel (shared) translations */
198#define TID_KRESERVED	1	/* Number of TIDs reserved for kernel */
199#define TID_URESERVED	0	/* Number of TIDs reserved for user */
200#define TID_MIN		(TID_KRESERVED + TID_URESERVED)
201#define TID_MAX		255
202#define TID_NONE	-1
203
204#define TLB_UNLOCKED	0
205
206#if !defined(LOCORE)
207
208typedef int tlbtid_t;
209
210struct pmap;
211
212void tlb_lock(uint32_t *);
213void tlb_unlock(uint32_t *);
214
215#endif /* !LOCORE */
216
217#endif	/* _MACHINE_TLB_H_ */
218