pci.h revision 332922
1/*- 2 * Copyright (c) 2010 Isilon Systems, Inc. 3 * Copyright (c) 2010 iX Systems, Inc. 4 * Copyright (c) 2010 Panasas, Inc. 5 * Copyright (c) 2013-2016 Mellanox Technologies, Ltd. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice unmodified, this list of conditions, and the following 13 * disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30#ifndef _LINUX_PCI_H_ 31#define _LINUX_PCI_H_ 32 33#define CONFIG_PCI_MSI 34 35#include <linux/types.h> 36 37#include <sys/param.h> 38#include <sys/bus.h> 39#include <sys/pciio.h> 40#include <sys/rman.h> 41#include <dev/pci/pcivar.h> 42#include <dev/pci/pcireg.h> 43#include <dev/pci/pci_private.h> 44 45#include <machine/resource.h> 46 47#include <linux/list.h> 48#include <linux/dmapool.h> 49#include <linux/dma-mapping.h> 50#include <linux/compiler.h> 51#include <linux/errno.h> 52#include <asm/atomic.h> 53#include <linux/device.h> 54 55struct pci_device_id { 56 uint32_t vendor; 57 uint32_t device; 58 uint32_t subvendor; 59 uint32_t subdevice; 60 uint32_t class_mask; 61 uintptr_t driver_data; 62}; 63 64#define MODULE_DEVICE_TABLE(bus, table) 65#define PCI_ANY_ID (-1) 66#define PCI_VENDOR_ID_MELLANOX 0x15b3 67#define PCI_VENDOR_ID_TOPSPIN 0x1867 68#define PCI_DEVICE_ID_MELLANOX_TAVOR 0x5a44 69#define PCI_DEVICE_ID_MELLANOX_TAVOR_BRIDGE 0x5a46 70#define PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT 0x6278 71#define PCI_DEVICE_ID_MELLANOX_ARBEL 0x6282 72#define PCI_DEVICE_ID_MELLANOX_SINAI_OLD 0x5e8c 73#define PCI_DEVICE_ID_MELLANOX_SINAI 0x6274 74 75#define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07)) 76#define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f) 77#define PCI_FUNC(devfn) ((devfn) & 0x07) 78 79#define PCI_VDEVICE(_vendor, _device) \ 80 .vendor = PCI_VENDOR_ID_##_vendor, .device = (_device), \ 81 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID 82#define PCI_DEVICE(_vendor, _device) \ 83 .vendor = (_vendor), .device = (_device), \ 84 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID 85 86#define to_pci_dev(n) container_of(n, struct pci_dev, dev) 87 88#define PCI_VENDOR_ID PCIR_DEVVENDOR 89#define PCI_COMMAND PCIR_COMMAND 90#define PCI_EXP_DEVCTL PCIER_DEVICE_CTL /* Device Control */ 91#define PCI_EXP_LNKCTL PCIER_LINK_CTL /* Link Control */ 92#define PCI_EXP_FLAGS_TYPE PCIEM_FLAGS_TYPE /* Device/Port type */ 93#define PCI_EXP_DEVCAP PCIER_DEVICE_CAP /* Device capabilities */ 94#define PCI_EXP_DEVSTA PCIER_DEVICE_STA /* Device Status */ 95#define PCI_EXP_LNKCAP PCIER_LINK_CAP /* Link Capabilities */ 96#define PCI_EXP_LNKSTA PCIER_LINK_STA /* Link Status */ 97#define PCI_EXP_SLTCAP PCIER_SLOT_CAP /* Slot Capabilities */ 98#define PCI_EXP_SLTCTL PCIER_SLOT_CTL /* Slot Control */ 99#define PCI_EXP_SLTSTA PCIER_SLOT_STA /* Slot Status */ 100#define PCI_EXP_RTCTL PCIER_ROOT_CTL /* Root Control */ 101#define PCI_EXP_RTCAP PCIER_ROOT_CAP /* Root Capabilities */ 102#define PCI_EXP_RTSTA PCIER_ROOT_STA /* Root Status */ 103#define PCI_EXP_DEVCAP2 PCIER_DEVICE_CAP2 /* Device Capabilities 2 */ 104#define PCI_EXP_DEVCTL2 PCIER_DEVICE_CTL2 /* Device Control 2 */ 105#define PCI_EXP_LNKCAP2 PCIER_LINK_CAP2 /* Link Capabilities 2 */ 106#define PCI_EXP_LNKCTL2 PCIER_LINK_CTL2 /* Link Control 2 */ 107#define PCI_EXP_LNKSTA2 PCIER_LINK_STA2 /* Link Status 2 */ 108#define PCI_EXP_FLAGS PCIER_FLAGS /* Capabilities register */ 109#define PCI_EXP_FLAGS_VERS PCIEM_FLAGS_VERSION /* Capability version */ 110#define PCI_EXP_TYPE_ROOT_PORT PCIEM_TYPE_ROOT_PORT /* Root Port */ 111#define PCI_EXP_TYPE_ENDPOINT PCIEM_TYPE_ENDPOINT /* Express Endpoint */ 112#define PCI_EXP_TYPE_LEG_END PCIEM_TYPE_LEGACY_ENDPOINT /* Legacy Endpoint */ 113#define PCI_EXP_TYPE_DOWNSTREAM PCIEM_TYPE_DOWNSTREAM_PORT /* Downstream Port */ 114#define PCI_EXP_FLAGS_SLOT PCIEM_FLAGS_SLOT /* Slot implemented */ 115#define PCI_EXP_TYPE_RC_EC PCIEM_TYPE_ROOT_EC /* Root Complex Event Collector */ 116 117 118#define IORESOURCE_MEM (1 << SYS_RES_MEMORY) 119#define IORESOURCE_IO (1 << SYS_RES_IOPORT) 120#define IORESOURCE_IRQ (1 << SYS_RES_IRQ) 121 122struct pci_dev; 123 124 125struct pci_driver { 126 struct list_head links; 127 char *name; 128 const struct pci_device_id *id_table; 129 int (*probe)(struct pci_dev *dev, const struct pci_device_id *id); 130 void (*remove)(struct pci_dev *dev); 131 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */ 132 int (*resume) (struct pci_dev *dev); /* Device woken up */ 133 driver_t driver; 134 devclass_t bsdclass; 135 const struct pci_error_handlers *err_handler; 136}; 137 138extern struct list_head pci_drivers; 139extern struct list_head pci_devices; 140extern spinlock_t pci_lock; 141 142#define __devexit_p(x) x 143 144struct pci_dev { 145 struct device dev; 146 struct list_head links; 147 struct pci_driver *pdrv; 148 uint64_t dma_mask; 149 uint16_t device; 150 uint16_t vendor; 151 unsigned int irq; 152 unsigned int devfn; 153 u8 revision; 154}; 155 156static inline struct resource_list_entry * 157_pci_get_rle(struct pci_dev *pdev, int type, int rid) 158{ 159 struct pci_devinfo *dinfo; 160 struct resource_list *rl; 161 162 dinfo = device_get_ivars(pdev->dev.bsddev); 163 rl = &dinfo->resources; 164 return resource_list_find(rl, type, rid); 165} 166 167static inline struct resource_list_entry * 168_pci_get_bar(struct pci_dev *pdev, int bar) 169{ 170 struct resource_list_entry *rle; 171 172 bar = PCIR_BAR(bar); 173 if ((rle = _pci_get_rle(pdev, SYS_RES_MEMORY, bar)) == NULL) 174 rle = _pci_get_rle(pdev, SYS_RES_IOPORT, bar); 175 return (rle); 176} 177 178static inline struct device * 179_pci_find_irq_dev(unsigned int irq) 180{ 181 struct pci_dev *pdev; 182 183 spin_lock(&pci_lock); 184 list_for_each_entry(pdev, &pci_devices, links) { 185 if (irq == pdev->dev.irq) 186 break; 187 if (irq >= pdev->dev.msix && irq < pdev->dev.msix_max) 188 break; 189 } 190 spin_unlock(&pci_lock); 191 if (pdev) 192 return &pdev->dev; 193 return (NULL); 194} 195 196static inline unsigned long 197pci_resource_start(struct pci_dev *pdev, int bar) 198{ 199 struct resource_list_entry *rle; 200 201 if ((rle = _pci_get_bar(pdev, bar)) == NULL) 202 return (0); 203 return rle->start; 204} 205 206static inline unsigned long 207pci_resource_len(struct pci_dev *pdev, int bar) 208{ 209 struct resource_list_entry *rle; 210 211 if ((rle = _pci_get_bar(pdev, bar)) == NULL) 212 return (0); 213 return rle->count; 214} 215 216static inline int 217pci_resource_type(struct pci_dev *pdev, int bar) 218{ 219 struct pci_map *pm; 220 221 pm = pci_find_bar(pdev->dev.bsddev, PCIR_BAR(bar)); 222 if (!pm) 223 return (-1); 224 225 if (PCI_BAR_IO(pm->pm_value)) 226 return (SYS_RES_IOPORT); 227 else 228 return (SYS_RES_MEMORY); 229} 230 231/* 232 * All drivers just seem to want to inspect the type not flags. 233 */ 234static inline int 235pci_resource_flags(struct pci_dev *pdev, int bar) 236{ 237 int type; 238 239 type = pci_resource_type(pdev, bar); 240 if (type < 0) 241 return (0); 242 return (1 << type); 243} 244 245static inline const char * 246pci_name(struct pci_dev *d) 247{ 248 249 return device_get_desc(d->dev.bsddev); 250} 251 252static inline void * 253pci_get_drvdata(struct pci_dev *pdev) 254{ 255 256 return dev_get_drvdata(&pdev->dev); 257} 258 259static inline void 260pci_set_drvdata(struct pci_dev *pdev, void *data) 261{ 262 263 dev_set_drvdata(&pdev->dev, data); 264} 265 266static inline int 267pci_enable_device(struct pci_dev *pdev) 268{ 269 270 pci_enable_io(pdev->dev.bsddev, SYS_RES_IOPORT); 271 pci_enable_io(pdev->dev.bsddev, SYS_RES_MEMORY); 272 return (0); 273} 274 275static inline void 276pci_disable_device(struct pci_dev *pdev) 277{ 278} 279 280static inline int 281pci_set_master(struct pci_dev *pdev) 282{ 283 284 pci_enable_busmaster(pdev->dev.bsddev); 285 return (0); 286} 287 288static inline int 289pci_clear_master(struct pci_dev *pdev) 290{ 291 292 pci_disable_busmaster(pdev->dev.bsddev); 293 return (0); 294} 295 296static inline int 297pci_request_region(struct pci_dev *pdev, int bar, const char *res_name) 298{ 299 int rid; 300 int type; 301 302 type = pci_resource_type(pdev, bar); 303 if (type < 0) 304 return (-ENODEV); 305 rid = PCIR_BAR(bar); 306 if (bus_alloc_resource_any(pdev->dev.bsddev, type, &rid, 307 RF_ACTIVE) == NULL) 308 return (-EINVAL); 309 return (0); 310} 311 312static inline void 313pci_release_region(struct pci_dev *pdev, int bar) 314{ 315 struct resource_list_entry *rle; 316 317 if ((rle = _pci_get_bar(pdev, bar)) == NULL) 318 return; 319 bus_release_resource(pdev->dev.bsddev, rle->type, rle->rid, rle->res); 320} 321 322static inline void 323pci_release_regions(struct pci_dev *pdev) 324{ 325 int i; 326 327 for (i = 0; i <= PCIR_MAX_BAR_0; i++) 328 pci_release_region(pdev, i); 329} 330 331static inline int 332pci_request_regions(struct pci_dev *pdev, const char *res_name) 333{ 334 int error; 335 int i; 336 337 for (i = 0; i <= PCIR_MAX_BAR_0; i++) { 338 error = pci_request_region(pdev, i, res_name); 339 if (error && error != -ENODEV) { 340 pci_release_regions(pdev); 341 return (error); 342 } 343 } 344 return (0); 345} 346 347static inline void 348pci_disable_msix(struct pci_dev *pdev) 349{ 350 351 pci_release_msi(pdev->dev.bsddev); 352 353 /* 354 * The MSIX IRQ numbers associated with this PCI device are no 355 * longer valid and might be re-assigned. Make sure 356 * linux_pci_find_irq_dev() does no longer see them by 357 * resetting their references to zero: 358 */ 359 pdev->dev.msix = 0; 360 pdev->dev.msix_max = 0; 361} 362 363#define PCI_CAP_ID_EXP PCIY_EXPRESS 364#define PCI_CAP_ID_PCIX PCIY_PCIX 365 366 367static inline int 368pci_find_capability(struct pci_dev *pdev, int capid) 369{ 370 int reg; 371 372 if (pci_find_cap(pdev->dev.bsddev, capid, ®)) 373 return (0); 374 return (reg); 375} 376 377 378 379 380/** 381 * pci_pcie_cap - get the saved PCIe capability offset 382 * @dev: PCI device 383 * 384 * PCIe capability offset is calculated at PCI device initialization 385 * time and saved in the data structure. This function returns saved 386 * PCIe capability offset. Using this instead of pci_find_capability() 387 * reduces unnecessary search in the PCI configuration space. If you 388 * need to calculate PCIe capability offset from raw device for some 389 * reasons, please use pci_find_capability() instead. 390 */ 391static inline int pci_pcie_cap(struct pci_dev *dev) 392{ 393 return pci_find_capability(dev, PCI_CAP_ID_EXP); 394} 395 396 397static inline int 398pci_read_config_byte(struct pci_dev *pdev, int where, u8 *val) 399{ 400 401 *val = (u8)pci_read_config(pdev->dev.bsddev, where, 1); 402 return (0); 403} 404 405static inline int 406pci_read_config_word(struct pci_dev *pdev, int where, u16 *val) 407{ 408 409 *val = (u16)pci_read_config(pdev->dev.bsddev, where, 2); 410 return (0); 411} 412 413static inline int 414pci_read_config_dword(struct pci_dev *pdev, int where, u32 *val) 415{ 416 417 *val = (u32)pci_read_config(pdev->dev.bsddev, where, 4); 418 return (0); 419} 420 421static inline int 422pci_write_config_byte(struct pci_dev *pdev, int where, u8 val) 423{ 424 425 pci_write_config(pdev->dev.bsddev, where, val, 1); 426 return (0); 427} 428 429static inline int 430pci_write_config_word(struct pci_dev *pdev, int where, u16 val) 431{ 432 433 pci_write_config(pdev->dev.bsddev, where, val, 2); 434 return (0); 435} 436 437static inline int 438pci_write_config_dword(struct pci_dev *pdev, int where, u32 val) 439{ 440 441 pci_write_config(pdev->dev.bsddev, where, val, 4); 442 return (0); 443} 444 445static struct pci_driver * 446linux_pci_find(device_t dev, const struct pci_device_id **idp) 447{ 448 const struct pci_device_id *id; 449 struct pci_driver *pdrv; 450 uint16_t vendor; 451 uint16_t device; 452 453 vendor = pci_get_vendor(dev); 454 device = pci_get_device(dev); 455 456 spin_lock(&pci_lock); 457 list_for_each_entry(pdrv, &pci_drivers, links) { 458 for (id = pdrv->id_table; id->vendor != 0; id++) { 459 if (vendor == id->vendor && device == id->device) { 460 *idp = id; 461 spin_unlock(&pci_lock); 462 return (pdrv); 463 } 464 } 465 } 466 spin_unlock(&pci_lock); 467 return (NULL); 468} 469 470static inline int 471linux_pci_probe(device_t dev) 472{ 473 const struct pci_device_id *id; 474 struct pci_driver *pdrv; 475 476 if ((pdrv = linux_pci_find(dev, &id)) == NULL) 477 return (ENXIO); 478 if (device_get_driver(dev) != &pdrv->driver) 479 return (ENXIO); 480 device_set_desc(dev, pdrv->name); 481 return (0); 482} 483 484static inline int 485linux_pci_attach(device_t dev) 486{ 487 struct resource_list_entry *rle; 488 struct pci_dev *pdev; 489 struct pci_driver *pdrv; 490 const struct pci_device_id *id; 491 int error; 492 493 pdrv = linux_pci_find(dev, &id); 494 pdev = device_get_softc(dev); 495 pdev->dev.parent = &linux_rootdev; 496 pdev->dev.bsddev = dev; 497 INIT_LIST_HEAD(&pdev->dev.irqents); 498 pdev->device = id->device; 499 pdev->vendor = id->vendor; 500 pdev->dev.dma_mask = &pdev->dma_mask; 501 pdev->pdrv = pdrv; 502 kobject_init(&pdev->dev.kobj, &dev_ktype); 503 kobject_set_name(&pdev->dev.kobj, device_get_nameunit(dev)); 504 kobject_add(&pdev->dev.kobj, &linux_rootdev.kobj, 505 kobject_name(&pdev->dev.kobj)); 506 rle = _pci_get_rle(pdev, SYS_RES_IRQ, 0); 507 if (rle) 508 pdev->dev.irq = rle->start; 509 else 510 pdev->dev.irq = 0; 511 pdev->irq = pdev->dev.irq; 512 mtx_unlock(&Giant); 513 spin_lock(&pci_lock); 514 list_add(&pdev->links, &pci_devices); 515 spin_unlock(&pci_lock); 516 error = pdrv->probe(pdev, id); 517 mtx_lock(&Giant); 518 if (error) { 519 spin_lock(&pci_lock); 520 list_del(&pdev->links); 521 spin_unlock(&pci_lock); 522 put_device(&pdev->dev); 523 return (-error); 524 } 525 return (0); 526} 527 528static inline int 529linux_pci_detach(device_t dev) 530{ 531 struct pci_dev *pdev; 532 533 pdev = device_get_softc(dev); 534 mtx_unlock(&Giant); 535 pdev->pdrv->remove(pdev); 536 mtx_lock(&Giant); 537 spin_lock(&pci_lock); 538 list_del(&pdev->links); 539 spin_unlock(&pci_lock); 540 put_device(&pdev->dev); 541 542 return (0); 543} 544 545static device_method_t pci_methods[] = { 546 DEVMETHOD(device_probe, linux_pci_probe), 547 DEVMETHOD(device_attach, linux_pci_attach), 548 DEVMETHOD(device_detach, linux_pci_detach), 549 {0, 0} 550}; 551 552static inline int 553pci_register_driver(struct pci_driver *pdrv) 554{ 555 devclass_t bus; 556 int error; 557 558 spin_lock(&pci_lock); 559 list_add(&pdrv->links, &pci_drivers); 560 spin_unlock(&pci_lock); 561 bus = devclass_find("pci"); 562 pdrv->driver.name = pdrv->name; 563 pdrv->driver.methods = pci_methods; 564 pdrv->driver.size = sizeof(struct pci_dev); 565 mtx_lock(&Giant); 566 error = devclass_add_driver(bus, &pdrv->driver, BUS_PASS_DEFAULT, 567 &pdrv->bsdclass); 568 mtx_unlock(&Giant); 569 if (error) 570 return (-error); 571 return (0); 572} 573 574static inline void 575pci_unregister_driver(struct pci_driver *pdrv) 576{ 577 devclass_t bus; 578 579 list_del(&pdrv->links); 580 bus = devclass_find("pci"); 581 mtx_lock(&Giant); 582 devclass_delete_driver(bus, &pdrv->driver); 583 mtx_unlock(&Giant); 584} 585 586struct msix_entry { 587 int entry; 588 int vector; 589}; 590 591/* 592 * Enable msix, positive errors indicate actual number of available 593 * vectors. Negative errors are failures. 594 * 595 * NB: define added to prevent this definition of pci_enable_msix from 596 * clashing with the native FreeBSD version. 597 */ 598#define pci_enable_msix linux_pci_enable_msix 599static inline int 600pci_enable_msix(struct pci_dev *pdev, struct msix_entry *entries, int nreq) 601{ 602 struct resource_list_entry *rle; 603 int error; 604 int avail; 605 int i; 606 607 avail = pci_msix_count(pdev->dev.bsddev); 608 if (avail < nreq) { 609 if (avail == 0) 610 return -EINVAL; 611 return avail; 612 } 613 avail = nreq; 614 if ((error = -pci_alloc_msix(pdev->dev.bsddev, &avail)) != 0) 615 return error; 616 /* 617 * Handle case where "pci_alloc_msix()" may allocate less 618 * interrupts than available and return with no error: 619 */ 620 if (avail < nreq) { 621 pci_release_msi(pdev->dev.bsddev); 622 return avail; 623 } 624 rle = _pci_get_rle(pdev, SYS_RES_IRQ, 1); 625 pdev->dev.msix = rle->start; 626 pdev->dev.msix_max = rle->start + avail; 627 for (i = 0; i < nreq; i++) 628 entries[i].vector = pdev->dev.msix + i; 629 return (0); 630} 631 632#define pci_enable_msix_range linux_pci_enable_msix_range 633static inline int 634pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries, 635 int minvec, int maxvec) 636{ 637 int nvec = maxvec; 638 int rc; 639 640 if (maxvec < minvec) 641 return (-ERANGE); 642 643 do { 644 rc = pci_enable_msix(dev, entries, nvec); 645 if (rc < 0) { 646 return (rc); 647 } else if (rc > 0) { 648 if (rc < minvec) 649 return (-ENOSPC); 650 nvec = rc; 651 } 652 } while (rc); 653 return (nvec); 654} 655 656static inline int pci_channel_offline(struct pci_dev *pdev) 657{ 658 return false; 659} 660 661static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn) 662{ 663 return -ENODEV; 664} 665static inline void pci_disable_sriov(struct pci_dev *dev) 666{ 667} 668 669/** 670 * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table 671 * @_table: device table name 672 * 673 * This macro is used to create a struct pci_device_id array (a device table) 674 * in a generic manner. 675 */ 676#define DEFINE_PCI_DEVICE_TABLE(_table) \ 677 const struct pci_device_id _table[] __devinitdata 678 679 680/* XXX This should not be necessary. */ 681#define pcix_set_mmrbc(d, v) 0 682#define pcix_get_max_mmrbc(d) 0 683#define pcie_set_readrq(d, v) 0 684 685#define PCI_DMA_BIDIRECTIONAL 0 686#define PCI_DMA_TODEVICE 1 687#define PCI_DMA_FROMDEVICE 2 688#define PCI_DMA_NONE 3 689 690#define pci_pool dma_pool 691#define pci_pool_destroy dma_pool_destroy 692#define pci_pool_alloc dma_pool_alloc 693#define pci_pool_free dma_pool_free 694#define pci_pool_create(_name, _pdev, _size, _align, _alloc) \ 695 dma_pool_create(_name, &(_pdev)->dev, _size, _align, _alloc) 696#define pci_free_consistent(_hwdev, _size, _vaddr, _dma_handle) \ 697 dma_free_coherent((_hwdev) == NULL ? NULL : &(_hwdev)->dev, \ 698 _size, _vaddr, _dma_handle) 699#define pci_map_sg(_hwdev, _sg, _nents, _dir) \ 700 dma_map_sg((_hwdev) == NULL ? NULL : &(_hwdev->dev), \ 701 _sg, _nents, (enum dma_data_direction)_dir) 702#define pci_map_single(_hwdev, _ptr, _size, _dir) \ 703 dma_map_single((_hwdev) == NULL ? NULL : &(_hwdev->dev), \ 704 (_ptr), (_size), (enum dma_data_direction)_dir) 705#define pci_unmap_single(_hwdev, _addr, _size, _dir) \ 706 dma_unmap_single((_hwdev) == NULL ? NULL : &(_hwdev)->dev, \ 707 _addr, _size, (enum dma_data_direction)_dir) 708#define pci_unmap_sg(_hwdev, _sg, _nents, _dir) \ 709 dma_unmap_sg((_hwdev) == NULL ? NULL : &(_hwdev)->dev, \ 710 _sg, _nents, (enum dma_data_direction)_dir) 711#define pci_map_page(_hwdev, _page, _offset, _size, _dir) \ 712 dma_map_page((_hwdev) == NULL ? NULL : &(_hwdev)->dev, _page,\ 713 _offset, _size, (enum dma_data_direction)_dir) 714#define pci_unmap_page(_hwdev, _dma_address, _size, _dir) \ 715 dma_unmap_page((_hwdev) == NULL ? NULL : &(_hwdev)->dev, \ 716 _dma_address, _size, (enum dma_data_direction)_dir) 717#define pci_set_dma_mask(_pdev, mask) dma_set_mask(&(_pdev)->dev, (mask)) 718#define pci_dma_mapping_error(_pdev, _dma_addr) \ 719 dma_mapping_error(&(_pdev)->dev, _dma_addr) 720#define pci_set_consistent_dma_mask(_pdev, _mask) \ 721 dma_set_coherent_mask(&(_pdev)->dev, (_mask)) 722#define DECLARE_PCI_UNMAP_ADDR(x) DEFINE_DMA_UNMAP_ADDR(x); 723#define DECLARE_PCI_UNMAP_LEN(x) DEFINE_DMA_UNMAP_LEN(x); 724#define pci_unmap_addr dma_unmap_addr 725#define pci_unmap_addr_set dma_unmap_addr_set 726#define pci_unmap_len dma_unmap_len 727#define pci_unmap_len_set dma_unmap_len_set 728 729typedef unsigned int __bitwise pci_channel_state_t; 730typedef unsigned int __bitwise pci_ers_result_t; 731 732enum pci_channel_state { 733 /* I/O channel is in normal state */ 734 pci_channel_io_normal = (__force pci_channel_state_t) 1, 735 736 /* I/O to channel is blocked */ 737 pci_channel_io_frozen = (__force pci_channel_state_t) 2, 738 739 /* PCI card is dead */ 740 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3, 741}; 742 743enum pci_ers_result { 744 /* no result/none/not supported in device driver */ 745 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1, 746 747 /* Device driver can recover without slot reset */ 748 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2, 749 750 /* Device driver wants slot to be reset. */ 751 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3, 752 753 /* Device has completely failed, is unrecoverable */ 754 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4, 755 756 /* Device driver is fully recovered and operational */ 757 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5, 758}; 759 760 761/* PCI bus error event callbacks */ 762struct pci_error_handlers { 763 /* PCI bus error detected on this device */ 764 pci_ers_result_t (*error_detected)(struct pci_dev *dev, 765 enum pci_channel_state error); 766 767 /* MMIO has been re-enabled, but not DMA */ 768 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev); 769 770 /* PCI Express link has been reset */ 771 pci_ers_result_t (*link_reset)(struct pci_dev *dev); 772 773 /* PCI slot has been reset */ 774 pci_ers_result_t (*slot_reset)(struct pci_dev *dev); 775 776 /* Device driver may resume normal operations */ 777 void (*resume)(struct pci_dev *dev); 778}; 779 780/* freeBSD does not support SRIOV - yet */ 781static inline struct pci_dev *pci_physfn(struct pci_dev *dev) 782{ 783 return dev; 784} 785 786static inline bool pci_is_pcie(struct pci_dev *dev) 787{ 788 return !!pci_pcie_cap(dev); 789} 790 791static inline u16 pcie_flags_reg(struct pci_dev *dev) 792{ 793 int pos; 794 u16 reg16; 795 796 pos = pci_find_capability(dev, PCI_CAP_ID_EXP); 797 if (!pos) 798 return 0; 799 800 pci_read_config_word(dev, pos + PCI_EXP_FLAGS, ®16); 801 802 return reg16; 803} 804 805 806static inline int pci_pcie_type(struct pci_dev *dev) 807{ 808 return (pcie_flags_reg(dev) & PCI_EXP_FLAGS_TYPE) >> 4; 809} 810 811static inline int pcie_cap_version(struct pci_dev *dev) 812{ 813 return pcie_flags_reg(dev) & PCI_EXP_FLAGS_VERS; 814} 815 816static inline bool pcie_cap_has_lnkctl(struct pci_dev *dev) 817{ 818 int type = pci_pcie_type(dev); 819 820 return pcie_cap_version(dev) > 1 || 821 type == PCI_EXP_TYPE_ROOT_PORT || 822 type == PCI_EXP_TYPE_ENDPOINT || 823 type == PCI_EXP_TYPE_LEG_END; 824} 825 826static inline bool pcie_cap_has_devctl(const struct pci_dev *dev) 827{ 828 return true; 829} 830 831static inline bool pcie_cap_has_sltctl(struct pci_dev *dev) 832{ 833 int type = pci_pcie_type(dev); 834 835 return pcie_cap_version(dev) > 1 || 836 type == PCI_EXP_TYPE_ROOT_PORT || 837 (type == PCI_EXP_TYPE_DOWNSTREAM && 838 pcie_flags_reg(dev) & PCI_EXP_FLAGS_SLOT); 839} 840 841static inline bool pcie_cap_has_rtctl(struct pci_dev *dev) 842{ 843 int type = pci_pcie_type(dev); 844 845 return pcie_cap_version(dev) > 1 || 846 type == PCI_EXP_TYPE_ROOT_PORT || 847 type == PCI_EXP_TYPE_RC_EC; 848} 849 850static bool pcie_capability_reg_implemented(struct pci_dev *dev, int pos) 851{ 852 if (!pci_is_pcie(dev)) 853 return false; 854 855 switch (pos) { 856 case PCI_EXP_FLAGS_TYPE: 857 return true; 858 case PCI_EXP_DEVCAP: 859 case PCI_EXP_DEVCTL: 860 case PCI_EXP_DEVSTA: 861 return pcie_cap_has_devctl(dev); 862 case PCI_EXP_LNKCAP: 863 case PCI_EXP_LNKCTL: 864 case PCI_EXP_LNKSTA: 865 return pcie_cap_has_lnkctl(dev); 866 case PCI_EXP_SLTCAP: 867 case PCI_EXP_SLTCTL: 868 case PCI_EXP_SLTSTA: 869 return pcie_cap_has_sltctl(dev); 870 case PCI_EXP_RTCTL: 871 case PCI_EXP_RTCAP: 872 case PCI_EXP_RTSTA: 873 return pcie_cap_has_rtctl(dev); 874 case PCI_EXP_DEVCAP2: 875 case PCI_EXP_DEVCTL2: 876 case PCI_EXP_LNKCAP2: 877 case PCI_EXP_LNKCTL2: 878 case PCI_EXP_LNKSTA2: 879 return pcie_cap_version(dev) > 1; 880 default: 881 return false; 882 } 883} 884 885 886static inline int pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val) 887{ 888 if (pos & 1) 889 return -EINVAL; 890 891 if (!pcie_capability_reg_implemented(dev, pos)) 892 return 0; 893 894 return pci_write_config_word(dev, pci_pcie_cap(dev) + pos, val); 895} 896 897 898#endif /* _LINUX_PCI_H_ */ 899