pci.h revision 282513
1/*- 2 * Copyright (c) 2010 Isilon Systems, Inc. 3 * Copyright (c) 2010 iX Systems, Inc. 4 * Copyright (c) 2010 Panasas, Inc. 5 * Copyright (c) 2013, 2014 Mellanox Technologies, Ltd. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice unmodified, this list of conditions, and the following 13 * disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30#ifndef _LINUX_PCI_H_ 31#define _LINUX_PCI_H_ 32 33#define CONFIG_PCI_MSI 34 35#include <linux/types.h> 36 37#include <sys/param.h> 38#include <sys/bus.h> 39#include <sys/pciio.h> 40#include <sys/rman.h> 41#include <dev/pci/pcivar.h> 42#include <dev/pci/pcireg.h> 43#include <dev/pci/pci_private.h> 44 45#include <machine/resource.h> 46 47#include <linux/list.h> 48#include <linux/dmapool.h> 49#include <linux/dma-mapping.h> 50#include <linux/compiler.h> 51#include <linux/errno.h> 52#include <asm/atomic.h> 53#include <linux/device.h> 54 55struct pci_device_id { 56 uint32_t vendor; 57 uint32_t device; 58 uint32_t subvendor; 59 uint32_t subdevice; 60 uint32_t class_mask; 61 uintptr_t driver_data; 62}; 63 64#define MODULE_DEVICE_TABLE(bus, table) 65#define PCI_ANY_ID (-1) 66#define PCI_VENDOR_ID_MELLANOX 0x15b3 67#define PCI_VENDOR_ID_TOPSPIN 0x1867 68#define PCI_DEVICE_ID_MELLANOX_TAVOR 0x5a44 69#define PCI_DEVICE_ID_MELLANOX_TAVOR_BRIDGE 0x5a46 70#define PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT 0x6278 71#define PCI_DEVICE_ID_MELLANOX_ARBEL 0x6282 72#define PCI_DEVICE_ID_MELLANOX_SINAI_OLD 0x5e8c 73#define PCI_DEVICE_ID_MELLANOX_SINAI 0x6274 74 75#define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07)) 76#define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f) 77#define PCI_FUNC(devfn) ((devfn) & 0x07) 78 79#define PCI_VDEVICE(_vendor, _device) \ 80 .vendor = PCI_VENDOR_ID_##_vendor, .device = (_device), \ 81 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID 82#define PCI_DEVICE(_vendor, _device) \ 83 .vendor = (_vendor), .device = (_device), \ 84 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID 85 86#define to_pci_dev(n) container_of(n, struct pci_dev, dev) 87 88#define PCI_VENDOR_ID PCIR_DEVVENDOR 89#define PCI_COMMAND PCIR_COMMAND 90#define PCI_EXP_DEVCTL PCIER_DEVICE_CTL /* Device Control */ 91#define PCI_EXP_LNKCTL PCIER_LINK_CTL /* Link Control */ 92#define PCI_EXP_FLAGS_TYPE PCIEM_FLAGS_TYPE /* Device/Port type */ 93#define PCI_EXP_DEVCAP PCIER_DEVICE_CAP /* Device capabilities */ 94#define PCI_EXP_DEVSTA PCIER_DEVICE_STA /* Device Status */ 95#define PCI_EXP_LNKCAP PCIER_LINK_CAP /* Link Capabilities */ 96#define PCI_EXP_LNKSTA PCIER_LINK_STA /* Link Status */ 97#define PCI_EXP_SLTCAP PCIER_SLOT_CAP /* Slot Capabilities */ 98#define PCI_EXP_SLTCTL PCIER_SLOT_CTL /* Slot Control */ 99#define PCI_EXP_SLTSTA PCIER_SLOT_STA /* Slot Status */ 100#define PCI_EXP_RTCTL PCIER_ROOT_CTL /* Root Control */ 101#define PCI_EXP_RTCAP PCIER_ROOT_CAP /* Root Capabilities */ 102#define PCI_EXP_RTSTA PCIER_ROOT_STA /* Root Status */ 103#define PCI_EXP_DEVCAP2 PCIER_DEVICE_CAP2 /* Device Capabilities 2 */ 104#define PCI_EXP_DEVCTL2 PCIER_DEVICE_CTL2 /* Device Control 2 */ 105#define PCI_EXP_LNKCAP2 PCIER_LINK_CAP2 /* Link Capabilities 2 */ 106#define PCI_EXP_LNKCTL2 PCIER_LINK_CTL2 /* Link Control 2 */ 107#define PCI_EXP_LNKSTA2 PCIER_LINK_STA2 /* Link Status 2 */ 108#define PCI_EXP_FLAGS PCIER_FLAGS /* Capabilities register */ 109#define PCI_EXP_FLAGS_VERS PCIEM_FLAGS_VERSION /* Capability version */ 110#define PCI_EXP_TYPE_ROOT_PORT PCIEM_TYPE_ROOT_PORT /* Root Port */ 111#define PCI_EXP_TYPE_ENDPOINT PCIEM_TYPE_ENDPOINT /* Express Endpoint */ 112#define PCI_EXP_TYPE_LEG_END PCIEM_TYPE_LEGACY_ENDPOINT /* Legacy Endpoint */ 113#define PCI_EXP_TYPE_DOWNSTREAM PCIEM_TYPE_DOWNSTREAM_PORT /* Downstream Port */ 114#define PCI_EXP_FLAGS_SLOT PCIEM_FLAGS_SLOT /* Slot implemented */ 115#define PCI_EXP_TYPE_RC_EC PCIEM_TYPE_ROOT_EC /* Root Complex Event Collector */ 116 117 118#define IORESOURCE_MEM SYS_RES_MEMORY 119#define IORESOURCE_IO SYS_RES_IOPORT 120#define IORESOURCE_IRQ SYS_RES_IRQ 121 122struct pci_dev; 123 124 125struct pci_driver { 126 struct list_head links; 127 char *name; 128 const struct pci_device_id *id_table; 129 int (*probe)(struct pci_dev *dev, const struct pci_device_id *id); 130 void (*remove)(struct pci_dev *dev); 131 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */ 132 int (*resume) (struct pci_dev *dev); /* Device woken up */ 133 driver_t driver; 134 devclass_t bsdclass; 135 const struct pci_error_handlers *err_handler; 136}; 137 138extern struct list_head pci_drivers; 139extern struct list_head pci_devices; 140extern spinlock_t pci_lock; 141 142#define __devexit_p(x) x 143 144struct pci_dev { 145 struct device dev; 146 struct list_head links; 147 struct pci_driver *pdrv; 148 uint64_t dma_mask; 149 uint16_t device; 150 uint16_t vendor; 151 unsigned int irq; 152 unsigned int devfn; 153 u8 revision; 154}; 155 156static inline struct resource_list_entry * 157_pci_get_rle(struct pci_dev *pdev, int type, int rid) 158{ 159 struct pci_devinfo *dinfo; 160 struct resource_list *rl; 161 162 dinfo = device_get_ivars(pdev->dev.bsddev); 163 rl = &dinfo->resources; 164 return resource_list_find(rl, type, rid); 165} 166 167static inline struct resource_list_entry * 168_pci_get_bar(struct pci_dev *pdev, int bar) 169{ 170 struct resource_list_entry *rle; 171 172 bar = PCIR_BAR(bar); 173 if ((rle = _pci_get_rle(pdev, SYS_RES_MEMORY, bar)) == NULL) 174 rle = _pci_get_rle(pdev, SYS_RES_IOPORT, bar); 175 return (rle); 176} 177 178static inline struct device * 179_pci_find_irq_dev(unsigned int irq) 180{ 181 struct pci_dev *pdev; 182 183 spin_lock(&pci_lock); 184 list_for_each_entry(pdev, &pci_devices, links) { 185 if (irq == pdev->dev.irq) 186 break; 187 if (irq >= pdev->dev.msix && irq < pdev->dev.msix_max) 188 break; 189 } 190 spin_unlock(&pci_lock); 191 if (pdev) 192 return &pdev->dev; 193 return (NULL); 194} 195 196static inline unsigned long 197pci_resource_start(struct pci_dev *pdev, int bar) 198{ 199 struct resource_list_entry *rle; 200 201 if ((rle = _pci_get_bar(pdev, bar)) == NULL) 202 return (0); 203 return rle->start; 204} 205 206static inline unsigned long 207pci_resource_len(struct pci_dev *pdev, int bar) 208{ 209 struct resource_list_entry *rle; 210 211 if ((rle = _pci_get_bar(pdev, bar)) == NULL) 212 return (0); 213 return rle->count; 214} 215 216/* 217 * All drivers just seem to want to inspect the type not flags. 218 */ 219static inline int 220pci_resource_flags(struct pci_dev *pdev, int bar) 221{ 222 struct resource_list_entry *rle; 223 224 if ((rle = _pci_get_bar(pdev, bar)) == NULL) 225 return (0); 226 return rle->type; 227} 228 229static inline const char * 230pci_name(struct pci_dev *d) 231{ 232 233 return device_get_desc(d->dev.bsddev); 234} 235 236static inline void * 237pci_get_drvdata(struct pci_dev *pdev) 238{ 239 240 return dev_get_drvdata(&pdev->dev); 241} 242 243static inline void 244pci_set_drvdata(struct pci_dev *pdev, void *data) 245{ 246 247 dev_set_drvdata(&pdev->dev, data); 248} 249 250static inline int 251pci_enable_device(struct pci_dev *pdev) 252{ 253 254 pci_enable_io(pdev->dev.bsddev, SYS_RES_IOPORT); 255 pci_enable_io(pdev->dev.bsddev, SYS_RES_MEMORY); 256 return (0); 257} 258 259static inline void 260pci_disable_device(struct pci_dev *pdev) 261{ 262} 263 264static inline int 265pci_set_master(struct pci_dev *pdev) 266{ 267 268 pci_enable_busmaster(pdev->dev.bsddev); 269 return (0); 270} 271 272static inline int 273pci_clear_master(struct pci_dev *pdev) 274{ 275 276 pci_disable_busmaster(pdev->dev.bsddev); 277 return (0); 278} 279 280static inline int 281pci_request_region(struct pci_dev *pdev, int bar, const char *res_name) 282{ 283 int rid; 284 int type; 285 286 type = pci_resource_flags(pdev, bar); 287 if (type == 0) 288 return (-ENODEV); 289 rid = PCIR_BAR(bar); 290 if (bus_alloc_resource_any(pdev->dev.bsddev, type, &rid, 291 RF_ACTIVE) == NULL) 292 return (-EINVAL); 293 return (0); 294} 295 296static inline void 297pci_release_region(struct pci_dev *pdev, int bar) 298{ 299 struct resource_list_entry *rle; 300 301 if ((rle = _pci_get_bar(pdev, bar)) == NULL) 302 return; 303 bus_release_resource(pdev->dev.bsddev, rle->type, rle->rid, rle->res); 304} 305 306static inline void 307pci_release_regions(struct pci_dev *pdev) 308{ 309 int i; 310 311 for (i = 0; i <= PCIR_MAX_BAR_0; i++) 312 pci_release_region(pdev, i); 313} 314 315static inline int 316pci_request_regions(struct pci_dev *pdev, const char *res_name) 317{ 318 int error; 319 int i; 320 321 for (i = 0; i <= PCIR_MAX_BAR_0; i++) { 322 error = pci_request_region(pdev, i, res_name); 323 if (error && error != -ENODEV) { 324 pci_release_regions(pdev); 325 return (error); 326 } 327 } 328 return (0); 329} 330 331static inline void 332pci_disable_msix(struct pci_dev *pdev) 333{ 334 335 pci_release_msi(pdev->dev.bsddev); 336} 337 338#define PCI_CAP_ID_EXP PCIY_EXPRESS 339#define PCI_CAP_ID_PCIX PCIY_PCIX 340 341 342static inline int 343pci_find_capability(struct pci_dev *pdev, int capid) 344{ 345 int reg; 346 347 if (pci_find_cap(pdev->dev.bsddev, capid, ®)) 348 return (0); 349 return (reg); 350} 351 352 353 354 355/** 356 * pci_pcie_cap - get the saved PCIe capability offset 357 * @dev: PCI device 358 * 359 * PCIe capability offset is calculated at PCI device initialization 360 * time and saved in the data structure. This function returns saved 361 * PCIe capability offset. Using this instead of pci_find_capability() 362 * reduces unnecessary search in the PCI configuration space. If you 363 * need to calculate PCIe capability offset from raw device for some 364 * reasons, please use pci_find_capability() instead. 365 */ 366static inline int pci_pcie_cap(struct pci_dev *dev) 367{ 368 return pci_find_capability(dev, PCI_CAP_ID_EXP); 369} 370 371 372static inline int 373pci_read_config_byte(struct pci_dev *pdev, int where, u8 *val) 374{ 375 376 *val = (u8)pci_read_config(pdev->dev.bsddev, where, 1); 377 return (0); 378} 379 380static inline int 381pci_read_config_word(struct pci_dev *pdev, int where, u16 *val) 382{ 383 384 *val = (u16)pci_read_config(pdev->dev.bsddev, where, 2); 385 return (0); 386} 387 388static inline int 389pci_read_config_dword(struct pci_dev *pdev, int where, u32 *val) 390{ 391 392 *val = (u32)pci_read_config(pdev->dev.bsddev, where, 4); 393 return (0); 394} 395 396static inline int 397pci_write_config_byte(struct pci_dev *pdev, int where, u8 val) 398{ 399 400 pci_write_config(pdev->dev.bsddev, where, val, 1); 401 return (0); 402} 403 404static inline int 405pci_write_config_word(struct pci_dev *pdev, int where, u16 val) 406{ 407 408 pci_write_config(pdev->dev.bsddev, where, val, 2); 409 return (0); 410} 411 412static inline int 413pci_write_config_dword(struct pci_dev *pdev, int where, u32 val) 414{ 415 416 pci_write_config(pdev->dev.bsddev, where, val, 4); 417 return (0); 418} 419 420static struct pci_driver * 421linux_pci_find(device_t dev, const struct pci_device_id **idp) 422{ 423 const struct pci_device_id *id; 424 struct pci_driver *pdrv; 425 uint16_t vendor; 426 uint16_t device; 427 428 vendor = pci_get_vendor(dev); 429 device = pci_get_device(dev); 430 431 spin_lock(&pci_lock); 432 list_for_each_entry(pdrv, &pci_drivers, links) { 433 for (id = pdrv->id_table; id->vendor != 0; id++) { 434 if (vendor == id->vendor && device == id->device) { 435 *idp = id; 436 spin_unlock(&pci_lock); 437 return (pdrv); 438 } 439 } 440 } 441 spin_unlock(&pci_lock); 442 return (NULL); 443} 444 445static inline int 446linux_pci_probe(device_t dev) 447{ 448 const struct pci_device_id *id; 449 struct pci_driver *pdrv; 450 451 if ((pdrv = linux_pci_find(dev, &id)) == NULL) 452 return (ENXIO); 453 if (device_get_driver(dev) != &pdrv->driver) 454 return (ENXIO); 455 device_set_desc(dev, pdrv->name); 456 return (0); 457} 458 459static inline int 460linux_pci_attach(device_t dev) 461{ 462 struct resource_list_entry *rle; 463 struct pci_dev *pdev; 464 struct pci_driver *pdrv; 465 const struct pci_device_id *id; 466 int error; 467 468 pdrv = linux_pci_find(dev, &id); 469 pdev = device_get_softc(dev); 470 pdev->dev.parent = &linux_rootdev; 471 pdev->dev.bsddev = dev; 472 INIT_LIST_HEAD(&pdev->dev.irqents); 473 pdev->device = id->device; 474 pdev->vendor = id->vendor; 475 pdev->dev.dma_mask = &pdev->dma_mask; 476 pdev->pdrv = pdrv; 477 kobject_init(&pdev->dev.kobj, &dev_ktype); 478 kobject_set_name(&pdev->dev.kobj, device_get_nameunit(dev)); 479 kobject_add(&pdev->dev.kobj, &linux_rootdev.kobj, 480 kobject_name(&pdev->dev.kobj)); 481 rle = _pci_get_rle(pdev, SYS_RES_IRQ, 0); 482 if (rle) 483 pdev->dev.irq = rle->start; 484 else 485 pdev->dev.irq = 0; 486 pdev->irq = pdev->dev.irq; 487 mtx_unlock(&Giant); 488 spin_lock(&pci_lock); 489 list_add(&pdev->links, &pci_devices); 490 spin_unlock(&pci_lock); 491 error = pdrv->probe(pdev, id); 492 mtx_lock(&Giant); 493 if (error) { 494 spin_lock(&pci_lock); 495 list_del(&pdev->links); 496 spin_unlock(&pci_lock); 497 put_device(&pdev->dev); 498 return (-error); 499 } 500 return (0); 501} 502 503static inline int 504linux_pci_detach(device_t dev) 505{ 506 struct pci_dev *pdev; 507 508 pdev = device_get_softc(dev); 509 mtx_unlock(&Giant); 510 pdev->pdrv->remove(pdev); 511 mtx_lock(&Giant); 512 spin_lock(&pci_lock); 513 list_del(&pdev->links); 514 spin_unlock(&pci_lock); 515 put_device(&pdev->dev); 516 517 return (0); 518} 519 520static device_method_t pci_methods[] = { 521 DEVMETHOD(device_probe, linux_pci_probe), 522 DEVMETHOD(device_attach, linux_pci_attach), 523 DEVMETHOD(device_detach, linux_pci_detach), 524 {0, 0} 525}; 526 527static inline int 528pci_register_driver(struct pci_driver *pdrv) 529{ 530 devclass_t bus; 531 int error; 532 533 spin_lock(&pci_lock); 534 list_add(&pdrv->links, &pci_drivers); 535 spin_unlock(&pci_lock); 536 bus = devclass_find("pci"); 537 pdrv->driver.name = pdrv->name; 538 pdrv->driver.methods = pci_methods; 539 pdrv->driver.size = sizeof(struct pci_dev); 540 mtx_lock(&Giant); 541 error = devclass_add_driver(bus, &pdrv->driver, BUS_PASS_DEFAULT, 542 &pdrv->bsdclass); 543 mtx_unlock(&Giant); 544 if (error) 545 return (-error); 546 return (0); 547} 548 549static inline void 550pci_unregister_driver(struct pci_driver *pdrv) 551{ 552 devclass_t bus; 553 554 list_del(&pdrv->links); 555 bus = devclass_find("pci"); 556 mtx_lock(&Giant); 557 devclass_delete_driver(bus, &pdrv->driver); 558 mtx_unlock(&Giant); 559} 560 561struct msix_entry { 562 int entry; 563 int vector; 564}; 565 566/* 567 * Enable msix, positive errors indicate actual number of available 568 * vectors. Negative errors are failures. 569 */ 570static inline int 571pci_enable_msix(struct pci_dev *pdev, struct msix_entry *entries, int nreq) 572{ 573 struct resource_list_entry *rle; 574 int error; 575 int avail; 576 int i; 577 578 avail = pci_msix_count(pdev->dev.bsddev); 579 if (avail < nreq) { 580 if (avail == 0) 581 return -EINVAL; 582 return avail; 583 } 584 avail = nreq; 585 if ((error = -pci_alloc_msix(pdev->dev.bsddev, &avail)) != 0) 586 return error; 587 /* 588 * Handle case where "pci_alloc_msix()" may allocate less 589 * interrupts than available and return with no error: 590 */ 591 if (avail < nreq) { 592 pci_release_msi(pdev->dev.bsddev); 593 return avail; 594 } 595 rle = _pci_get_rle(pdev, SYS_RES_IRQ, 1); 596 pdev->dev.msix = rle->start; 597 pdev->dev.msix_max = rle->start + avail; 598 for (i = 0; i < nreq; i++) 599 entries[i].vector = pdev->dev.msix + i; 600 return (0); 601} 602 603#define pci_enable_msix_range linux_pci_enable_msix_range 604static inline int 605pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries, 606 int minvec, int maxvec) 607{ 608 int nvec = maxvec; 609 int rc; 610 611 if (maxvec < minvec) 612 return (-ERANGE); 613 614 do { 615 rc = pci_enable_msix(dev, entries, nvec); 616 if (rc < 0) { 617 return (rc); 618 } else if (rc > 0) { 619 if (rc < minvec) 620 return (-ENOSPC); 621 nvec = rc; 622 } 623 } while (rc); 624 return (nvec); 625} 626 627static inline int pci_channel_offline(struct pci_dev *pdev) 628{ 629 return false; 630} 631 632static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn) 633{ 634 return -ENODEV; 635} 636static inline void pci_disable_sriov(struct pci_dev *dev) 637{ 638} 639 640/** 641 * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table 642 * @_table: device table name 643 * 644 * This macro is used to create a struct pci_device_id array (a device table) 645 * in a generic manner. 646 */ 647#define DEFINE_PCI_DEVICE_TABLE(_table) \ 648 const struct pci_device_id _table[] __devinitdata 649 650 651/* XXX This should not be necessary. */ 652#define pcix_set_mmrbc(d, v) 0 653#define pcix_get_max_mmrbc(d) 0 654#define pcie_set_readrq(d, v) 0 655 656#define PCI_DMA_BIDIRECTIONAL 0 657#define PCI_DMA_TODEVICE 1 658#define PCI_DMA_FROMDEVICE 2 659#define PCI_DMA_NONE 3 660 661#define pci_pool dma_pool 662#define pci_pool_destroy dma_pool_destroy 663#define pci_pool_alloc dma_pool_alloc 664#define pci_pool_free dma_pool_free 665#define pci_pool_create(_name, _pdev, _size, _align, _alloc) \ 666 dma_pool_create(_name, &(_pdev)->dev, _size, _align, _alloc) 667#define pci_free_consistent(_hwdev, _size, _vaddr, _dma_handle) \ 668 dma_free_coherent((_hwdev) == NULL ? NULL : &(_hwdev)->dev, \ 669 _size, _vaddr, _dma_handle) 670#define pci_map_sg(_hwdev, _sg, _nents, _dir) \ 671 dma_map_sg((_hwdev) == NULL ? NULL : &(_hwdev->dev), \ 672 _sg, _nents, (enum dma_data_direction)_dir) 673#define pci_map_single(_hwdev, _ptr, _size, _dir) \ 674 dma_map_single((_hwdev) == NULL ? NULL : &(_hwdev->dev), \ 675 (_ptr), (_size), (enum dma_data_direction)_dir) 676#define pci_unmap_single(_hwdev, _addr, _size, _dir) \ 677 dma_unmap_single((_hwdev) == NULL ? NULL : &(_hwdev)->dev, \ 678 _addr, _size, (enum dma_data_direction)_dir) 679#define pci_unmap_sg(_hwdev, _sg, _nents, _dir) \ 680 dma_unmap_sg((_hwdev) == NULL ? NULL : &(_hwdev)->dev, \ 681 _sg, _nents, (enum dma_data_direction)_dir) 682#define pci_map_page(_hwdev, _page, _offset, _size, _dir) \ 683 dma_map_page((_hwdev) == NULL ? NULL : &(_hwdev)->dev, _page,\ 684 _offset, _size, (enum dma_data_direction)_dir) 685#define pci_unmap_page(_hwdev, _dma_address, _size, _dir) \ 686 dma_unmap_page((_hwdev) == NULL ? NULL : &(_hwdev)->dev, \ 687 _dma_address, _size, (enum dma_data_direction)_dir) 688#define pci_set_dma_mask(_pdev, mask) dma_set_mask(&(_pdev)->dev, (mask)) 689#define pci_dma_mapping_error(_pdev, _dma_addr) \ 690 dma_mapping_error(&(_pdev)->dev, _dma_addr) 691#define pci_set_consistent_dma_mask(_pdev, _mask) \ 692 dma_set_coherent_mask(&(_pdev)->dev, (_mask)) 693#define DECLARE_PCI_UNMAP_ADDR(x) DEFINE_DMA_UNMAP_ADDR(x); 694#define DECLARE_PCI_UNMAP_LEN(x) DEFINE_DMA_UNMAP_LEN(x); 695#define pci_unmap_addr dma_unmap_addr 696#define pci_unmap_addr_set dma_unmap_addr_set 697#define pci_unmap_len dma_unmap_len 698#define pci_unmap_len_set dma_unmap_len_set 699 700typedef unsigned int __bitwise pci_channel_state_t; 701typedef unsigned int __bitwise pci_ers_result_t; 702 703enum pci_channel_state { 704 /* I/O channel is in normal state */ 705 pci_channel_io_normal = (__force pci_channel_state_t) 1, 706 707 /* I/O to channel is blocked */ 708 pci_channel_io_frozen = (__force pci_channel_state_t) 2, 709 710 /* PCI card is dead */ 711 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3, 712}; 713 714enum pci_ers_result { 715 /* no result/none/not supported in device driver */ 716 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1, 717 718 /* Device driver can recover without slot reset */ 719 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2, 720 721 /* Device driver wants slot to be reset. */ 722 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3, 723 724 /* Device has completely failed, is unrecoverable */ 725 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4, 726 727 /* Device driver is fully recovered and operational */ 728 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5, 729}; 730 731 732/* PCI bus error event callbacks */ 733struct pci_error_handlers { 734 /* PCI bus error detected on this device */ 735 pci_ers_result_t (*error_detected)(struct pci_dev *dev, 736 enum pci_channel_state error); 737 738 /* MMIO has been re-enabled, but not DMA */ 739 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev); 740 741 /* PCI Express link has been reset */ 742 pci_ers_result_t (*link_reset)(struct pci_dev *dev); 743 744 /* PCI slot has been reset */ 745 pci_ers_result_t (*slot_reset)(struct pci_dev *dev); 746 747 /* Device driver may resume normal operations */ 748 void (*resume)(struct pci_dev *dev); 749}; 750 751/* freeBSD does not support SRIOV - yet */ 752static inline struct pci_dev *pci_physfn(struct pci_dev *dev) 753{ 754 return dev; 755} 756 757static inline bool pci_is_pcie(struct pci_dev *dev) 758{ 759 return !!pci_pcie_cap(dev); 760} 761 762static inline u16 pcie_flags_reg(struct pci_dev *dev) 763{ 764 int pos; 765 u16 reg16; 766 767 pos = pci_find_capability(dev, PCI_CAP_ID_EXP); 768 if (!pos) 769 return 0; 770 771 pci_read_config_word(dev, pos + PCI_EXP_FLAGS, ®16); 772 773 return reg16; 774} 775 776 777static inline int pci_pcie_type(struct pci_dev *dev) 778{ 779 return (pcie_flags_reg(dev) & PCI_EXP_FLAGS_TYPE) >> 4; 780} 781 782static inline int pcie_cap_version(struct pci_dev *dev) 783{ 784 return pcie_flags_reg(dev) & PCI_EXP_FLAGS_VERS; 785} 786 787static inline bool pcie_cap_has_lnkctl(struct pci_dev *dev) 788{ 789 int type = pci_pcie_type(dev); 790 791 return pcie_cap_version(dev) > 1 || 792 type == PCI_EXP_TYPE_ROOT_PORT || 793 type == PCI_EXP_TYPE_ENDPOINT || 794 type == PCI_EXP_TYPE_LEG_END; 795} 796 797static inline bool pcie_cap_has_devctl(const struct pci_dev *dev) 798{ 799 return true; 800} 801 802static inline bool pcie_cap_has_sltctl(struct pci_dev *dev) 803{ 804 int type = pci_pcie_type(dev); 805 806 return pcie_cap_version(dev) > 1 || 807 type == PCI_EXP_TYPE_ROOT_PORT || 808 (type == PCI_EXP_TYPE_DOWNSTREAM && 809 pcie_flags_reg(dev) & PCI_EXP_FLAGS_SLOT); 810} 811 812static inline bool pcie_cap_has_rtctl(struct pci_dev *dev) 813{ 814 int type = pci_pcie_type(dev); 815 816 return pcie_cap_version(dev) > 1 || 817 type == PCI_EXP_TYPE_ROOT_PORT || 818 type == PCI_EXP_TYPE_RC_EC; 819} 820 821static bool pcie_capability_reg_implemented(struct pci_dev *dev, int pos) 822{ 823 if (!pci_is_pcie(dev)) 824 return false; 825 826 switch (pos) { 827 case PCI_EXP_FLAGS_TYPE: 828 return true; 829 case PCI_EXP_DEVCAP: 830 case PCI_EXP_DEVCTL: 831 case PCI_EXP_DEVSTA: 832 return pcie_cap_has_devctl(dev); 833 case PCI_EXP_LNKCAP: 834 case PCI_EXP_LNKCTL: 835 case PCI_EXP_LNKSTA: 836 return pcie_cap_has_lnkctl(dev); 837 case PCI_EXP_SLTCAP: 838 case PCI_EXP_SLTCTL: 839 case PCI_EXP_SLTSTA: 840 return pcie_cap_has_sltctl(dev); 841 case PCI_EXP_RTCTL: 842 case PCI_EXP_RTCAP: 843 case PCI_EXP_RTSTA: 844 return pcie_cap_has_rtctl(dev); 845 case PCI_EXP_DEVCAP2: 846 case PCI_EXP_DEVCTL2: 847 case PCI_EXP_LNKCAP2: 848 case PCI_EXP_LNKCTL2: 849 case PCI_EXP_LNKSTA2: 850 return pcie_cap_version(dev) > 1; 851 default: 852 return false; 853 } 854} 855 856 857static inline int pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val) 858{ 859 if (pos & 1) 860 return -EINVAL; 861 862 if (!pcie_capability_reg_implemented(dev, pos)) 863 return 0; 864 865 return pci_write_config_word(dev, pci_pcie_cap(dev) + pos, val); 866} 867 868 869#endif /* _LINUX_PCI_H_ */ 870