1219820Sjeff/* 2219820Sjeff * Copyright (c) 2006 Cisco Systems, Inc. All rights reserved. 3219820Sjeff * 4219820Sjeff * This software is available to you under a choice of one of two 5219820Sjeff * licenses. You may choose to be licensed under the terms of the GNU 6219820Sjeff * General Public License (GPL) Version 2, available from the file 7219820Sjeff * COPYING in the main directory of this source tree, or the 8219820Sjeff * OpenIB.org BSD license below: 9219820Sjeff * 10219820Sjeff * Redistribution and use in source and binary forms, with or 11219820Sjeff * without modification, are permitted provided that the following 12219820Sjeff * conditions are met: 13219820Sjeff * 14219820Sjeff * - Redistributions of source code must retain the above 15219820Sjeff * copyright notice, this list of conditions and the following 16219820Sjeff * disclaimer. 17219820Sjeff * 18219820Sjeff * - Redistributions in binary form must reproduce the above 19219820Sjeff * copyright notice, this list of conditions and the following 20219820Sjeff * disclaimer in the documentation and/or other materials 21219820Sjeff * provided with the distribution. 22219820Sjeff * 23219820Sjeff * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24219820Sjeff * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25219820Sjeff * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26219820Sjeff * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27219820Sjeff * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28219820Sjeff * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29219820Sjeff * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30219820Sjeff * SOFTWARE. 31219820Sjeff */ 32219820Sjeff 33219820Sjeff#ifndef MLX4_CMD_H 34219820Sjeff#define MLX4_CMD_H 35219820Sjeff 36219820Sjeff#include <linux/dma-mapping.h> 37272407Shselasky#include <linux/types.h> 38219820Sjeff 39219820Sjeffenum { 40219820Sjeff /* initialization and general commands */ 41219820Sjeff MLX4_CMD_SYS_EN = 0x1, 42219820Sjeff MLX4_CMD_SYS_DIS = 0x2, 43219820Sjeff MLX4_CMD_MAP_FA = 0xfff, 44219820Sjeff MLX4_CMD_UNMAP_FA = 0xffe, 45219820Sjeff MLX4_CMD_RUN_FW = 0xff6, 46219820Sjeff MLX4_CMD_MOD_STAT_CFG = 0x34, 47219820Sjeff MLX4_CMD_QUERY_DEV_CAP = 0x3, 48219820Sjeff MLX4_CMD_QUERY_FW = 0x4, 49219820Sjeff MLX4_CMD_ENABLE_LAM = 0xff8, 50219820Sjeff MLX4_CMD_DISABLE_LAM = 0xff7, 51219820Sjeff MLX4_CMD_QUERY_DDR = 0x5, 52219820Sjeff MLX4_CMD_QUERY_ADAPTER = 0x6, 53219820Sjeff MLX4_CMD_INIT_HCA = 0x7, 54219820Sjeff MLX4_CMD_CLOSE_HCA = 0x8, 55219820Sjeff MLX4_CMD_INIT_PORT = 0x9, 56219820Sjeff MLX4_CMD_CLOSE_PORT = 0xa, 57219820Sjeff MLX4_CMD_QUERY_HCA = 0xb, 58219820Sjeff MLX4_CMD_QUERY_PORT = 0x43, 59219820Sjeff MLX4_CMD_SENSE_PORT = 0x4d, 60219820Sjeff MLX4_CMD_HW_HEALTH_CHECK = 0x50, 61219820Sjeff MLX4_CMD_SET_PORT = 0xc, 62219820Sjeff MLX4_CMD_SET_NODE = 0x5a, 63255932Salfred MLX4_CMD_QUERY_FUNC = 0x56, 64219820Sjeff MLX4_CMD_ACCESS_DDR = 0x2e, 65219820Sjeff MLX4_CMD_MAP_ICM = 0xffa, 66219820Sjeff MLX4_CMD_UNMAP_ICM = 0xff9, 67219820Sjeff MLX4_CMD_MAP_ICM_AUX = 0xffc, 68219820Sjeff MLX4_CMD_UNMAP_ICM_AUX = 0xffb, 69219820Sjeff MLX4_CMD_SET_ICM_SIZE = 0xffd, 70255932Salfred /*master notify fw on finish for slave's flr*/ 71255932Salfred MLX4_CMD_INFORM_FLR_DONE = 0x5b, 72255932Salfred MLX4_CMD_GET_OP_REQ = 0x59, 73219820Sjeff 74219820Sjeff /* TPT commands */ 75219820Sjeff MLX4_CMD_SW2HW_MPT = 0xd, 76219820Sjeff MLX4_CMD_QUERY_MPT = 0xe, 77219820Sjeff MLX4_CMD_HW2SW_MPT = 0xf, 78219820Sjeff MLX4_CMD_READ_MTT = 0x10, 79219820Sjeff MLX4_CMD_WRITE_MTT = 0x11, 80219820Sjeff MLX4_CMD_SYNC_TPT = 0x2f, 81219820Sjeff 82219820Sjeff /* EQ commands */ 83219820Sjeff MLX4_CMD_MAP_EQ = 0x12, 84219820Sjeff MLX4_CMD_SW2HW_EQ = 0x13, 85219820Sjeff MLX4_CMD_HW2SW_EQ = 0x14, 86219820Sjeff MLX4_CMD_QUERY_EQ = 0x15, 87219820Sjeff 88219820Sjeff /* CQ commands */ 89219820Sjeff MLX4_CMD_SW2HW_CQ = 0x16, 90219820Sjeff MLX4_CMD_HW2SW_CQ = 0x17, 91219820Sjeff MLX4_CMD_QUERY_CQ = 0x18, 92219820Sjeff MLX4_CMD_MODIFY_CQ = 0x2c, 93219820Sjeff 94219820Sjeff /* SRQ commands */ 95219820Sjeff MLX4_CMD_SW2HW_SRQ = 0x35, 96219820Sjeff MLX4_CMD_HW2SW_SRQ = 0x36, 97219820Sjeff MLX4_CMD_QUERY_SRQ = 0x37, 98219820Sjeff MLX4_CMD_ARM_SRQ = 0x40, 99219820Sjeff 100219820Sjeff /* QP/EE commands */ 101219820Sjeff MLX4_CMD_RST2INIT_QP = 0x19, 102219820Sjeff MLX4_CMD_INIT2RTR_QP = 0x1a, 103219820Sjeff MLX4_CMD_RTR2RTS_QP = 0x1b, 104219820Sjeff MLX4_CMD_RTS2RTS_QP = 0x1c, 105219820Sjeff MLX4_CMD_SQERR2RTS_QP = 0x1d, 106219820Sjeff MLX4_CMD_2ERR_QP = 0x1e, 107219820Sjeff MLX4_CMD_RTS2SQD_QP = 0x1f, 108219820Sjeff MLX4_CMD_SQD2SQD_QP = 0x38, 109219820Sjeff MLX4_CMD_SQD2RTS_QP = 0x20, 110219820Sjeff MLX4_CMD_2RST_QP = 0x21, 111219820Sjeff MLX4_CMD_QUERY_QP = 0x22, 112219820Sjeff MLX4_CMD_INIT2INIT_QP = 0x2d, 113219820Sjeff MLX4_CMD_SUSPEND_QP = 0x32, 114219820Sjeff MLX4_CMD_UNSUSPEND_QP = 0x33, 115272407Shselasky MLX4_CMD_UPDATE_QP = 0x61, 116219820Sjeff /* special QP and management commands */ 117219820Sjeff MLX4_CMD_CONF_SPECIAL_QP = 0x23, 118219820Sjeff MLX4_CMD_MAD_IFC = 0x24, 119219820Sjeff 120219820Sjeff /* multicast commands */ 121219820Sjeff MLX4_CMD_READ_MCG = 0x25, 122219820Sjeff MLX4_CMD_WRITE_MCG = 0x26, 123219820Sjeff MLX4_CMD_MGID_HASH = 0x27, 124219820Sjeff 125219820Sjeff /* miscellaneous commands */ 126219820Sjeff MLX4_CMD_DIAG_RPRT = 0x30, 127219820Sjeff MLX4_CMD_NOP = 0x31, 128255932Salfred MLX4_CMD_ACCESS_MEM = 0x2e, 129255932Salfred MLX4_CMD_SET_VEP = 0x52, 130219820Sjeff 131255932Salfred /* Ethernet specific commands */ 132255932Salfred MLX4_CMD_SET_VLAN_FLTR = 0x47, 133255932Salfred MLX4_CMD_SET_MCAST_FLTR = 0x48, 134255932Salfred MLX4_CMD_DUMP_ETH_STATS = 0x49, 135255932Salfred 136255932Salfred /* Communication channel commands */ 137255932Salfred MLX4_CMD_ARM_COMM_CHANNEL = 0x57, 138255932Salfred MLX4_CMD_GEN_EQE = 0x58, 139255932Salfred 140255932Salfred /* virtual commands */ 141255932Salfred MLX4_CMD_ALLOC_RES = 0xf00, 142255932Salfred MLX4_CMD_FREE_RES = 0xf01, 143255932Salfred MLX4_CMD_MCAST_ATTACH = 0xf05, 144255932Salfred MLX4_CMD_UCAST_ATTACH = 0xf06, 145255932Salfred MLX4_CMD_PROMISC = 0xf08, 146255932Salfred MLX4_CMD_QUERY_FUNC_CAP = 0xf0a, 147255932Salfred MLX4_CMD_QP_ATTACH = 0xf0b, 148255932Salfred 149219820Sjeff /* debug commands */ 150219820Sjeff MLX4_CMD_QUERY_DEBUG_MSG = 0x2a, 151219820Sjeff MLX4_CMD_SET_DEBUG_MSG = 0x2b, 152219820Sjeff 153219820Sjeff /* statistics commands */ 154219820Sjeff MLX4_CMD_QUERY_IF_STAT = 0X54, 155219820Sjeff MLX4_CMD_SET_IF_STAT = 0X55, 156255932Salfred 157255932Salfred /* register/delete flow steering network rules */ 158255932Salfred MLX4_QP_FLOW_STEERING_ATTACH = 0x65, 159255932Salfred MLX4_QP_FLOW_STEERING_DETACH = 0x66, 160255932Salfred MLX4_FLOW_STEERING_IB_UC_QP_RANGE = 0x64, 161219820Sjeff}; 162219820Sjeff 163219820Sjeffenum { 164255932Salfred MLX4_CMD_TIME_CLASS_A = 60000, 165255932Salfred MLX4_CMD_TIME_CLASS_B = 60000, 166255932Salfred MLX4_CMD_TIME_CLASS_C = 60000, 167219820Sjeff}; 168219820Sjeff 169219820Sjeffenum { 170255932Salfred MLX4_MAILBOX_SIZE = 4096, 171255932Salfred MLX4_ACCESS_MEM_ALIGN = 256, 172219820Sjeff}; 173219820Sjeff 174219820Sjeffenum { 175219820Sjeff /* set port opcode modifiers */ 176272407Shselasky MLX4_SET_PORT_GENERAL = 0x0, 177272407Shselasky MLX4_SET_PORT_RQP_CALC = 0x1, 178272407Shselasky MLX4_SET_PORT_MAC_TABLE = 0x2, 179272407Shselasky MLX4_SET_PORT_VLAN_TABLE = 0x3, 180272407Shselasky MLX4_SET_PORT_PRIO_MAP = 0x4, 181272407Shselasky MLX4_SET_PORT_GID_TABLE = 0x5, 182272407Shselasky MLX4_SET_PORT_PRIO2TC = 0x8, 183272407Shselasky MLX4_SET_PORT_SCHEDULER = 0x9 184219820Sjeff}; 185219820Sjeff 186255932Salfredenum { 187255932Salfred MLX4_CMD_WRAPPED, 188255932Salfred MLX4_CMD_NATIVE 189255932Salfred}; 190255932Salfred 191219820Sjeffstruct mlx4_dev; 192219820Sjeff 193219820Sjeffstruct mlx4_cmd_mailbox { 194219820Sjeff void *buf; 195219820Sjeff dma_addr_t dma; 196219820Sjeff}; 197219820Sjeff 198219820Sjeffint __mlx4_cmd(struct mlx4_dev *dev, u64 in_param, u64 *out_param, 199219820Sjeff int out_is_imm, u32 in_modifier, u8 op_modifier, 200255932Salfred u16 op, unsigned long timeout, int native); 201219820Sjeff 202219820Sjeff/* Invoke a command with no output parameter */ 203219820Sjeffstatic inline int mlx4_cmd(struct mlx4_dev *dev, u64 in_param, u32 in_modifier, 204255932Salfred u8 op_modifier, u16 op, unsigned long timeout, 205255932Salfred int native) 206219820Sjeff{ 207219820Sjeff return __mlx4_cmd(dev, in_param, NULL, 0, in_modifier, 208255932Salfred op_modifier, op, timeout, native); 209219820Sjeff} 210219820Sjeff 211219820Sjeff/* Invoke a command with an output mailbox */ 212219820Sjeffstatic inline int mlx4_cmd_box(struct mlx4_dev *dev, u64 in_param, u64 out_param, 213219820Sjeff u32 in_modifier, u8 op_modifier, u16 op, 214255932Salfred unsigned long timeout, int native) 215219820Sjeff{ 216219820Sjeff return __mlx4_cmd(dev, in_param, &out_param, 0, in_modifier, 217255932Salfred op_modifier, op, timeout, native); 218219820Sjeff} 219219820Sjeff 220219820Sjeff/* 221219820Sjeff * Invoke a command with an immediate output parameter (and copy the 222219820Sjeff * output into the caller's out_param pointer after the command 223219820Sjeff * executes). 224219820Sjeff */ 225219820Sjeffstatic inline int mlx4_cmd_imm(struct mlx4_dev *dev, u64 in_param, u64 *out_param, 226219820Sjeff u32 in_modifier, u8 op_modifier, u16 op, 227255932Salfred unsigned long timeout, int native) 228219820Sjeff{ 229219820Sjeff return __mlx4_cmd(dev, in_param, out_param, 1, in_modifier, 230255932Salfred op_modifier, op, timeout, native); 231219820Sjeff} 232219820Sjeff 233219820Sjeffstruct mlx4_cmd_mailbox *mlx4_alloc_cmd_mailbox(struct mlx4_dev *dev); 234219820Sjeffvoid mlx4_free_cmd_mailbox(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox); 235219820Sjeff 236255932Salfredu32 mlx4_comm_get_version(void); 237255932Salfredint mlx4_set_vf_mac(struct mlx4_dev *dev, int port, int vf, u8 *mac); 238255932Salfredint mlx4_set_vf_vlan(struct mlx4_dev *dev, int port, int vf, u16 vlan, u8 qos); 239255932Salfredint mlx4_set_vf_spoofchk(struct mlx4_dev *dev, int port, int vf, bool setting); 240272407Shselaskyint mlx4_set_vf_link_state(struct mlx4_dev *dev, int port, int vf, int link_state); 241272407Shselaskyint mlx4_get_vf_link_state(struct mlx4_dev *dev, int port, int vf); 242272407Shselasky/* 243272407Shselasky * mlx4_get_slave_default_vlan - 244272407Shselasky * retrun true if VST ( default vlan) 245272407Shselasky * if VST will fill vlan & qos (if not NULL) 246272407Shselasky */ 247272407Shselaskybool mlx4_get_slave_default_vlan(struct mlx4_dev *dev, int port, int slave, u16 *vlan, u8 *qos); 248255932Salfred 249272407Shselaskyenum { 250272407Shselasky IFLA_VF_LINK_STATE_AUTO, /* link state of the uplink */ 251272407Shselasky IFLA_VF_LINK_STATE_ENABLE, /* link always up */ 252272407Shselasky IFLA_VF_LINK_STATE_DISABLE, /* link always down */ 253272407Shselasky __IFLA_VF_LINK_STATE_MAX, 254272407Shselasky}; 255255932Salfred 256255932Salfred#define MLX4_COMM_GET_IF_REV(cmd_chan_ver) (u8)((cmd_chan_ver) >> 8) 257255932Salfred 258219820Sjeff#endif /* MLX4_CMD_H */ 259