io.h revision 271127 
1/*-
2 * Copyright (c) 2010 Isilon Systems, Inc.
3 * Copyright (c) 2010 iX Systems, Inc.
4 * Copyright (c) 2010 Panasas, Inc.
5 * Copyright (c) 2013, 2014 Mellanox Technologies, Ltd.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice unmodified, this list of conditions, and the following
13 *    disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30#ifndef	_LINUX_IO_H_
31#define	_LINUX_IO_H_
32
33#include <machine/vm.h>
34
35static inline uint32_t
36__raw_readl(const volatile void *addr)
37{
38	return *(const volatile uint32_t *)addr;
39}
40
41static inline void
42__raw_writel(uint32_t b, volatile void *addr)
43{
44	*(volatile uint32_t *)addr = b;
45}
46
47static inline uint64_t
48__raw_readq(const volatile void *addr)
49{
50	return *(const volatile uint64_t *)addr;
51}
52
53static inline void
54__raw_writeq(uint64_t b, volatile void *addr)
55{
56	*(volatile uint64_t *)addr = b;
57}
58
59/*
60 * XXX This is all x86 specific.  It should be bus space access.
61 */
62#define mmiowb()
63
64#undef writel
65static inline void
66writel(uint32_t b, void *addr)
67{
68        *(volatile uint32_t *)addr = b;
69}
70
71#undef writeq
72static inline void
73writeq(uint64_t b, void *addr)
74{
75        *(volatile uint64_t *)addr = b;
76}
77
78#undef writeb
79static inline void
80writeb(uint8_t b, void *addr)
81{
82        *(volatile uint8_t *)addr = b;
83}
84
85#undef writew
86static inline void
87writew(uint16_t b, void *addr)
88{
89        *(volatile uint16_t *)addr = b;
90}
91
92void *_ioremap_attr(vm_paddr_t phys_addr, unsigned long size, int attr);
93#define	ioremap_nocache(addr, size)					\
94    _ioremap_attr((addr), (size), VM_MEMATTR_UNCACHEABLE)
95#define	ioremap_wc(addr, size)						\
96    _ioremap_attr((addr), (size), VM_MEMATTR_WRITE_COMBINING)
97#define	ioremap	ioremap_nocache
98void iounmap(void *addr);
99
100#define	memset_io(a, b, c)	memset((a), (b), (c))
101#define	memcpy_fromio(a, b, c)	memcpy((a), (b), (c))
102#define	memcpy_toio(a, b, c)	memcpy((a), (b), (c))
103
104static inline void
105__iowrite64_copy(void *to, void *from, size_t count)
106{
107#ifdef __LP64__
108	uint64_t *src;
109	uint64_t *dst;
110	int i;
111
112	for (i = 0, src = from, dst = to; i < count; i++, src++, dst++)
113		__raw_writeq(*src, dst);
114#else
115	uint32_t *src;
116	uint32_t *dst;
117	int i;
118
119	count *= 2;
120	for (i = 0, src = from, dst = to; i < count; i++, src++, dst++)
121		__raw_writel(*src, dst);
122#endif
123}
124
125
126#endif	/* _LINUX_IO_H_ */
127