pm_machdep.c revision 293581
1/*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 * 4. Neither the name of the University nor the names of its contributors
18 *    may be used to endorse or promote products derived from this software
19 *    without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 *	from: @(#)machdep.c	7.4 (Berkeley) 6/3/91
34 *	from: src/sys/i386/i386/machdep.c,v 1.385.2.3 2000/05/10 02:04:46 obrien
35 *	JNPR: pm_machdep.c,v 1.9.2.1 2007/08/16 15:59:10 girish
36 */
37
38#include <sys/cdefs.h>
39__FBSDID("$FreeBSD: stable/10/sys/mips/mips/pm_machdep.c 293581 2016-01-09 17:39:41Z dchagin $");
40
41#include "opt_compat.h"
42
43#include <sys/types.h>
44#include <sys/param.h>
45#include <sys/systm.h>
46#include <sys/sysent.h>
47#include <sys/proc.h>
48#include <sys/signalvar.h>
49#include <sys/exec.h>
50#include <sys/imgact.h>
51#include <sys/ucontext.h>
52#include <sys/lock.h>
53#include <sys/syscallsubr.h>
54#include <sys/sysproto.h>
55#include <sys/ptrace.h>
56#include <sys/syslog.h>
57#include <vm/vm.h>
58#include <vm/pmap.h>
59#include <vm/vm_map.h>
60#include <vm/vm_extern.h>
61#include <sys/user.h>
62#include <sys/uio.h>
63#include <machine/reg.h>
64#include <machine/md_var.h>
65#include <machine/sigframe.h>
66#include <machine/vmparam.h>
67#include <sys/vnode.h>
68#include <fs/pseudofs/pseudofs.h>
69#include <fs/procfs/procfs.h>
70
71#define	UCONTEXT_MAGIC	0xACEDBADE
72
73/*
74 * Send an interrupt to process.
75 *
76 * Stack is set up to allow sigcode stored
77 * at top to call routine, followed by kcall
78 * to sigreturn routine below.	After sigreturn
79 * resets the signal mask, the stack, and the
80 * frame pointer, it returns to the user
81 * specified pc, psl.
82 */
83void
84sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
85{
86	struct proc *p;
87	struct thread *td;
88	struct trapframe *regs;
89	struct sigacts *psp;
90	struct sigframe sf, *sfp;
91	int sig;
92	int oonstack;
93
94	td = curthread;
95	p = td->td_proc;
96	PROC_LOCK_ASSERT(p, MA_OWNED);
97	sig = ksi->ksi_signo;
98	psp = p->p_sigacts;
99	mtx_assert(&psp->ps_mtx, MA_OWNED);
100
101	regs = td->td_frame;
102	oonstack = sigonstack(regs->sp);
103
104	/* save user context */
105	bzero(&sf, sizeof(struct sigframe));
106	sf.sf_uc.uc_sigmask = *mask;
107	sf.sf_uc.uc_stack = td->td_sigstk;
108	sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
109	sf.sf_uc.uc_mcontext.mc_pc = regs->pc;
110	sf.sf_uc.uc_mcontext.mullo = regs->mullo;
111	sf.sf_uc.uc_mcontext.mulhi = regs->mulhi;
112	sf.sf_uc.uc_mcontext.mc_tls = td->td_md.md_tls;
113	sf.sf_uc.uc_mcontext.mc_regs[0] = UCONTEXT_MAGIC;  /* magic number */
114	bcopy((void *)&regs->ast, (void *)&sf.sf_uc.uc_mcontext.mc_regs[1],
115	    sizeof(sf.sf_uc.uc_mcontext.mc_regs) - sizeof(register_t));
116	sf.sf_uc.uc_mcontext.mc_fpused = td->td_md.md_flags & MDTD_FPUSED;
117	if (sf.sf_uc.uc_mcontext.mc_fpused) {
118		/* if FPU has current state, save it first */
119		if (td == PCPU_GET(fpcurthread))
120			MipsSaveCurFPState(td);
121		bcopy((void *)&td->td_frame->f0,
122		    (void *)sf.sf_uc.uc_mcontext.mc_fpregs,
123		    sizeof(sf.sf_uc.uc_mcontext.mc_fpregs));
124	}
125
126	/* Allocate and validate space for the signal handler context. */
127	if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
128	    SIGISMEMBER(psp->ps_sigonstack, sig)) {
129		sfp = (struct sigframe *)((vm_offset_t)(td->td_sigstk.ss_sp +
130		    td->td_sigstk.ss_size - sizeof(struct sigframe))
131		    & ~(sizeof(__int64_t) - 1));
132	} else
133		sfp = (struct sigframe *)((vm_offset_t)(regs->sp -
134		    sizeof(struct sigframe)) & ~(sizeof(__int64_t) - 1));
135
136	/* Build the argument list for the signal handler. */
137	regs->a0 = sig;
138	regs->a2 = (register_t)(intptr_t)&sfp->sf_uc;
139	if (SIGISMEMBER(psp->ps_siginfo, sig)) {
140		/* Signal handler installed with SA_SIGINFO. */
141		regs->a1 = (register_t)(intptr_t)&sfp->sf_si;
142		/* sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; */
143
144		/* fill siginfo structure */
145		sf.sf_si.si_signo = sig;
146		sf.sf_si.si_code = ksi->ksi_code;
147		sf.sf_si.si_addr = (void*)(intptr_t)regs->badvaddr;
148	} else {
149		/* Old FreeBSD-style arguments. */
150		regs->a1 = ksi->ksi_code;
151		regs->a3 = regs->badvaddr;
152		/* sf.sf_ahu.sf_handler = catcher; */
153	}
154
155	mtx_unlock(&psp->ps_mtx);
156	PROC_UNLOCK(p);
157
158	/*
159	 * Copy the sigframe out to the user's stack.
160	 */
161	if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
162		/*
163		 * Something is wrong with the stack pointer.
164		 * ...Kill the process.
165		 */
166		PROC_LOCK(p);
167		sigexit(td, SIGILL);
168	}
169
170	regs->pc = (register_t)(intptr_t)catcher;
171	regs->t9 = (register_t)(intptr_t)catcher;
172	regs->sp = (register_t)(intptr_t)sfp;
173	/*
174	 * Signal trampoline code is at base of user stack.
175	 */
176	regs->ra = (register_t)(intptr_t)PS_STRINGS - *(p->p_sysent->sv_szsigcode);
177	PROC_LOCK(p);
178	mtx_lock(&psp->ps_mtx);
179}
180
181#ifdef GONE_IN_7
182/*
183 * Build siginfo_t for SA thread
184 */
185void
186cpu_thread_siginfo(int sig, u_long code, siginfo_t *si)
187{
188	struct proc *p;
189	struct thread *td;
190
191	td = curthread;
192	p = td->td_proc;
193	PROC_LOCK_ASSERT(p, MA_OWNED);
194
195	bzero(si, sizeof(*si));
196	si->si_signo = sig;
197	si->si_code = code;
198	/* XXXKSE fill other fields */
199}
200#endif
201
202/*
203 * System call to cleanup state after a signal
204 * has been taken.  Reset signal mask and
205 * stack state from context left by sendsig (above).
206 * Return to previous pc as specified by
207 * context left by sendsig.
208 */
209int
210sys_sigreturn(struct thread *td, struct sigreturn_args *uap)
211{
212	ucontext_t uc;
213	int error;
214
215	error = copyin(uap->sigcntxp, &uc, sizeof(uc));
216	if (error != 0)
217	    return (error);
218
219	error = set_mcontext(td, &uc.uc_mcontext);
220	if (error != 0)
221		return (error);
222
223	kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0);
224
225	return (EJUSTRETURN);
226}
227
228int
229ptrace_set_pc(struct thread *td, unsigned long addr)
230{
231	td->td_frame->pc = (register_t) addr;
232	return 0;
233}
234
235static int
236ptrace_read_int(struct thread *td, off_t addr, int *v)
237{
238	struct iovec iov;
239	struct uio uio;
240
241	PROC_LOCK_ASSERT(td->td_proc, MA_NOTOWNED);
242	iov.iov_base = (caddr_t) v;
243	iov.iov_len = sizeof(int);
244	uio.uio_iov = &iov;
245	uio.uio_iovcnt = 1;
246	uio.uio_offset = (off_t)addr;
247	uio.uio_resid = sizeof(int);
248	uio.uio_segflg = UIO_SYSSPACE;
249	uio.uio_rw = UIO_READ;
250	uio.uio_td = td;
251	return proc_rwmem(td->td_proc, &uio);
252}
253
254static int
255ptrace_write_int(struct thread *td, off_t addr, int v)
256{
257	struct iovec iov;
258	struct uio uio;
259
260	PROC_LOCK_ASSERT(td->td_proc, MA_NOTOWNED);
261	iov.iov_base = (caddr_t) &v;
262	iov.iov_len = sizeof(int);
263	uio.uio_iov = &iov;
264	uio.uio_iovcnt = 1;
265	uio.uio_offset = (off_t)addr;
266	uio.uio_resid = sizeof(int);
267	uio.uio_segflg = UIO_SYSSPACE;
268	uio.uio_rw = UIO_WRITE;
269	uio.uio_td = td;
270	return proc_rwmem(td->td_proc, &uio);
271}
272
273int
274ptrace_single_step(struct thread *td)
275{
276	unsigned va;
277	struct trapframe *locr0 = td->td_frame;
278	int i;
279	int bpinstr = MIPS_BREAK_SSTEP;
280	int curinstr;
281	struct proc *p;
282
283	p = td->td_proc;
284	PROC_UNLOCK(p);
285	/*
286	 * Fetch what's at the current location.
287	 */
288	ptrace_read_int(td,  (off_t)locr0->pc, &curinstr);
289
290	/* compute next address after current location */
291	if(curinstr != 0) {
292		va = MipsEmulateBranch(locr0, locr0->pc, locr0->fsr,
293		    (uintptr_t)&curinstr);
294	} else {
295		va = locr0->pc + 4;
296	}
297	if (td->td_md.md_ss_addr) {
298		printf("SS %s (%d): breakpoint already set at %x (va %x)\n",
299		    p->p_comm, p->p_pid, td->td_md.md_ss_addr, va); /* XXX */
300		return (EFAULT);
301	}
302	td->td_md.md_ss_addr = va;
303	/*
304	 * Fetch what's at the current location.
305	 */
306	ptrace_read_int(td, (off_t)va, &td->td_md.md_ss_instr);
307
308	/*
309	 * Store breakpoint instruction at the "next" location now.
310	 */
311	i = ptrace_write_int (td, va, bpinstr);
312
313	/*
314	 * The sync'ing of I & D caches is done by procfs_domem()
315	 * through procfs_rwmem().
316	 */
317
318	PROC_LOCK(p);
319	if (i < 0)
320		return (EFAULT);
321#if 0
322	printf("SS %s (%d): breakpoint set at %x: %x (pc %x) br %x\n",
323	    p->p_comm, p->p_pid, p->p_md.md_ss_addr,
324	    p->p_md.md_ss_instr, locr0->pc, curinstr); /* XXX */
325#endif
326	return (0);
327}
328
329
330void
331makectx(struct trapframe *tf, struct pcb *pcb)
332{
333
334	pcb->pcb_regs.ra = tf->ra;
335	pcb->pcb_regs.pc = tf->pc;
336	pcb->pcb_regs.sp = tf->sp;
337}
338
339int
340fill_regs(struct thread *td, struct reg *regs)
341{
342	memcpy(regs, td->td_frame, sizeof(struct reg));
343	return (0);
344}
345
346int
347set_regs(struct thread *td, struct reg *regs)
348{
349	struct trapframe *f;
350	register_t sr;
351
352	f = (struct trapframe *) td->td_frame;
353	/*
354	 * Don't allow the user to change SR
355	 */
356	sr = f->sr;
357	memcpy(td->td_frame, regs, sizeof(struct reg));
358	f->sr = sr;
359	return (0);
360}
361
362int
363get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
364{
365	struct trapframe *tp;
366
367	tp = td->td_frame;
368	PROC_LOCK(curthread->td_proc);
369	mcp->mc_onstack = sigonstack(tp->sp);
370	PROC_UNLOCK(curthread->td_proc);
371	bcopy((void *)&td->td_frame->zero, (void *)&mcp->mc_regs,
372	    sizeof(mcp->mc_regs));
373
374	mcp->mc_fpused = td->td_md.md_flags & MDTD_FPUSED;
375	if (mcp->mc_fpused) {
376		bcopy((void *)&td->td_frame->f0, (void *)&mcp->mc_fpregs,
377		    sizeof(mcp->mc_fpregs));
378	}
379	if (flags & GET_MC_CLEAR_RET) {
380		mcp->mc_regs[V0] = 0;
381		mcp->mc_regs[V1] = 0;
382		mcp->mc_regs[A3] = 0;
383	}
384
385	mcp->mc_pc = td->td_frame->pc;
386	mcp->mullo = td->td_frame->mullo;
387	mcp->mulhi = td->td_frame->mulhi;
388	mcp->mc_tls = td->td_md.md_tls;
389	return (0);
390}
391
392int
393set_mcontext(struct thread *td, mcontext_t *mcp)
394{
395	struct trapframe *tp;
396
397	tp = td->td_frame;
398	bcopy((void *)&mcp->mc_regs, (void *)&td->td_frame->zero,
399	    sizeof(mcp->mc_regs));
400
401	td->td_md.md_flags = mcp->mc_fpused & MDTD_FPUSED;
402	if (mcp->mc_fpused) {
403		bcopy((void *)&mcp->mc_fpregs, (void *)&td->td_frame->f0,
404		    sizeof(mcp->mc_fpregs));
405	}
406	td->td_frame->pc = mcp->mc_pc;
407	td->td_frame->mullo = mcp->mullo;
408	td->td_frame->mulhi = mcp->mulhi;
409	td->td_md.md_tls = mcp->mc_tls;
410	/* Dont let user to set any bits in Status and casue registers */
411
412	return (0);
413}
414
415int
416fill_fpregs(struct thread *td, struct fpreg *fpregs)
417{
418	if (td == PCPU_GET(fpcurthread))
419		MipsSaveCurFPState(td);
420	memcpy(fpregs, &td->td_frame->f0, sizeof(struct fpreg));
421	return 0;
422}
423
424int
425set_fpregs(struct thread *td, struct fpreg *fpregs)
426{
427	if (PCPU_GET(fpcurthread) == td)
428		PCPU_SET(fpcurthread, (struct thread *)0);
429	memcpy(&td->td_frame->f0, fpregs, sizeof(struct fpreg));
430	return 0;
431}
432
433
434/*
435 * Clear registers on exec
436 * $sp is set to the stack pointer passed in.  $pc is set to the entry
437 * point given by the exec_package passed in, as is $t9 (used for PIC
438 * code by the MIPS elf abi).
439 */
440void
441exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
442{
443
444	bzero((caddr_t)td->td_frame, sizeof(struct trapframe));
445
446	/*
447	 * The stack pointer has to be aligned to accommodate the largest
448	 * datatype at minimum.  This probably means it should be 16-byte
449	 * aligned, but for now we're 8-byte aligning it.
450	 */
451	td->td_frame->sp = ((register_t) stack) & ~(sizeof(__int64_t) - 1);
452
453	/*
454	 * If we're running o32 or n32 programs but have 64-bit registers,
455	 * GCC may use stack-relative addressing near the top of user
456	 * address space that, due to sign extension, will yield an
457	 * invalid address.  For instance, if sp is 0x7fffff00 then GCC
458	 * might do something like this to load a word from 0x7ffffff0:
459	 *
460	 * 	addu	sp, sp, 32768
461	 * 	lw	t0, -32528(sp)
462	 *
463	 * On systems with 64-bit registers, sp is sign-extended to
464	 * 0xffffffff80007f00 and the load is instead done from
465	 * 0xffffffff7ffffff0.
466	 *
467	 * To prevent this, we subtract 64K from the stack pointer here.
468	 *
469	 * For consistency, we should just always do this unless we're
470	 * running n64 programs.  For now, since we don't support
471	 * COMPAT_FREEBSD32 on n64 kernels, we just do it unless we're
472	 * running n64 kernels.
473	 */
474#if !defined(__mips_n64)
475	td->td_frame->sp -= 65536;
476#endif
477
478	td->td_frame->pc = imgp->entry_addr & ~3;
479	td->td_frame->t9 = imgp->entry_addr & ~3; /* abicall req */
480	td->td_frame->sr = MIPS_SR_KSU_USER | MIPS_SR_EXL | MIPS_SR_INT_IE |
481	    (mips_rd_status() & MIPS_SR_INT_MASK);
482#if defined(__mips_n32)
483	td->td_frame->sr |= MIPS_SR_PX;
484#elif  defined(__mips_n64)
485	td->td_frame->sr |= MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX;
486#endif
487	/*
488	 * FREEBSD_DEVELOPERS_FIXME:
489	 * Setup any other CPU-Specific registers (Not MIPS Standard)
490	 * and/or bits in other standard MIPS registers (if CPU-Specific)
491	 *  that are needed.
492	 */
493
494	/*
495	 * Set up arguments for the rtld-capable crt0:
496	 *	a0	stack pointer
497	 *	a1	rtld cleanup (filled in by dynamic loader)
498	 *	a2	rtld object (filled in by dynamic loader)
499	 *	a3	ps_strings
500	 */
501	td->td_frame->a0 = (register_t) stack;
502	td->td_frame->a1 = 0;
503	td->td_frame->a2 = 0;
504	td->td_frame->a3 = (register_t)imgp->ps_strings;
505
506	td->td_md.md_flags &= ~MDTD_FPUSED;
507	if (PCPU_GET(fpcurthread) == td)
508	    PCPU_SET(fpcurthread, (struct thread *)0);
509	td->td_md.md_ss_addr = 0;
510}
511
512int
513ptrace_clear_single_step(struct thread *td)
514{
515	int i;
516	struct proc *p;
517
518	p = td->td_proc;
519	PROC_LOCK_ASSERT(p, MA_OWNED);
520	if (!td->td_md.md_ss_addr)
521		return EINVAL;
522
523	/*
524	 * Restore original instruction and clear BP
525	 */
526	i = ptrace_write_int (td, td->td_md.md_ss_addr, td->td_md.md_ss_instr);
527
528	/* The sync'ing of I & D caches is done by procfs_domem(). */
529
530	if (i < 0) {
531		log(LOG_ERR, "SS %s %d: can't restore instruction at %x: %x\n",
532		    p->p_comm, p->p_pid, td->td_md.md_ss_addr,
533		    td->td_md.md_ss_instr);
534	}
535	td->td_md.md_ss_addr = 0;
536	return 0;
537}
538