apicvar.h revision 262141
1139823Simp/*- 21541Srgrimes * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org> 31541Srgrimes * All rights reserved. 41541Srgrimes * 51541Srgrimes * Redistribution and use in source and binary forms, with or without 61541Srgrimes * modification, are permitted provided that the following conditions 71541Srgrimes * are met: 81541Srgrimes * 1. Redistributions of source code must retain the above copyright 91541Srgrimes * notice, this list of conditions and the following disclaimer. 101541Srgrimes * 2. Redistributions in binary form must reproduce the above copyright 111541Srgrimes * notice, this list of conditions and the following disclaimer in the 121541Srgrimes * documentation and/or other materials provided with the distribution. 131541Srgrimes * 3. Neither the name of the author nor the names of any co-contributors 141541Srgrimes * may be used to endorse or promote products derived from this software 151541Srgrimes * without specific prior written permission. 161541Srgrimes * 171541Srgrimes * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 181541Srgrimes * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 191541Srgrimes * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 201541Srgrimes * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 211541Srgrimes * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 221541Srgrimes * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 231541Srgrimes * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 241541Srgrimes * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 251541Srgrimes * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 261541Srgrimes * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 271541Srgrimes * SUCH DAMAGE. 281541Srgrimes * 291541Srgrimes * $FreeBSD: stable/10/sys/i386/include/apicvar.h 262141 2014-02-18 01:15:32Z jhb $ 3050477Speter */ 311541Srgrimes 321541Srgrimes#ifndef _MACHINE_APICVAR_H_ 332169Spaul#define _MACHINE_APICVAR_H_ 342169Spaul 352169Spaul/* 361541Srgrimes * Local && I/O APIC variable definitions. 371541Srgrimes */ 381541Srgrimes 391541Srgrimes/* 401541Srgrimes * Layout of local APIC interrupt vectors: 411541Srgrimes * 421541Srgrimes * 0xff (255) +-------------+ 431541Srgrimes * | | 15 (Spurious / IPIs / Local Interrupts) 441541Srgrimes * 0xf0 (240) +-------------+ 451541Srgrimes * | | 14 (I/O Interrupts / Timer) 461541Srgrimes * 0xe0 (224) +-------------+ 471541Srgrimes * | | 13 (I/O Interrupts) 481541Srgrimes * 0xd0 (208) +-------------+ 491541Srgrimes * | | 12 (I/O Interrupts) 501541Srgrimes * 0xc0 (192) +-------------+ 511541Srgrimes * | | 11 (I/O Interrupts) 521541Srgrimes * 0xb0 (176) +-------------+ 531541Srgrimes * | | 10 (I/O Interrupts) 541541Srgrimes * 0xa0 (160) +-------------+ 551541Srgrimes * | | 9 (I/O Interrupts) 561541Srgrimes * 0x90 (144) +-------------+ 571541Srgrimes * | | 8 (I/O Interrupts / System Calls) 581541Srgrimes * 0x80 (128) +-------------+ 591541Srgrimes * | | 7 (I/O Interrupts) 601541Srgrimes * 0x70 (112) +-------------+ 611541Srgrimes * | | 6 (I/O Interrupts) 621541Srgrimes * 0x60 (96) +-------------+ 631541Srgrimes * | | 5 (I/O Interrupts) 641541Srgrimes * 0x50 (80) +-------------+ 651541Srgrimes * | | 4 (I/O Interrupts) 661541Srgrimes * 0x40 (64) +-------------+ 671541Srgrimes * | | 3 (I/O Interrupts) 681541Srgrimes * 0x30 (48) +-------------+ 691541Srgrimes * | | 2 (ATPIC Interrupts) 701541Srgrimes * 0x20 (32) +-------------+ 711541Srgrimes * | | 1 (Exceptions, traps, faults, etc.) 721541Srgrimes * 0x10 (16) +-------------+ 731541Srgrimes * | | 0 (Exceptions, traps, faults, etc.) 741541Srgrimes * 0x00 (0) +-------------+ 7550673Sjlemon * 761541Srgrimes * Note: 0x80 needs to be handled specially and not allocated to an 771541Srgrimes * I/O device! 7850673Sjlemon */ 7950673Sjlemon 801541Srgrimes#define MAX_APIC_ID 0xfe 8150673Sjlemon#define APIC_ID_ALL 0xff 8250673Sjlemon 831541Srgrimes/* I/O Interrupts are used for external devices such as ISA, PCI, etc. */ 8450673Sjlemon#define APIC_IO_INTS (IDT_IO_INTS + 16) 8550673Sjlemon#define APIC_NUM_IOINTS 191 8650673Sjlemon 871541Srgrimes/* The timer interrupt is used for clock handling and drives hardclock, etc. */ 881541Srgrimes#define APIC_TIMER_INT (APIC_IO_INTS + APIC_NUM_IOINTS) 89167036Smohans 90167036Smohans/* 91100270Sdillon ********************* !!! WARNING !!! ****************************** 92100270Sdillon * Each local apic has an interrupt receive fifo that is two entries deep 93100335Sdillon * for each interrupt priority class (higher 4 bits of interrupt vector). 94100335Sdillon * Once the fifo is full the APIC can no longer receive interrupts for this 95100335Sdillon * class and sending IPIs from other CPUs will be blocked. 96100335Sdillon * To avoid deadlocks there should be no more than two IPI interrupts 97100335Sdillon * pending at the same time. 98100335Sdillon * Currently this is guaranteed by dividing the IPIs in two groups that have 99100335Sdillon * each at most one IPI interrupt pending. The first group is protected by the 100100335Sdillon * smp_ipi_mtx and waits for the completion of the IPI (Only one IPI user 101100335Sdillon * at a time) The second group uses a single interrupt and a bitmap to avoid 102133874Srwatson * redundant IPI interrupts. 103100335Sdillon */ 104100335Sdillon 105100335Sdillon/* Interrupts for local APIC LVT entries other than the timer. */ 106100335Sdillon#define APIC_LOCAL_INTS 240 107100335Sdillon#define APIC_ERROR_INT APIC_LOCAL_INTS 108100335Sdillon#define APIC_THERMAL_INT (APIC_LOCAL_INTS + 1) 109100335Sdillon#define APIC_CMC_INT (APIC_LOCAL_INTS + 2) 110100270Sdillon#define APIC_IPI_INTS (APIC_LOCAL_INTS + 3) 111171677Speter 112100335Sdillon#define IPI_RENDEZVOUS (APIC_IPI_INTS) /* Inter-CPU rendezvous. */ 11350673Sjlemon#define IPI_INVLTLB (APIC_IPI_INTS + 1) /* TLB Shootdown IPIs */ 1141541Srgrimes#define IPI_INVLPG (APIC_IPI_INTS + 2) 1156247Swollman#define IPI_INVLRNG (APIC_IPI_INTS + 3) 1166247Swollman#define IPI_INVLCACHE (APIC_IPI_INTS + 4) 1171541Srgrimes#define IPI_LAZYPMAP (APIC_IPI_INTS + 5) /* Lazy pmap release. */ 1181541Srgrimes/* Vector to handle bitmap based IPIs */ 1191541Srgrimes#define IPI_BITMAP_VECTOR (APIC_IPI_INTS + 6) 1201541Srgrimes 12154018Sjlemon/* IPIs handled by IPI_BITMAPED_VECTOR (XXX ups is there a better place?) */ 12250673Sjlemon#define IPI_AST 0 /* Generate software trap. */ 1231541Srgrimes#define IPI_PREEMPT 1 124101975Salfred#define IPI_HARDCLOCK 2 1251541Srgrimes#define IPI_BITMAP_LAST IPI_HARDCLOCK 1261541Srgrimes#define IPI_IS_BITMAPED(x) ((x) <= IPI_BITMAP_LAST) 1271541Srgrimes 128168621Sru#define IPI_STOP (APIC_IPI_INTS + 7) /* Stop CPU until restarted. */ 129168621Sru#define IPI_SUSPEND (APIC_IPI_INTS + 8) /* Suspend CPU until restarted. */ 130168621Sru#define IPI_STOP_HARD (APIC_IPI_INTS + 9) /* Stop CPU with a NMI. */ 131168621Sru 132168621Sru/* 133168621Sru * The spurious interrupt can share the priority class with the IPIs since 134168621Sru * it is not a normal interrupt. (Does not use the APIC's interrupt fifo) 135168621Sru */ 136168621Sru#define APIC_SPURIOUS_INT 255 137168621Sru 138168621Sru#ifndef LOCORE 139168621Sru 140168621Sru#define APIC_IPI_DEST_SELF -1 141197244Ssilby#define APIC_IPI_DEST_ALL -2 142197244Ssilby#define APIC_IPI_DEST_OTHERS -3 143172309Ssilby 144172309Ssilby#define APIC_BUS_UNKNOWN -1 145172309Ssilby#define APIC_BUS_ISA 0 146172309Ssilby#define APIC_BUS_EISA 1 147172309Ssilby#define APIC_BUS_PCI 2 148172309Ssilby#define APIC_BUS_MAX APIC_BUS_PCI 149172309Ssilby 150168615Sandre/* 151168615Sandre * An APIC enumerator is a psuedo bus driver that enumerates APIC's including 152168615Sandre * CPU's and I/O APIC's. 153168615Sandre */ 154168615Sandrestruct apic_enumerator { 155168615Sandre const char *apic_name; 156231025Sglebius int (*apic_probe)(void); 157231025Sglebius int (*apic_probe_cpus)(void); 158231025Sglebius int (*apic_setup_local)(void); 159231025Sglebius int (*apic_setup_io)(void); 160231025Sglebius SLIST_ENTRY(apic_enumerator) apic_next; 161231025Sglebius}; 16218280Spst 1631541Srgrimesinthand_t 16450673Sjlemon IDTVEC(apic_isr1), IDTVEC(apic_isr2), IDTVEC(apic_isr3), 165231025Sglebius IDTVEC(apic_isr4), IDTVEC(apic_isr5), IDTVEC(apic_isr6), 16650673Sjlemon IDTVEC(apic_isr7), IDTVEC(cmcint), IDTVEC(errorint), 16750673Sjlemon IDTVEC(spuriousint), IDTVEC(timerint); 168100335Sdillon 169100335Sdillonextern vm_paddr_t lapic_paddr; 17050673Sjlemonextern int apic_cpuids[]; 1711541Srgrimes 1721541Srgrimesu_int apic_alloc_vector(u_int apic_id, u_int irq); 1732169Spaulu_int apic_alloc_vectors(u_int apic_id, u_int *irqs, u_int count, 174167036Smohans u_int align); 175167036Smohansvoid apic_disable_vector(u_int apic_id, u_int vector); 176167036Smohansvoid apic_enable_vector(u_int apic_id, u_int vector); 177112009Sjlemonvoid apic_free_vector(u_int apic_id, u_int vector, u_int irq); 178172074Srwatsonu_int apic_idt_to_irq(u_int apic_id, u_int vector); 179169608Sandrevoid apic_register_enumerator(struct apic_enumerator *enumerator); 180169608Sandreu_int apic_cpuid(u_int apic_id); 181172074Srwatsonvoid *ioapic_create(vm_paddr_t addr, int32_t apic_id, int intbase); 182172074Srwatsonint ioapic_disable_pin(void *cookie, u_int pin); 183172074Srwatsonint ioapic_get_vector(void *cookie, u_int pin); 184172074Srwatsonvoid ioapic_register(void *cookie); 185197244Ssilbyint ioapic_remap_vector(void *cookie, u_int pin, int vector); 186197244Ssilbyint ioapic_set_bus(void *cookie, u_int pin, int bus_type); 18750673Sjlemonint ioapic_set_extint(void *cookie, u_int pin); 18855205Speterint ioapic_set_nmi(void *cookie, u_int pin); 18950673Sjlemonint ioapic_set_polarity(void *cookie, u_int pin, enum intr_polarity pol); 19050673Sjlemonint ioapic_set_triggermode(void *cookie, u_int pin, 191 enum intr_trigger trigger); 192int ioapic_set_smi(void *cookie, u_int pin); 193void lapic_create(u_int apic_id, int boot_cpu); 194void lapic_disable(void); 195void lapic_disable_pmc(void); 196void lapic_dump(const char *str); 197void lapic_enable_cmc(void); 198int lapic_enable_pmc(void); 199void lapic_eoi(void); 200int lapic_id(void); 201void lapic_init(vm_paddr_t addr); 202int lapic_intr_pending(u_int vector); 203void lapic_ipi_raw(register_t icrlo, u_int dest); 204void lapic_ipi_vectored(u_int vector, int dest); 205int lapic_ipi_wait(int delay); 206void lapic_handle_cmc(void); 207void lapic_handle_error(void); 208void lapic_handle_intr(int vector, struct trapframe *frame); 209void lapic_handle_timer(struct trapframe *frame); 210void lapic_reenable_pmc(void); 211void lapic_set_logical_id(u_int apic_id, u_int cluster, u_int cluster_id); 212int lapic_set_lvt_mask(u_int apic_id, u_int lvt, u_char masked); 213int lapic_set_lvt_mode(u_int apic_id, u_int lvt, u_int32_t mode); 214int lapic_set_lvt_polarity(u_int apic_id, u_int lvt, 215 enum intr_polarity pol); 216int lapic_set_lvt_triggermode(u_int apic_id, u_int lvt, 217 enum intr_trigger trigger); 218void lapic_set_tpr(u_int vector); 219void lapic_setup(int boot); 220void xen_intr_handle_upcall(struct trapframe *frame); 221 222#endif /* !LOCORE */ 223#endif /* _MACHINE_APICVAR_H_ */ 224