r8a7791-clock.h revision 284090
1239679Srwatson/* 2239679Srwatson * Copyright 2013 Ideas On Board SPRL 3239679Srwatson * 4239679Srwatson * This program is free software; you can redistribute it and/or modify 5239679Srwatson * it under the terms of the GNU General Public License as published by 6239679Srwatson * the Free Software Foundation; either version 2 of the License, or 7239679Srwatson * (at your option) any later version. 8239679Srwatson */ 9239679Srwatson 10239679Srwatson#ifndef __DT_BINDINGS_CLOCK_R8A7791_H__ 11239679Srwatson#define __DT_BINDINGS_CLOCK_R8A7791_H__ 12239679Srwatson 13239679Srwatson/* CPG */ 14239679Srwatson#define R8A7791_CLK_MAIN 0 15239679Srwatson#define R8A7791_CLK_PLL0 1 16239679Srwatson#define R8A7791_CLK_PLL1 2 17239679Srwatson#define R8A7791_CLK_PLL3 3 18239679Srwatson#define R8A7791_CLK_LB 4 19239679Srwatson#define R8A7791_CLK_QSPI 5 20239679Srwatson#define R8A7791_CLK_SDH 6 21239679Srwatson#define R8A7791_CLK_SD0 7 22239679Srwatson#define R8A7791_CLK_Z 8 23239679Srwatson 24239679Srwatson/* MSTP0 */ 25239679Srwatson#define R8A7791_CLK_MSIOF0 0 26239679Srwatson 27239679Srwatson/* MSTP1 */ 28239679Srwatson#define R8A7791_CLK_VCP0 1 29239679Srwatson#define R8A7791_CLK_VPC0 3 30239679Srwatson#define R8A7791_CLK_JPU 6 31239679Srwatson#define R8A7791_CLK_SSP1 9 32239679Srwatson#define R8A7791_CLK_TMU1 11 33239679Srwatson#define R8A7791_CLK_3DG 12 34239679Srwatson#define R8A7791_CLK_2DDMAC 15 35239679Srwatson#define R8A7791_CLK_FDP1_1 18 36239679Srwatson#define R8A7791_CLK_FDP1_0 19 37239679Srwatson#define R8A7791_CLK_TMU3 21 38239679Srwatson#define R8A7791_CLK_TMU2 22 39239679Srwatson#define R8A7791_CLK_CMT0 24 40239679Srwatson#define R8A7791_CLK_TMU0 25 41239679Srwatson#define R8A7791_CLK_VSP1_DU1 27 42239679Srwatson#define R8A7791_CLK_VSP1_DU0 28 43239679Srwatson#define R8A7791_CLK_VSP1_S 31 44239679Srwatson 45239679Srwatson/* MSTP2 */ 46239679Srwatson#define R8A7791_CLK_SCIFA2 2 47239679Srwatson#define R8A7791_CLK_SCIFA1 3 48239679Srwatson#define R8A7791_CLK_SCIFA0 4 49239679Srwatson#define R8A7791_CLK_MSIOF2 5 50239679Srwatson#define R8A7791_CLK_SCIFB0 6 51239679Srwatson#define R8A7791_CLK_SCIFB1 7 52#define R8A7791_CLK_MSIOF1 8 53#define R8A7791_CLK_SCIFB2 16 54#define R8A7791_CLK_SYS_DMAC1 18 55#define R8A7791_CLK_SYS_DMAC0 19 56 57/* MSTP3 */ 58#define R8A7791_CLK_TPU0 4 59#define R8A7791_CLK_SDHI2 11 60#define R8A7791_CLK_SDHI1 12 61#define R8A7791_CLK_SDHI0 14 62#define R8A7791_CLK_MMCIF0 15 63#define R8A7791_CLK_IIC0 18 64#define R8A7791_CLK_PCIEC 19 65#define R8A7791_CLK_IIC1 23 66#define R8A7791_CLK_SSUSB 28 67#define R8A7791_CLK_CMT1 29 68#define R8A7791_CLK_USBDMAC0 30 69#define R8A7791_CLK_USBDMAC1 31 70 71/* MSTP5 */ 72#define R8A7791_CLK_AUDIO_DMAC1 1 73#define R8A7791_CLK_AUDIO_DMAC0 2 74#define R8A7791_CLK_THERMAL 22 75#define R8A7791_CLK_PWM 23 76 77/* MSTP7 */ 78#define R8A7791_CLK_EHCI 3 79#define R8A7791_CLK_HSUSB 4 80#define R8A7791_CLK_HSCIF2 13 81#define R8A7791_CLK_SCIF5 14 82#define R8A7791_CLK_SCIF4 15 83#define R8A7791_CLK_HSCIF1 16 84#define R8A7791_CLK_HSCIF0 17 85#define R8A7791_CLK_SCIF3 18 86#define R8A7791_CLK_SCIF2 19 87#define R8A7791_CLK_SCIF1 20 88#define R8A7791_CLK_SCIF0 21 89#define R8A7791_CLK_DU1 23 90#define R8A7791_CLK_DU0 24 91#define R8A7791_CLK_LVDS0 26 92 93/* MSTP8 */ 94#define R8A7791_CLK_IPMMU_SGX 0 95#define R8A7791_CLK_MLB 2 96#define R8A7791_CLK_VIN2 9 97#define R8A7791_CLK_VIN1 10 98#define R8A7791_CLK_VIN0 11 99#define R8A7791_CLK_ETHER 13 100#define R8A7791_CLK_SATA1 14 101#define R8A7791_CLK_SATA0 15 102 103/* MSTP9 */ 104#define R8A7791_CLK_GPIO7 4 105#define R8A7791_CLK_GPIO6 5 106#define R8A7791_CLK_GPIO5 7 107#define R8A7791_CLK_GPIO4 8 108#define R8A7791_CLK_GPIO3 9 109#define R8A7791_CLK_GPIO2 10 110#define R8A7791_CLK_GPIO1 11 111#define R8A7791_CLK_GPIO0 12 112#define R8A7791_CLK_RCAN1 15 113#define R8A7791_CLK_RCAN0 16 114#define R8A7791_CLK_QSPI_MOD 17 115#define R8A7791_CLK_I2C5 25 116#define R8A7791_CLK_IICDVFS 26 117#define R8A7791_CLK_I2C4 27 118#define R8A7791_CLK_I2C3 28 119#define R8A7791_CLK_I2C2 29 120#define R8A7791_CLK_I2C1 30 121#define R8A7791_CLK_I2C0 31 122 123/* MSTP10 */ 124#define R8A7791_CLK_SSI_ALL 5 125#define R8A7791_CLK_SSI9 6 126#define R8A7791_CLK_SSI8 7 127#define R8A7791_CLK_SSI7 8 128#define R8A7791_CLK_SSI6 9 129#define R8A7791_CLK_SSI5 10 130#define R8A7791_CLK_SSI4 11 131#define R8A7791_CLK_SSI3 12 132#define R8A7791_CLK_SSI2 13 133#define R8A7791_CLK_SSI1 14 134#define R8A7791_CLK_SSI0 15 135#define R8A7791_CLK_SCU_ALL 17 136#define R8A7791_CLK_SCU_DVC1 18 137#define R8A7791_CLK_SCU_DVC0 19 138#define R8A7791_CLK_SCU_SRC9 22 139#define R8A7791_CLK_SCU_SRC8 23 140#define R8A7791_CLK_SCU_SRC7 24 141#define R8A7791_CLK_SCU_SRC6 25 142#define R8A7791_CLK_SCU_SRC5 26 143#define R8A7791_CLK_SCU_SRC4 27 144#define R8A7791_CLK_SCU_SRC3 28 145#define R8A7791_CLK_SCU_SRC2 29 146#define R8A7791_CLK_SCU_SRC1 30 147#define R8A7791_CLK_SCU_SRC0 31 148 149/* MSTP11 */ 150#define R8A7791_CLK_SCIFA3 6 151#define R8A7791_CLK_SCIFA4 7 152#define R8A7791_CLK_SCIFA5 8 153 154#endif /* __DT_BINDINGS_CLOCK_R8A7791_H__ */ 155