r8a7790-clock.h revision 273712 
1/*
2 * Copyright 2013 Ideas On Board SPRL
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10#ifndef __DT_BINDINGS_CLOCK_R8A7790_H__
11#define __DT_BINDINGS_CLOCK_R8A7790_H__
12
13/* CPG */
14#define R8A7790_CLK_MAIN		0
15#define R8A7790_CLK_PLL0		1
16#define R8A7790_CLK_PLL1		2
17#define R8A7790_CLK_PLL3		3
18#define R8A7790_CLK_LB			4
19#define R8A7790_CLK_QSPI		5
20#define R8A7790_CLK_SDH			6
21#define R8A7790_CLK_SD0			7
22#define R8A7790_CLK_SD1			8
23#define R8A7790_CLK_Z			9
24
25/* MSTP0 */
26#define R8A7790_CLK_MSIOF0		0
27
28/* MSTP1 */
29#define R8A7790_CLK_TMU1		11
30#define R8A7790_CLK_TMU3		21
31#define R8A7790_CLK_TMU2		22
32#define R8A7790_CLK_CMT0		24
33#define R8A7790_CLK_TMU0		25
34#define R8A7790_CLK_VSP1_DU1		27
35#define R8A7790_CLK_VSP1_DU0		28
36#define R8A7790_CLK_VSP1_R		30
37#define R8A7790_CLK_VSP1_S		31
38
39/* MSTP2 */
40#define R8A7790_CLK_SCIFA2		2
41#define R8A7790_CLK_SCIFA1		3
42#define R8A7790_CLK_SCIFA0		4
43#define R8A7790_CLK_MSIOF2		5
44#define R8A7790_CLK_SCIFB0		6
45#define R8A7790_CLK_SCIFB1		7
46#define R8A7790_CLK_MSIOF1		8
47#define R8A7790_CLK_MSIOF3		15
48#define R8A7790_CLK_SCIFB2		16
49#define R8A7790_CLK_SYS_DMAC1		18
50#define R8A7790_CLK_SYS_DMAC0		19
51
52/* MSTP3 */
53#define R8A7790_CLK_IIC2		0
54#define R8A7790_CLK_TPU0		4
55#define R8A7790_CLK_MMCIF1		5
56#define R8A7790_CLK_SDHI3		11
57#define R8A7790_CLK_SDHI2		12
58#define R8A7790_CLK_SDHI1		13
59#define R8A7790_CLK_SDHI0		14
60#define R8A7790_CLK_MMCIF0		15
61#define R8A7790_CLK_IIC0		18
62#define R8A7790_CLK_PCIEC		19
63#define R8A7790_CLK_IIC1		23
64#define R8A7790_CLK_SSUSB		28
65#define R8A7790_CLK_CMT1		29
66#define R8A7790_CLK_USBDMAC0		30
67#define R8A7790_CLK_USBDMAC1		31
68
69/* MSTP5 */
70#define R8A7790_CLK_THERMAL		22
71#define R8A7790_CLK_PWM			23
72
73/* MSTP7 */
74#define R8A7790_CLK_EHCI		3
75#define R8A7790_CLK_HSUSB		4
76#define R8A7790_CLK_HSCIF1		16
77#define R8A7790_CLK_HSCIF0		17
78#define R8A7790_CLK_SCIF1		20
79#define R8A7790_CLK_SCIF0		21
80#define R8A7790_CLK_DU2			22
81#define R8A7790_CLK_DU1			23
82#define R8A7790_CLK_DU0			24
83#define R8A7790_CLK_LVDS1		25
84#define R8A7790_CLK_LVDS0		26
85
86/* MSTP8 */
87#define R8A7790_CLK_VIN3		8
88#define R8A7790_CLK_VIN2		9
89#define R8A7790_CLK_VIN1		10
90#define R8A7790_CLK_VIN0		11
91#define R8A7790_CLK_ETHER		13
92#define R8A7790_CLK_SATA1		14
93#define R8A7790_CLK_SATA0		15
94
95/* MSTP9 */
96#define R8A7790_CLK_GPIO5		7
97#define R8A7790_CLK_GPIO4		8
98#define R8A7790_CLK_GPIO3		9
99#define R8A7790_CLK_GPIO2		10
100#define R8A7790_CLK_GPIO1		11
101#define R8A7790_CLK_GPIO0		12
102#define R8A7790_CLK_RCAN1		15
103#define R8A7790_CLK_RCAN0		16
104#define R8A7790_CLK_QSPI_MOD		17
105#define R8A7790_CLK_IICDVFS		26
106#define R8A7790_CLK_I2C3		28
107#define R8A7790_CLK_I2C2		29
108#define R8A7790_CLK_I2C1		30
109#define R8A7790_CLK_I2C0		31
110
111/* MSTP10 */
112#define R8A7790_CLK_SSI_ALL		5
113#define R8A7790_CLK_SSI9		6
114#define R8A7790_CLK_SSI8		7
115#define R8A7790_CLK_SSI7		8
116#define R8A7790_CLK_SSI6		9
117#define R8A7790_CLK_SSI5		10
118#define R8A7790_CLK_SSI4		11
119#define R8A7790_CLK_SSI3		12
120#define R8A7790_CLK_SSI2		13
121#define R8A7790_CLK_SSI1		14
122#define R8A7790_CLK_SSI0		15
123#define R8A7790_CLK_SCU_ALL		17
124#define R8A7790_CLK_SCU_DVC1		18
125#define R8A7790_CLK_SCU_DVC0		19
126#define R8A7790_CLK_SCU_SRC9		22
127#define R8A7790_CLK_SCU_SRC8		23
128#define R8A7790_CLK_SCU_SRC7		24
129#define R8A7790_CLK_SCU_SRC6		25
130#define R8A7790_CLK_SCU_SRC5		26
131#define R8A7790_CLK_SCU_SRC4		27
132#define R8A7790_CLK_SCU_SRC3		28
133#define R8A7790_CLK_SCU_SRC2		29
134#define R8A7790_CLK_SCU_SRC1		30
135#define R8A7790_CLK_SCU_SRC0		31
136
137#endif /* __DT_BINDINGS_CLOCK_R8A7790_H__ */
138