imx6sl-clock.h revision 273712
189857Sobrien/* 289857Sobrien * Copyright 2013 Freescale Semiconductor, Inc. 389857Sobrien * 489857Sobrien * This program is free software; you can redistribute it and/or modify 533965Sjdp * it under the terms of the GNU General Public License version 2 as 678828Sobrien * published by the Free Software Foundation. 7218822Sdim * 833965Sjdp */ 933965Sjdp 1033965Sjdp#ifndef __DT_BINDINGS_CLOCK_IMX6SL_H 11218822Sdim#define __DT_BINDINGS_CLOCK_IMX6SL_H 1233965Sjdp 13218822Sdim#define IMX6SL_CLK_DUMMY 0 14218822Sdim#define IMX6SL_CLK_CKIL 1 15218822Sdim#define IMX6SL_CLK_OSC 2 16218822Sdim#define IMX6SL_CLK_PLL1_SYS 3 1733965Sjdp#define IMX6SL_CLK_PLL2_BUS 4 18218822Sdim#define IMX6SL_CLK_PLL3_USB_OTG 5 19218822Sdim#define IMX6SL_CLK_PLL4_AUDIO 6 20218822Sdim#define IMX6SL_CLK_PLL5_VIDEO 7 21218822Sdim#define IMX6SL_CLK_PLL6_ENET 8 2233965Sjdp#define IMX6SL_CLK_PLL7_USB_HOST 9 23218822Sdim#define IMX6SL_CLK_USBPHY1 10 24218822Sdim#define IMX6SL_CLK_USBPHY2 11 25218822Sdim#define IMX6SL_CLK_USBPHY1_GATE 12 2633965Sjdp#define IMX6SL_CLK_USBPHY2_GATE 13 2733965Sjdp#define IMX6SL_CLK_PLL4_POST_DIV 14 2833965Sjdp#define IMX6SL_CLK_PLL5_POST_DIV 15 29218822Sdim#define IMX6SL_CLK_PLL5_VIDEO_DIV 16 3033965Sjdp#define IMX6SL_CLK_ENET_REF 17 31218822Sdim#define IMX6SL_CLK_PLL2_PFD0 18 32218822Sdim#define IMX6SL_CLK_PLL2_PFD1 19 33218822Sdim#define IMX6SL_CLK_PLL2_PFD2 20 34218822Sdim#define IMX6SL_CLK_PLL3_PFD0 21 35218822Sdim#define IMX6SL_CLK_PLL3_PFD1 22 36218822Sdim#define IMX6SL_CLK_PLL3_PFD2 23 37218822Sdim#define IMX6SL_CLK_PLL3_PFD3 24 38218822Sdim#define IMX6SL_CLK_PLL2_198M 25 39218822Sdim#define IMX6SL_CLK_PLL3_120M 26 40218822Sdim#define IMX6SL_CLK_PLL3_80M 27 41218822Sdim#define IMX6SL_CLK_PLL3_60M 28 42218822Sdim#define IMX6SL_CLK_STEP 29 43218822Sdim#define IMX6SL_CLK_PLL1_SW 30 44218822Sdim#define IMX6SL_CLK_OCRAM_ALT_SEL 31 45218822Sdim#define IMX6SL_CLK_OCRAM_SEL 32 4677298Sobrien#define IMX6SL_CLK_PRE_PERIPH2_SEL 33 47218822Sdim#define IMX6SL_CLK_PRE_PERIPH_SEL 34 4833965Sjdp#define IMX6SL_CLK_PERIPH2_CLK2_SEL 35 4933965Sjdp#define IMX6SL_CLK_PERIPH_CLK2_SEL 36 5033965Sjdp#define IMX6SL_CLK_CSI_SEL 37 5133965Sjdp#define IMX6SL_CLK_LCDIF_AXI_SEL 38 5233965Sjdp#define IMX6SL_CLK_USDHC1_SEL 39 53218822Sdim#define IMX6SL_CLK_USDHC2_SEL 40 5433965Sjdp#define IMX6SL_CLK_USDHC3_SEL 41 5533965Sjdp#define IMX6SL_CLK_USDHC4_SEL 42 5633965Sjdp#define IMX6SL_CLK_SSI1_SEL 43 5733965Sjdp#define IMX6SL_CLK_SSI2_SEL 44 5833965Sjdp#define IMX6SL_CLK_SSI3_SEL 45 5960484Sobrien#define IMX6SL_CLK_PERCLK_SEL 46 6033965Sjdp#define IMX6SL_CLK_PXP_AXI_SEL 47 61218822Sdim#define IMX6SL_CLK_EPDC_AXI_SEL 48 6233965Sjdp#define IMX6SL_CLK_GPU2D_OVG_SEL 49 6333965Sjdp#define IMX6SL_CLK_GPU2D_SEL 50 6433965Sjdp#define IMX6SL_CLK_LCDIF_PIX_SEL 51 6533965Sjdp#define IMX6SL_CLK_EPDC_PIX_SEL 52 6633965Sjdp#define IMX6SL_CLK_SPDIF0_SEL 53 6733965Sjdp#define IMX6SL_CLK_SPDIF1_SEL 54 6833965Sjdp#define IMX6SL_CLK_EXTERN_AUDIO_SEL 55 6933965Sjdp#define IMX6SL_CLK_ECSPI_SEL 56 7033965Sjdp#define IMX6SL_CLK_UART_SEL 57 7133965Sjdp#define IMX6SL_CLK_PERIPH 58 7233965Sjdp#define IMX6SL_CLK_PERIPH2 59 7333965Sjdp#define IMX6SL_CLK_OCRAM_PODF 60 7433965Sjdp#define IMX6SL_CLK_PERIPH_CLK2_PODF 61 7533965Sjdp#define IMX6SL_CLK_PERIPH2_CLK2_PODF 62 7633965Sjdp#define IMX6SL_CLK_IPG 63 77218822Sdim#define IMX6SL_CLK_CSI_PODF 64 78130561Sobrien#define IMX6SL_CLK_LCDIF_AXI_PODF 65 79130561Sobrien#define IMX6SL_CLK_USDHC1_PODF 66 8033965Sjdp#define IMX6SL_CLK_USDHC2_PODF 67 8133965Sjdp#define IMX6SL_CLK_USDHC3_PODF 68 8233965Sjdp#define IMX6SL_CLK_USDHC4_PODF 69 8333965Sjdp#define IMX6SL_CLK_SSI1_PRED 70 84130561Sobrien#define IMX6SL_CLK_SSI1_PODF 71 85130561Sobrien#define IMX6SL_CLK_SSI2_PRED 72 86130561Sobrien#define IMX6SL_CLK_SSI2_PODF 73 87130561Sobrien#define IMX6SL_CLK_SSI3_PRED 74 8833965Sjdp#define IMX6SL_CLK_SSI3_PODF 75 89218822Sdim#define IMX6SL_CLK_PERCLK 76 9033965Sjdp#define IMX6SL_CLK_PXP_AXI_PODF 77 9133965Sjdp#define IMX6SL_CLK_EPDC_AXI_PODF 78 9233965Sjdp#define IMX6SL_CLK_GPU2D_OVG_PODF 79 9333965Sjdp#define IMX6SL_CLK_GPU2D_PODF 80 94218822Sdim#define IMX6SL_CLK_LCDIF_PIX_PRED 81 9533965Sjdp#define IMX6SL_CLK_EPDC_PIX_PRED 82 9633965Sjdp#define IMX6SL_CLK_LCDIF_PIX_PODF 83 9733965Sjdp#define IMX6SL_CLK_EPDC_PIX_PODF 84 9833965Sjdp#define IMX6SL_CLK_SPDIF0_PRED 85 9933965Sjdp#define IMX6SL_CLK_SPDIF0_PODF 86 100218822Sdim#define IMX6SL_CLK_SPDIF1_PRED 87 10138889Sjdp#define IMX6SL_CLK_SPDIF1_PODF 88 102218822Sdim#define IMX6SL_CLK_EXTERN_AUDIO_PRED 89 103218822Sdim#define IMX6SL_CLK_EXTERN_AUDIO_PODF 90 10477298Sobrien#define IMX6SL_CLK_ECSPI_ROOT 91 10560484Sobrien#define IMX6SL_CLK_UART_ROOT 92 10660484Sobrien#define IMX6SL_CLK_AHB 93 10760484Sobrien#define IMX6SL_CLK_MMDC_ROOT 94 10838889Sjdp#define IMX6SL_CLK_ARM 95 10938889Sjdp#define IMX6SL_CLK_ECSPI1 96 11038889Sjdp#define IMX6SL_CLK_ECSPI2 97 11138889Sjdp#define IMX6SL_CLK_ECSPI3 98 11233965Sjdp#define IMX6SL_CLK_ECSPI4 99 11333965Sjdp#define IMX6SL_CLK_EPIT1 100 114218822Sdim#define IMX6SL_CLK_EPIT2 101 11533965Sjdp#define IMX6SL_CLK_EXTERN_AUDIO 102 11633965Sjdp#define IMX6SL_CLK_GPT 103 11733965Sjdp#define IMX6SL_CLK_GPT_SERIAL 104 11833965Sjdp#define IMX6SL_CLK_GPU2D_OVG 105 11933965Sjdp#define IMX6SL_CLK_I2C1 106 12033965Sjdp#define IMX6SL_CLK_I2C2 107 121218822Sdim#define IMX6SL_CLK_I2C3 108 12233965Sjdp#define IMX6SL_CLK_OCOTP 109 12378828Sobrien#define IMX6SL_CLK_CSI 110 124130561Sobrien#define IMX6SL_CLK_PXP_AXI 111 12533965Sjdp#define IMX6SL_CLK_EPDC_AXI 112 12633965Sjdp#define IMX6SL_CLK_LCDIF_AXI 113 12733965Sjdp#define IMX6SL_CLK_LCDIF_PIX 114 12833965Sjdp#define IMX6SL_CLK_EPDC_PIX 115 12933965Sjdp#define IMX6SL_CLK_OCRAM 116 13033965Sjdp#define IMX6SL_CLK_PWM1 117 13133965Sjdp#define IMX6SL_CLK_PWM2 118 13233965Sjdp#define IMX6SL_CLK_PWM3 119 13333965Sjdp#define IMX6SL_CLK_PWM4 120 13433965Sjdp#define IMX6SL_CLK_SDMA 121 13533965Sjdp#define IMX6SL_CLK_SPDIF 122 136130561Sobrien#define IMX6SL_CLK_SSI1 123 137130561Sobrien#define IMX6SL_CLK_SSI2 124 13877298Sobrien#define IMX6SL_CLK_SSI3 125 139130561Sobrien#define IMX6SL_CLK_UART 126 140130561Sobrien#define IMX6SL_CLK_UART_SERIAL 127 14133965Sjdp#define IMX6SL_CLK_USBOH3 128 14233965Sjdp#define IMX6SL_CLK_USDHC1 129 14333965Sjdp#define IMX6SL_CLK_USDHC2 130 14433965Sjdp#define IMX6SL_CLK_USDHC3 131 14533965Sjdp#define IMX6SL_CLK_USDHC4 132 14633965Sjdp#define IMX6SL_CLK_PLL4_AUDIO_DIV 133 14733965Sjdp#define IMX6SL_CLK_SPBA 134 14833965Sjdp#define IMX6SL_CLK_ENET 135 14933965Sjdp#define IMX6SL_CLK_END 136 15033965Sjdp 15133965Sjdp#endif /* __DT_BINDINGS_CLOCK_IMX6SL_H */ 15233965Sjdp