s3c2416.dtsi revision 284090 
1/*
2 * Samsung's S3C2416 SoC device tree source
3 *
4 * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <dt-bindings/clock/s3c2443.h>
12#include "s3c24xx.dtsi"
13#include "s3c2416-pinctrl.dtsi"
14
15/ {
16	model = "Samsung S3C2416 SoC";
17	compatible = "samsung,s3c2416";
18
19	aliases {
20		serial3 = &uart3;
21	};
22
23	cpus {
24		#address-cells = <1>;
25		#size-cells = <0>;
26
27		cpu {
28			compatible = "arm,arm926ejs";
29		};
30	};
31
32	interrupt-controller@4a000000 {
33		compatible = "samsung,s3c2416-irq";
34	};
35
36	clocks: clock-controller@0x4c000000 {
37		compatible = "samsung,s3c2416-clock";
38		reg = <0x4c000000 0x40>;
39		#clock-cells = <1>;
40	};
41
42	pinctrl@56000000 {
43		compatible = "samsung,s3c2416-pinctrl";
44	};
45
46	timer@51000000 {
47		clocks = <&clocks PCLK_PWM>;
48		clock-names = "timers";
49	};
50
51	serial@50000000 {
52		compatible = "samsung,s3c2440-uart";
53		clock-names = "uart", "clk_uart_baud2",
54				"clk_uart_baud3";
55		clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
56				<&clocks SCLK_UART>;
57	};
58
59	serial@50004000 {
60		compatible = "samsung,s3c2440-uart";
61		clock-names = "uart", "clk_uart_baud2",
62				"clk_uart_baud3";
63		clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>,
64				<&clocks SCLK_UART>;
65	};
66
67	serial@50008000 {
68		compatible = "samsung,s3c2440-uart";
69		clock-names = "uart", "clk_uart_baud2",
70				"clk_uart_baud3";
71		clocks = <&clocks PCLK_UART2>, <&clocks PCLK_UART2>,
72				<&clocks SCLK_UART>;
73	};
74
75	uart3: serial@5000C000 {
76		compatible = "samsung,s3c2440-uart";
77		reg = <0x5000C000 0x4000>;
78		interrupts = <1 18 24 4>, <1 18 25 4>;
79		clock-names = "uart", "clk_uart_baud2",
80				"clk_uart_baud3";
81		clocks = <&clocks PCLK_UART3>, <&clocks PCLK_UART3>,
82				<&clocks SCLK_UART>;
83		status = "disabled";
84	};
85
86	sdhci@4AC00000 {
87		compatible = "samsung,s3c6410-sdhci";
88		reg = <0x4AC00000 0x100>;
89		interrupts = <0 0 21 3>;
90		clock-names = "hsmmc", "mmc_busclk.0",
91				"mmc_busclk.2";
92		clocks = <&clocks HCLK_HSMMC0>, <&clocks HCLK_HSMMC0>,
93				<&clocks MUX_HSMMC0>;
94		status = "disabled";
95	};
96
97	sdhci@4A800000 {
98		compatible = "samsung,s3c6410-sdhci";
99		reg = <0x4A800000 0x100>;
100		interrupts = <0 0 20 3>;
101		clock-names = "hsmmc", "mmc_busclk.0",
102				"mmc_busclk.2";
103		clocks = <&clocks HCLK_HSMMC1>, <&clocks HCLK_HSMMC1>,
104				<&clocks MUX_HSMMC1>;
105		status = "disabled";
106	};
107
108	watchdog@53000000 {
109		interrupts = <1 9 27 3>;
110		clocks = <&clocks PCLK_WDT>;
111		clock-names = "watchdog";
112	};
113
114	rtc@57000000 {
115		compatible = "samsung,s3c2416-rtc";
116		clocks = <&clocks PCLK_RTC>;
117		clock-names = "rtc";
118	};
119
120	i2c@54000000 {
121		compatible = "samsung,s3c2440-i2c";
122		clocks = <&clocks PCLK_I2C0>;
123		clock-names = "i2c";
124	};
125};
126