imx6q-tbs2910.dts revision 284090
1/* 2 * Copyright 2014 Soeren Moch <smoch@web.de> 3 * 4 * This file is dual-licensed: you can use it either under the terms 5 * of the GPL or the X11 license, at your option. Note that this dual 6 * licensing only applies to this file, and not this project as a 7 * whole. 8 * 9 * a) This file is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This file is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public 20 * License along with this file; if not, write to the Free 21 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, 22 * MA 02110-1301 USA 23 * 24 * Or, alternatively, 25 * 26 * b) Permission is hereby granted, free of charge, to any person 27 * obtaining a copy of this software and associated documentation 28 * files (the "Software"), to deal in the Software without 29 * restriction, including without limitation the rights to use, 30 * copy, modify, merge, publish, distribute, sublicense, and/or 31 * sell copies of the Software, and to permit persons to whom the 32 * Software is furnished to do so, subject to the following 33 * conditions: 34 * 35 * The above copyright notice and this permission notice shall be 36 * included in all copies or substantial portions of the Software. 37 * 38 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 39 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 40 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 41 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 42 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 43 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 44 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 45 * OTHER DEALINGS IN THE SOFTWARE. 46 */ 47 48/dts-v1/; 49 50#include "imx6q.dtsi" 51#include <dt-bindings/gpio/gpio.h> 52#include <dt-bindings/input/input.h> 53 54/ { 55 model = "TBS2910 Matrix ARM mini PC"; 56 compatible = "tbs,imx6q-tbs2910", "fsl,imx6q"; 57 58 chosen { 59 stdout-path = &uart1; 60 }; 61 62 memory { 63 reg = <0x10000000 0x80000000>; 64 }; 65 66 fan { 67 compatible = "gpio-fan"; 68 pinctrl-names = "default"; 69 pinctrl-0 = <&pinctrl_gpio_fan>; 70 gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>; 71 gpio-fan,speed-map = <0 0 72 3000 1>; 73 }; 74 75 ir_recv { 76 compatible = "gpio-ir-receiver"; 77 gpios = <&gpio3 18 GPIO_ACTIVE_LOW>; 78 pinctrl-names = "default"; 79 pinctrl-0 = <&pinctrl_ir>; 80 }; 81 82 leds { 83 compatible = "gpio-leds"; 84 pinctrl-names = "default"; 85 pinctrl-0 = <&pinctrl_gpio_leds>; 86 87 blue { 88 label = "blue_status_led"; 89 gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; 90 default-state = "keep"; 91 }; 92 }; 93 94 regulators { 95 compatible = "simple-bus"; 96 #address-cells = <1>; 97 #size-cells = <0>; 98 99 reg_2p5v: regulator@0 { 100 compatible = "regulator-fixed"; 101 reg = <0>; 102 regulator-name = "2P5V"; 103 regulator-min-microvolt = <2500000>; 104 regulator-max-microvolt = <2500000>; 105 }; 106 107 reg_3p3v: regulator@1 { 108 compatible = "regulator-fixed"; 109 reg = <1>; 110 regulator-name = "3P3V"; 111 regulator-min-microvolt = <3300000>; 112 regulator-max-microvolt = <3300000>; 113 }; 114 115 reg_5p0v: regulator@2 { 116 compatible = "regulator-fixed"; 117 reg = <2>; 118 regulator-name = "5P0V"; 119 regulator-min-microvolt = <5000000>; 120 regulator-max-microvolt = <5000000>; 121 }; 122 }; 123 124 sound-sgtl5000 { 125 audio-codec = <&sgtl5000>; 126 audio-routing = 127 "MIC_IN", "Mic Jack", 128 "Mic Jack", "Mic Bias", 129 "Headphone Jack", "HP_OUT"; 130 compatible = "fsl,imx-audio-sgtl5000"; 131 model = "On-board Codec"; 132 mux-ext-port = <3>; 133 mux-int-port = <1>; 134 ssi-controller = <&ssi1>; 135 }; 136 137 sound-spdif { 138 compatible = "fsl,imx-audio-spdif"; 139 model = "On-board SPDIF"; 140 spdif-controller = <&spdif>; 141 spdif-out; 142 }; 143}; 144 145&audmux { 146 status = "okay"; 147}; 148 149&fec { 150 pinctrl-names = "default"; 151 pinctrl-0 = <&pinctrl_enet>; 152 phy-mode = "rgmii"; 153 phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>; 154 status = "okay"; 155}; 156 157&hdmi { 158 pinctrl-names = "default"; 159 pinctrl-0 = <&pinctrl_hdmi>; 160 ddc-i2c-bus = <&i2c2>; 161 status = "okay"; 162}; 163 164&i2c1 { 165 clock-frequency = <100000>; 166 pinctrl-names = "default"; 167 pinctrl-0 = <&pinctrl_i2c1>; 168 status = "okay"; 169 170 sgtl5000: sgtl5000@0a { 171 clocks = <&clks 201>; 172 compatible = "fsl,sgtl5000"; 173 pinctrl-names = "default"; 174 pinctrl-0 = <&pinctrl_sgtl5000>; 175 reg = <0x0a>; 176 VDDA-supply = <®_2p5v>; 177 VDDIO-supply = <®_3p3v>; 178 }; 179}; 180 181&i2c2 { 182 clock-frequency = <100000>; 183 pinctrl-names = "default"; 184 pinctrl-0 = <&pinctrl_i2c2>; 185 status = "okay"; 186}; 187 188&i2c3 { 189 clock-frequency = <100000>; 190 pinctrl-names = "default"; 191 pinctrl-0 = <&pinctrl_i2c3>; 192 status = "okay"; 193 194 rtc: ds1307@68 { 195 compatible = "dallas,ds1307"; 196 reg = <0x68>; 197 }; 198}; 199 200&pcie { 201 pinctrl-names = "default"; 202 pinctrl-0 = <&pinctrl_pcie>; 203 reset-gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>; 204 status = "okay"; 205}; 206 207&sata { 208 status = "okay"; 209}; 210 211&snvs_poweroff { 212 status = "okay"; 213}; 214 215&spdif { 216 pinctrl-names = "default"; 217 pinctrl-0 = <&pinctrl_spdif>; 218 status = "okay"; 219}; 220 221&ssi1 { 222 status = "okay"; 223}; 224 225&uart1 { 226 pinctrl-names = "default"; 227 pinctrl-0 = <&pinctrl_uart1>; 228 status = "okay"; 229}; 230 231&uart2 { 232 pinctrl-names = "default"; 233 pinctrl-0 = <&pinctrl_uart2>; 234 status = "okay"; 235}; 236 237&usbh1 { 238 vbus-supply = <®_5p0v>; 239 status = "okay"; 240}; 241 242&usbotg { 243 vbus-supply = <®_5p0v>; 244 pinctrl-names = "default"; 245 pinctrl-0 = <&pinctrl_usbotg>; 246 disable-over-current; 247 status = "okay"; 248}; 249 250&usdhc2 { 251 pinctrl-names = "default"; 252 pinctrl-0 = <&pinctrl_usdhc2>; 253 bus-width = <4>; 254 cd-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; 255 vmmc-supply = <®_3p3v>; 256 status = "okay"; 257}; 258 259&usdhc3 { 260 pinctrl-names = "default"; 261 pinctrl-0 = <&pinctrl_usdhc3>; 262 bus-width = <4>; 263 cd-gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>; 264 wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; 265 vmmc-supply = <®_3p3v>; 266 status = "okay"; 267}; 268 269&usdhc4 { 270 pinctrl-names = "default"; 271 pinctrl-0 = <&pinctrl_usdhc4>; 272 bus-width = <8>; 273 non-removable; 274 no-1-8-v; 275 status = "okay"; 276}; 277 278&iomuxc { 279 imx6q-tbs2910 { 280 pinctrl_enet: enetgrp { 281 fsl,pins = < 282 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 283 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 284 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 285 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 286 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 287 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 288 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 289 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 290 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 291 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 292 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 293 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 294 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 295 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 296 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 297 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 298 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b059 299 >; 300 }; 301 302 pinctrl_hdmi: hdmigrp { 303 fsl,pins = < 304 MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0 305 >; 306 }; 307 308 pinctrl_i2c1: i2c1grp { 309 fsl,pins = < 310 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 311 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 312 >; 313 }; 314 315 pinctrl_i2c2: i2c2grp { 316 fsl,pins = < 317 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 318 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 319 >; 320 }; 321 322 pinctrl_i2c3: i2c3grp { 323 fsl,pins = < 324 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 325 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 326 >; 327 }; 328 329 pinctrl_ir: irgrp { 330 fsl,pins = < 331 MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x17059 332 >; 333 }; 334 335 pinctrl_pcie: pciegrp { 336 fsl,pins = < 337 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x17059 338 >; 339 }; 340 341 pinctrl_sgtl5000: sgtl5000grp { 342 fsl,pins = < 343 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 344 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 345 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 346 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 347 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 348 >; 349 }; 350 351 pinctrl_spdif: spdifgrp { 352 fsl,pins = <MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x13091 353 >; 354 }; 355 356 pinctrl_uart1: uart1grp { 357 fsl,pins = < 358 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 359 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 360 >; 361 }; 362 363 pinctrl_uart2: uart2grp { 364 fsl,pins = < 365 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 366 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 367 >; 368 }; 369 370 pinctrl_usbotg: usbotggrp { 371 fsl,pins = < 372 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 373 >; 374 }; 375 376 pinctrl_usdhc2: usdhc2grp { 377 fsl,pins = < 378 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 379 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 380 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 381 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 382 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 383 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 384 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x17059 385 >; 386 }; 387 388 pinctrl_usdhc3: usdhc3grp { 389 fsl,pins = < 390 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 391 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 392 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 393 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 394 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 395 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 396 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x17059 397 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x17059 398 >; 399 }; 400 401 pinctrl_usdhc4: usdhc4grp { 402 fsl,pins = < 403 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 404 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 405 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 406 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 407 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 408 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 409 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 410 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 411 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 412 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 413 >; 414 }; 415 }; 416 417 gpio_fan { 418 pinctrl_gpio_fan: gpiofangrp { 419 fsl,pins = < 420 MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x130b1 421 >; 422 }; 423 }; 424 425 gpio_leds { 426 pinctrl_gpio_leds: gpioledsgrp { 427 fsl,pins = < 428 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x130b1 429 >; 430 }; 431 }; 432}; 433