imx6q-gw5400-a.dts revision 284090 
1/*
2 * Copyright 2013 Gateworks Corporation
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
13#include <dt-bindings/gpio/gpio.h>
14#include "imx6q.dtsi"
15
16/ {
17	model = "Gateworks Ventana GW5400-A";
18	compatible = "gw,imx6q-gw5400-a", "gw,ventana", "fsl,imx6q";
19
20	/* these are used by bootloader for disabling nodes */
21	aliases {
22		ethernet1 = &eth1;
23		i2c0 = &i2c1;
24		i2c1 = &i2c2;
25		i2c2 = &i2c3;
26		led0 = &led0;
27		led1 = &led1;
28		led2 = &led2;
29		ssi0 = &ssi1;
30		spi0 = &ecspi1;
31		usb0 = &usbh1;
32		usb1 = &usbotg;
33	};
34
35	chosen {
36		bootargs = "console=ttymxc1,115200";
37	};
38
39	leds {
40		compatible = "gpio-leds";
41		pinctrl-names = "default";
42		pinctrl-0 = <&pinctrl_gpio_leds>;
43
44		led0: user1 {
45			label = "user1";
46			gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 -> MX6_PANLEDG */
47			default-state = "on";
48			linux,default-trigger = "heartbeat";
49		};
50
51		led1: user2 {
52			label = "user2";
53			gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; /* 106 -> MX6_PANLEDR */
54			default-state = "off";
55		};
56
57		led2: user3 {
58			label = "user3";
59			gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* 111 -> MX6_LOCLED# */
60			default-state = "off";
61		};
62	};
63
64	memory {
65		reg = <0x10000000 0x40000000>;
66	};
67
68	pps {
69		compatible = "pps-gpio";
70		pinctrl-names = "default";
71		pinctrl-0 = <&pinctrl_gpio_leds>;
72		gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
73		status = "okay";
74	};
75
76	regulators {
77		compatible = "simple-bus";
78		#address-cells = <1>;
79		#size-cells = <0>;
80
81		reg_1p0v: regulator@0 {
82			compatible = "regulator-fixed";
83			reg = <0>;
84			regulator-name = "1P0V";
85			regulator-min-microvolt = <1000000>;
86			regulator-max-microvolt = <1000000>;
87			regulator-always-on;
88		};
89
90		reg_3p3v: regulator@1 {
91			compatible = "regulator-fixed";
92			reg = <1>;
93			regulator-name = "3P3V";
94			regulator-min-microvolt = <3300000>;
95			regulator-max-microvolt = <3300000>;
96			regulator-always-on;
97		};
98
99		reg_usb_h1_vbus: regulator@2 {
100			compatible = "regulator-fixed";
101			reg = <2>;
102			regulator-name = "usb_h1_vbus";
103			regulator-min-microvolt = <5000000>;
104			regulator-max-microvolt = <5000000>;
105			regulator-always-on;
106		};
107
108		reg_usb_otg_vbus: regulator@3 {
109			compatible = "regulator-fixed";
110			reg = <3>;
111			regulator-name = "usb_otg_vbus";
112			regulator-min-microvolt = <5000000>;
113			regulator-max-microvolt = <5000000>;
114			gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
115			enable-active-high;
116		};
117	};
118
119	sound {
120		compatible = "fsl,imx6q-ventana-sgtl5000",
121			     "fsl,imx-audio-sgtl5000";
122		model = "sgtl5000-audio";
123		ssi-controller = <&ssi1>;
124		audio-codec = <&codec>;
125		audio-routing =
126			"MIC_IN", "Mic Jack",
127			"Mic Jack", "Mic Bias",
128			"Headphone Jack", "HP_OUT";
129		mux-int-port = <1>;
130		mux-ext-port = <4>;
131	};
132};
133
134&audmux {
135	pinctrl-names = "default";
136	pinctrl-0 = <&pinctrl_audmux>;
137	status = "okay";
138};
139
140&ecspi1 {
141	fsl,spi-num-chipselects = <1>;
142	cs-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
143	pinctrl-names = "default";
144	pinctrl-0 = <&pinctrl_ecspi1>;
145	status = "okay";
146
147	flash: m25p80@0 {
148		compatible = "sst,w25q256";
149		spi-max-frequency = <30000000>;
150		reg = <0>;
151	};
152};
153
154&fec {
155	pinctrl-names = "default";
156	pinctrl-0 = <&pinctrl_enet>;
157	phy-mode = "rgmii";
158	phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
159	status = "okay";
160};
161
162&hdmi {
163	ddc-i2c-bus = <&i2c3>;
164	status = "okay";
165};
166
167&i2c1 {
168	clock-frequency = <100000>;
169	pinctrl-names = "default";
170	pinctrl-0 = <&pinctrl_i2c1>;
171	status = "okay";
172
173	eeprom1: eeprom@50 {
174		compatible = "atmel,24c02";
175		reg = <0x50>;
176		pagesize = <16>;
177	};
178
179	eeprom2: eeprom@51 {
180		compatible = "atmel,24c02";
181		reg = <0x51>;
182		pagesize = <16>;
183	};
184
185	eeprom3: eeprom@52 {
186		compatible = "atmel,24c02";
187		reg = <0x52>;
188		pagesize = <16>;
189	};
190
191	eeprom4: eeprom@53 {
192		compatible = "atmel,24c02";
193		reg = <0x53>;
194		pagesize = <16>;
195	};
196
197	gpio: pca9555@23 {
198		compatible = "nxp,pca9555";
199		reg = <0x23>;
200		gpio-controller;
201		#gpio-cells = <2>;
202	};
203
204	rtc: ds1672@68 {
205		compatible = "dallas,ds1672";
206		reg = <0x68>;
207	};
208};
209
210&i2c2 {
211	clock-frequency = <100000>;
212	pinctrl-names = "default";
213	pinctrl-0 = <&pinctrl_i2c2>;
214	status = "okay";
215
216	pmic: pfuze100@08 {
217		compatible = "fsl,pfuze100";
218		reg = <0x08>;
219
220		regulators {
221			sw1a_reg: sw1ab {
222				regulator-min-microvolt = <300000>;
223				regulator-max-microvolt = <1875000>;
224				regulator-boot-on;
225				regulator-always-on;
226				regulator-ramp-delay = <6250>;
227			};
228
229			sw1c_reg: sw1c {
230				regulator-min-microvolt = <300000>;
231				regulator-max-microvolt = <1875000>;
232				regulator-boot-on;
233				regulator-always-on;
234				regulator-ramp-delay = <6250>;
235			};
236
237			sw2_reg: sw2 {
238				regulator-min-microvolt = <800000>;
239				regulator-max-microvolt = <3950000>;
240				regulator-boot-on;
241				regulator-always-on;
242			};
243
244			sw3a_reg: sw3a {
245				regulator-min-microvolt = <400000>;
246				regulator-max-microvolt = <1975000>;
247				regulator-boot-on;
248				regulator-always-on;
249			};
250
251			sw3b_reg: sw3b {
252				regulator-min-microvolt = <400000>;
253				regulator-max-microvolt = <1975000>;
254				regulator-boot-on;
255				regulator-always-on;
256			};
257
258			sw4_reg: sw4 {
259				regulator-min-microvolt = <800000>;
260				regulator-max-microvolt = <3300000>;
261			};
262
263			swbst_reg: swbst {
264				regulator-min-microvolt = <5000000>;
265				regulator-max-microvolt = <5150000>;
266			};
267
268			snvs_reg: vsnvs {
269				regulator-min-microvolt = <1000000>;
270				regulator-max-microvolt = <3000000>;
271				regulator-boot-on;
272				regulator-always-on;
273			};
274
275			vref_reg: vrefddr {
276				regulator-boot-on;
277				regulator-always-on;
278			};
279
280			vgen1_reg: vgen1 {
281				regulator-min-microvolt = <800000>;
282				regulator-max-microvolt = <1550000>;
283			};
284
285			vgen2_reg: vgen2 {
286				regulator-min-microvolt = <800000>;
287				regulator-max-microvolt = <1550000>;
288			};
289
290			vgen3_reg: vgen3 {
291				regulator-min-microvolt = <1800000>;
292				regulator-max-microvolt = <3300000>;
293			};
294
295			vgen4_reg: vgen4 {
296				regulator-min-microvolt = <1800000>;
297				regulator-max-microvolt = <3300000>;
298				regulator-always-on;
299			};
300
301			vgen5_reg: vgen5 {
302				regulator-min-microvolt = <1800000>;
303				regulator-max-microvolt = <3300000>;
304				regulator-always-on;
305			};
306
307			vgen6_reg: vgen6 {
308				regulator-min-microvolt = <1800000>;
309				regulator-max-microvolt = <3300000>;
310				regulator-always-on;
311			};
312		};
313	};
314};
315
316&i2c3 {
317	clock-frequency = <100000>;
318	pinctrl-names = "default";
319	pinctrl-0 = <&pinctrl_i2c3>;
320	status = "okay";
321
322	accelerometer: mma8450@1c {
323		compatible = "fsl,mma8450";
324		reg = <0x1c>;
325	};
326
327	codec: sgtl5000@0a {
328		compatible = "fsl,sgtl5000";
329		reg = <0x0a>;
330		clocks = <&clks 201>;
331		VDDA-supply = <&sw4_reg>;
332		VDDIO-supply = <&reg_3p3v>;
333	};
334
335	touchscreen: egalax_ts@04 {
336		compatible = "eeti,egalax_ts";
337		reg = <0x04>;
338		interrupt-parent = <&gpio7>;
339		interrupts = <12 2>;
340		wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
341	};
342};
343
344&ldb {
345	status = "okay";
346};
347
348&pcie {
349	reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
350	status = "okay";
351
352	eth1: sky2@8 { /* MAC/PHY on bus 8 */
353		compatible = "marvell,sky2";
354	};
355};
356
357&ssi1 {
358	status = "okay";
359};
360
361&uart1 {
362	pinctrl-names = "default";
363	pinctrl-0 = <&pinctrl_uart1>;
364	status = "okay";
365};
366
367&uart2 {
368	pinctrl-names = "default";
369	pinctrl-0 = <&pinctrl_uart2>;
370	status = "okay";
371};
372
373&uart5 {
374	pinctrl-names = "default";
375	pinctrl-0 = <&pinctrl_uart5>;
376	status = "okay";
377};
378
379&usbotg {
380	vbus-supply = <&reg_usb_otg_vbus>;
381	pinctrl-names = "default";
382	pinctrl-0 = <&pinctrl_usbotg>;
383	disable-over-current;
384	status = "okay";
385};
386
387&usbh1 {
388	vbus-supply = <&reg_usb_h1_vbus>;
389	status = "okay";
390};
391
392&usdhc3 {
393	pinctrl-names = "default";
394	pinctrl-0 = <&pinctrl_usdhc3>;
395	cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
396	vmmc-supply = <&reg_3p3v>;
397	status = "okay";
398};
399
400&iomuxc {
401	imx6q-gw5400-a {
402
403		pinctrl_audmux: audmuxgrp {
404			fsl,pins = <
405				MX6QDL_PAD_SD2_DAT0__AUD4_RXD		0x130b0
406				MX6QDL_PAD_SD2_DAT3__AUD4_TXC		0x130b0
407				MX6QDL_PAD_SD2_DAT2__AUD4_TXD		0x110b0
408				MX6QDL_PAD_SD2_DAT1__AUD4_TXFS		0x130b0
409				MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x130b0 /* AUD4_MCK */
410			>;
411		};
412
413		pinctrl_ecspi1: ecspi1grp {
414			fsl,pins = <
415				MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1
416				MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1
417				MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1
418				MX6QDL_PAD_EIM_D19__GPIO3_IO19		0x1b0b0 /* SPINOR_CS0# */
419			>;
420		};
421
422		pinctrl_enet: enetgrp {
423			fsl,pins = <
424				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0
425				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b0b0
426				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b0b0
427				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b0b0
428				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b0b0
429				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b0b0
430				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b0b0
431				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b0b0
432				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b0b0
433				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b0b0
434				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b0b0
435				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b0b0
436				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
437				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
438				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
439				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
440			>;
441		};
442
443		pinctrl_gpio_leds: gpioledsgrp {
444			fsl,pins = <
445				MX6QDL_PAD_KEY_COL0__GPIO4_IO06		0x1b0b0 /* user1 led */
446				MX6QDL_PAD_KEY_COL2__GPIO4_IO10		0x1b0b0 /* user2 led */
447				MX6QDL_PAD_KEY_ROW4__GPIO4_IO15		0x1b0b0 /* user3 led */
448			>;
449		};
450
451		pinctrl_i2c1: i2c1grp {
452			fsl,pins = <
453				MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
454				MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
455			>;
456		};
457
458		pinctrl_i2c2: i2c2grp {
459			fsl,pins = <
460				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
461				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
462			>;
463		};
464
465		pinctrl_i2c3: i2c3grp {
466			fsl,pins = <
467				MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4001b8b1
468				MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
469			>;
470		};
471
472		pinctrl_pcie: pciegrp {
473			fsl,pins = <
474				MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	0x1b0b0 /* PCIE IRQ */
475				MX6QDL_PAD_ENET_TXD1__GPIO1_IO29	0x1b0b0 /* PCIE RST */
476			>;
477		};
478
479		pinctrl_pps: ppsgrp {
480			fsl,pins = <
481				MX6QDL_PAD_GPIO_5__GPIO1_IO05		0x1b0b0 /* GPS_PPS */
482			>;
483		};
484
485		pinctrl_uart1: uart1grp {
486			fsl,pins = <
487				MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1
488				MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1
489			>;
490		};
491
492		pinctrl_uart2: uart2grp {
493			fsl,pins = <
494				MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1
495				MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b1
496			>;
497		};
498
499		pinctrl_uart5: uart5grp {
500			fsl,pins = <
501				MX6QDL_PAD_KEY_COL1__UART5_TX_DATA	0x1b0b1
502				MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA	0x1b0b1
503			>;
504		};
505
506		pinctrl_usbotg: usbotggrp {
507			fsl,pins = <
508				MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
509				MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x1b0b0 /* OTG_PWR_EN */
510			>;
511		};
512
513		pinctrl_usdhc3: usdhc3grp {
514			fsl,pins = <
515				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
516				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
517				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
518				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
519				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
520				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
521			>;
522		};
523	};
524};
525