imx25.dtsi revision 284090
1/* 2 * Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de> 3 * 4 * The code contained herein is licensed under the GNU General Public 5 * License. You may obtain a copy of the GNU General Public License 6 * Version 2 or later at the following locations: 7 * 8 * http://www.opensource.org/licenses/gpl-license.html 9 * http://www.gnu.org/copyleft/gpl.html 10 */ 11 12#include "skeleton.dtsi" 13#include "imx25-pinfunc.h" 14 15/ { 16 aliases { 17 ethernet0 = &fec; 18 gpio0 = &gpio1; 19 gpio1 = &gpio2; 20 gpio2 = &gpio3; 21 gpio3 = &gpio4; 22 i2c0 = &i2c1; 23 i2c1 = &i2c2; 24 i2c2 = &i2c3; 25 mmc0 = &esdhc1; 26 mmc1 = &esdhc2; 27 serial0 = &uart1; 28 serial1 = &uart2; 29 serial2 = &uart3; 30 serial3 = &uart4; 31 serial4 = &uart5; 32 spi0 = &spi1; 33 spi1 = &spi2; 34 spi2 = &spi3; 35 usb0 = &usbotg; 36 usb1 = &usbhost1; 37 }; 38 39 cpus { 40 #address-cells = <0>; 41 #size-cells = <0>; 42 43 cpu { 44 compatible = "arm,arm926ej-s"; 45 device_type = "cpu"; 46 }; 47 }; 48 49 asic: asic-interrupt-controller@68000000 { 50 compatible = "fsl,imx25-asic", "fsl,avic"; 51 interrupt-controller; 52 #interrupt-cells = <1>; 53 reg = <0x68000000 0x8000000>; 54 }; 55 56 clocks { 57 #address-cells = <1>; 58 #size-cells = <0>; 59 60 osc { 61 compatible = "fsl,imx-osc", "fixed-clock"; 62 #clock-cells = <0>; 63 clock-frequency = <24000000>; 64 }; 65 }; 66 67 soc { 68 #address-cells = <1>; 69 #size-cells = <1>; 70 compatible = "simple-bus"; 71 interrupt-parent = <&asic>; 72 ranges; 73 74 aips@43f00000 { /* AIPS1 */ 75 compatible = "fsl,aips-bus", "simple-bus"; 76 #address-cells = <1>; 77 #size-cells = <1>; 78 reg = <0x43f00000 0x100000>; 79 ranges; 80 81 i2c1: i2c@43f80000 { 82 #address-cells = <1>; 83 #size-cells = <0>; 84 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c"; 85 reg = <0x43f80000 0x4000>; 86 clocks = <&clks 48>; 87 clock-names = ""; 88 interrupts = <3>; 89 status = "disabled"; 90 }; 91 92 i2c3: i2c@43f84000 { 93 #address-cells = <1>; 94 #size-cells = <0>; 95 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c"; 96 reg = <0x43f84000 0x4000>; 97 clocks = <&clks 48>; 98 clock-names = ""; 99 interrupts = <10>; 100 status = "disabled"; 101 }; 102 103 can1: can@43f88000 { 104 compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan"; 105 reg = <0x43f88000 0x4000>; 106 interrupts = <43>; 107 clocks = <&clks 75>, <&clks 75>; 108 clock-names = "ipg", "per"; 109 status = "disabled"; 110 }; 111 112 can2: can@43f8c000 { 113 compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan"; 114 reg = <0x43f8c000 0x4000>; 115 interrupts = <44>; 116 clocks = <&clks 76>, <&clks 76>; 117 clock-names = "ipg", "per"; 118 status = "disabled"; 119 }; 120 121 uart1: serial@43f90000 { 122 compatible = "fsl,imx25-uart", "fsl,imx21-uart"; 123 reg = <0x43f90000 0x4000>; 124 interrupts = <45>; 125 clocks = <&clks 120>, <&clks 57>; 126 clock-names = "ipg", "per"; 127 status = "disabled"; 128 }; 129 130 uart2: serial@43f94000 { 131 compatible = "fsl,imx25-uart", "fsl,imx21-uart"; 132 reg = <0x43f94000 0x4000>; 133 interrupts = <32>; 134 clocks = <&clks 121>, <&clks 57>; 135 clock-names = "ipg", "per"; 136 status = "disabled"; 137 }; 138 139 i2c2: i2c@43f98000 { 140 #address-cells = <1>; 141 #size-cells = <0>; 142 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c"; 143 reg = <0x43f98000 0x4000>; 144 clocks = <&clks 48>; 145 clock-names = ""; 146 interrupts = <4>; 147 status = "disabled"; 148 }; 149 150 owire@43f9c000 { 151 #address-cells = <1>; 152 #size-cells = <0>; 153 reg = <0x43f9c000 0x4000>; 154 clocks = <&clks 51>; 155 clock-names = ""; 156 interrupts = <2>; 157 status = "disabled"; 158 }; 159 160 spi1: cspi@43fa4000 { 161 #address-cells = <1>; 162 #size-cells = <0>; 163 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; 164 reg = <0x43fa4000 0x4000>; 165 clocks = <&clks 78>, <&clks 78>; 166 clock-names = "ipg", "per"; 167 interrupts = <14>; 168 status = "disabled"; 169 }; 170 171 kpp: kpp@43fa8000 { 172 #address-cells = <1>; 173 #size-cells = <0>; 174 compatible = "fsl,imx25-kpp", "fsl,imx21-kpp"; 175 reg = <0x43fa8000 0x4000>; 176 clocks = <&clks 102>; 177 clock-names = ""; 178 interrupts = <24>; 179 status = "disabled"; 180 }; 181 182 iomuxc: iomuxc@43fac000 { 183 compatible = "fsl,imx25-iomuxc"; 184 reg = <0x43fac000 0x4000>; 185 }; 186 187 audmux: audmux@43fb0000 { 188 compatible = "fsl,imx25-audmux", "fsl,imx31-audmux"; 189 reg = <0x43fb0000 0x4000>; 190 status = "disabled"; 191 }; 192 }; 193 194 spba@50000000 { 195 compatible = "fsl,spba-bus", "simple-bus"; 196 #address-cells = <1>; 197 #size-cells = <1>; 198 reg = <0x50000000 0x40000>; 199 ranges; 200 201 spi3: cspi@50004000 { 202 #address-cells = <1>; 203 #size-cells = <0>; 204 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; 205 reg = <0x50004000 0x4000>; 206 interrupts = <0>; 207 clocks = <&clks 80>, <&clks 80>; 208 clock-names = "ipg", "per"; 209 status = "disabled"; 210 }; 211 212 uart4: serial@50008000 { 213 compatible = "fsl,imx25-uart", "fsl,imx21-uart"; 214 reg = <0x50008000 0x4000>; 215 interrupts = <5>; 216 clocks = <&clks 123>, <&clks 57>; 217 clock-names = "ipg", "per"; 218 status = "disabled"; 219 }; 220 221 uart3: serial@5000c000 { 222 compatible = "fsl,imx25-uart", "fsl,imx21-uart"; 223 reg = <0x5000c000 0x4000>; 224 interrupts = <18>; 225 clocks = <&clks 122>, <&clks 57>; 226 clock-names = "ipg", "per"; 227 status = "disabled"; 228 }; 229 230 spi2: cspi@50010000 { 231 #address-cells = <1>; 232 #size-cells = <0>; 233 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; 234 reg = <0x50010000 0x4000>; 235 clocks = <&clks 79>, <&clks 79>; 236 clock-names = "ipg", "per"; 237 interrupts = <13>; 238 status = "disabled"; 239 }; 240 241 ssi2: ssi@50014000 { 242 #sound-dai-cells = <0>; 243 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi"; 244 reg = <0x50014000 0x4000>; 245 interrupts = <11>; 246 clocks = <&clks 118>; 247 clock-names = "ipg"; 248 dmas = <&sdma 24 1 0>, 249 <&sdma 25 1 0>; 250 dma-names = "rx", "tx"; 251 status = "disabled"; 252 }; 253 254 esai@50018000 { 255 reg = <0x50018000 0x4000>; 256 interrupts = <7>; 257 }; 258 259 uart5: serial@5002c000 { 260 compatible = "fsl,imx25-uart", "fsl,imx21-uart"; 261 reg = <0x5002c000 0x4000>; 262 interrupts = <40>; 263 clocks = <&clks 124>, <&clks 57>; 264 clock-names = "ipg", "per"; 265 status = "disabled"; 266 }; 267 268 tsc: tsc@50030000 { 269 compatible = "fsl,imx25-adc", "fsl,imx21-tsc"; 270 reg = <0x50030000 0x4000>; 271 interrupts = <46>; 272 clocks = <&clks 119>; 273 clock-names = "ipg"; 274 status = "disabled"; 275 }; 276 277 ssi1: ssi@50034000 { 278 #sound-dai-cells = <0>; 279 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi"; 280 reg = <0x50034000 0x4000>; 281 interrupts = <12>; 282 clocks = <&clks 117>; 283 clock-names = "ipg"; 284 dmas = <&sdma 28 1 0>, 285 <&sdma 29 1 0>; 286 dma-names = "rx", "tx"; 287 status = "disabled"; 288 }; 289 290 fec: ethernet@50038000 { 291 compatible = "fsl,imx25-fec"; 292 reg = <0x50038000 0x4000>; 293 interrupts = <57>; 294 clocks = <&clks 88>, <&clks 65>; 295 clock-names = "ipg", "ahb"; 296 status = "disabled"; 297 }; 298 }; 299 300 aips@53f00000 { /* AIPS2 */ 301 compatible = "fsl,aips-bus", "simple-bus"; 302 #address-cells = <1>; 303 #size-cells = <1>; 304 reg = <0x53f00000 0x100000>; 305 ranges; 306 307 clks: ccm@53f80000 { 308 compatible = "fsl,imx25-ccm"; 309 reg = <0x53f80000 0x4000>; 310 interrupts = <31>; 311 #clock-cells = <1>; 312 }; 313 314 gpt4: timer@53f84000 { 315 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; 316 reg = <0x53f84000 0x4000>; 317 clocks = <&clks 95>, <&clks 47>; 318 clock-names = "ipg", "per"; 319 interrupts = <1>; 320 }; 321 322 gpt3: timer@53f88000 { 323 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; 324 reg = <0x53f88000 0x4000>; 325 clocks = <&clks 94>, <&clks 47>; 326 clock-names = "ipg", "per"; 327 interrupts = <29>; 328 }; 329 330 gpt2: timer@53f8c000 { 331 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; 332 reg = <0x53f8c000 0x4000>; 333 clocks = <&clks 93>, <&clks 47>; 334 clock-names = "ipg", "per"; 335 interrupts = <53>; 336 }; 337 338 gpt1: timer@53f90000 { 339 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; 340 reg = <0x53f90000 0x4000>; 341 clocks = <&clks 92>, <&clks 47>; 342 clock-names = "ipg", "per"; 343 interrupts = <54>; 344 }; 345 346 epit1: timer@53f94000 { 347 compatible = "fsl,imx25-epit"; 348 reg = <0x53f94000 0x4000>; 349 interrupts = <28>; 350 }; 351 352 epit2: timer@53f98000 { 353 compatible = "fsl,imx25-epit"; 354 reg = <0x53f98000 0x4000>; 355 interrupts = <27>; 356 }; 357 358 gpio4: gpio@53f9c000 { 359 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; 360 reg = <0x53f9c000 0x4000>; 361 interrupts = <23>; 362 gpio-controller; 363 #gpio-cells = <2>; 364 interrupt-controller; 365 #interrupt-cells = <2>; 366 }; 367 368 pwm2: pwm@53fa0000 { 369 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; 370 #pwm-cells = <2>; 371 reg = <0x53fa0000 0x4000>; 372 clocks = <&clks 106>, <&clks 52>; 373 clock-names = "ipg", "per"; 374 interrupts = <36>; 375 }; 376 377 gpio3: gpio@53fa4000 { 378 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; 379 reg = <0x53fa4000 0x4000>; 380 interrupts = <16>; 381 gpio-controller; 382 #gpio-cells = <2>; 383 interrupt-controller; 384 #interrupt-cells = <2>; 385 }; 386 387 pwm3: pwm@53fa8000 { 388 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; 389 #pwm-cells = <2>; 390 reg = <0x53fa8000 0x4000>; 391 clocks = <&clks 107>, <&clks 52>; 392 clock-names = "ipg", "per"; 393 interrupts = <41>; 394 }; 395 396 esdhc1: esdhc@53fb4000 { 397 compatible = "fsl,imx25-esdhc"; 398 reg = <0x53fb4000 0x4000>; 399 interrupts = <9>; 400 clocks = <&clks 86>, <&clks 63>, <&clks 45>; 401 clock-names = "ipg", "ahb", "per"; 402 status = "disabled"; 403 }; 404 405 esdhc2: esdhc@53fb8000 { 406 compatible = "fsl,imx25-esdhc"; 407 reg = <0x53fb8000 0x4000>; 408 interrupts = <8>; 409 clocks = <&clks 87>, <&clks 64>, <&clks 46>; 410 clock-names = "ipg", "ahb", "per"; 411 status = "disabled"; 412 }; 413 414 lcdc: lcdc@53fbc000 { 415 compatible = "fsl,imx25-fb", "fsl,imx21-fb"; 416 reg = <0x53fbc000 0x4000>; 417 interrupts = <39>; 418 clocks = <&clks 103>, <&clks 66>, <&clks 49>; 419 clock-names = "ipg", "ahb", "per"; 420 status = "disabled"; 421 }; 422 423 slcdc@53fc0000 { 424 reg = <0x53fc0000 0x4000>; 425 interrupts = <38>; 426 status = "disabled"; 427 }; 428 429 pwm4: pwm@53fc8000 { 430 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; 431 reg = <0x53fc8000 0x4000>; 432 clocks = <&clks 108>, <&clks 52>; 433 clock-names = "ipg", "per"; 434 interrupts = <42>; 435 }; 436 437 gpio1: gpio@53fcc000 { 438 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; 439 reg = <0x53fcc000 0x4000>; 440 interrupts = <52>; 441 gpio-controller; 442 #gpio-cells = <2>; 443 interrupt-controller; 444 #interrupt-cells = <2>; 445 }; 446 447 gpio2: gpio@53fd0000 { 448 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; 449 reg = <0x53fd0000 0x4000>; 450 interrupts = <51>; 451 gpio-controller; 452 #gpio-cells = <2>; 453 interrupt-controller; 454 #interrupt-cells = <2>; 455 }; 456 457 sdma: sdma@53fd4000 { 458 compatible = "fsl,imx25-sdma"; 459 reg = <0x53fd4000 0x4000>; 460 clocks = <&clks 112>, <&clks 68>; 461 clock-names = "ipg", "ahb"; 462 #dma-cells = <3>; 463 interrupts = <34>; 464 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx25.bin"; 465 }; 466 467 wdog@53fdc000 { 468 compatible = "fsl,imx25-wdt", "fsl,imx21-wdt"; 469 reg = <0x53fdc000 0x4000>; 470 clocks = <&clks 126>; 471 clock-names = ""; 472 interrupts = <55>; 473 }; 474 475 pwm1: pwm@53fe0000 { 476 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; 477 #pwm-cells = <2>; 478 reg = <0x53fe0000 0x4000>; 479 clocks = <&clks 105>, <&clks 52>; 480 clock-names = "ipg", "per"; 481 interrupts = <26>; 482 }; 483 484 iim: iim@53ff0000 { 485 compatible = "fsl,imx25-iim", "fsl,imx27-iim"; 486 reg = <0x53ff0000 0x4000>; 487 interrupts = <19>; 488 clocks = <&clks 99>; 489 }; 490 491 usbotg: usb@53ff4000 { 492 compatible = "fsl,imx25-usb", "fsl,imx27-usb"; 493 reg = <0x53ff4000 0x0200>; 494 interrupts = <37>; 495 clocks = <&clks 70>; 496 fsl,usbmisc = <&usbmisc 0>; 497 fsl,usbphy = <&usbphy0>; 498 status = "disabled"; 499 }; 500 501 usbhost1: usb@53ff4400 { 502 compatible = "fsl,imx25-usb", "fsl,imx27-usb"; 503 reg = <0x53ff4400 0x0200>; 504 interrupts = <35>; 505 clocks = <&clks 70>; 506 fsl,usbmisc = <&usbmisc 1>; 507 fsl,usbphy = <&usbphy1>; 508 status = "disabled"; 509 }; 510 511 usbmisc: usbmisc@53ff4600 { 512 #index-cells = <1>; 513 compatible = "fsl,imx25-usbmisc"; 514 clocks = <&clks 9>, <&clks 70>, <&clks 8>; 515 clock-names = "ipg", "ahb", "per"; 516 reg = <0x53ff4600 0x00f>; 517 }; 518 519 dryice@53ffc000 { 520 compatible = "fsl,imx25-dryice", "fsl,imx25-rtc"; 521 reg = <0x53ffc000 0x4000>; 522 clocks = <&clks 81>; 523 clock-names = "ipg"; 524 interrupts = <25>; 525 }; 526 }; 527 528 iram: sram@78000000 { 529 compatible = "mmio-sram"; 530 reg = <0x78000000 0x20000>; 531 }; 532 533 emi@80000000 { 534 compatible = "fsl,emi-bus", "simple-bus"; 535 #address-cells = <1>; 536 #size-cells = <1>; 537 reg = <0x80000000 0x3b002000>; 538 ranges; 539 540 nfc: nand@bb000000 { 541 #address-cells = <1>; 542 #size-cells = <1>; 543 544 compatible = "fsl,imx25-nand"; 545 reg = <0xbb000000 0x2000>; 546 clocks = <&clks 50>; 547 clock-names = ""; 548 interrupts = <33>; 549 status = "disabled"; 550 }; 551 }; 552 }; 553 554 usbphy { 555 compatible = "simple-bus"; 556 #address-cells = <1>; 557 #size-cells = <0>; 558 559 usbphy0: usb-phy@0 { 560 reg = <0>; 561 compatible = "usb-nop-xceiv"; 562 }; 563 564 usbphy1: usb-phy@1 { 565 reg = <1>; 566 compatible = "usb-nop-xceiv"; 567 }; 568 }; 569}; 570