bcm5301x.dtsi revision 284090
1179882Sdas/* 2179882Sdas * Broadcom BCM470X / BCM5301X ARM platform code. 3179882Sdas * Generic DTS part for all BCM53010, BCM53011, BCM53012, BCM53014, BCM53015, 4179882Sdas * BCM53016, BCM53017, BCM53018, BCM4707, BCM4708 and BCM4709 SoCs 5179882Sdas * 6179882Sdas * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de> 7179882Sdas * 8179882Sdas * Licensed under the GNU/GPL. See COPYING for details. 9179882Sdas */ 10179882Sdas 11179882Sdas#include <dt-bindings/gpio/gpio.h> 12179882Sdas#include <dt-bindings/input/input.h> 13179882Sdas#include <dt-bindings/interrupt-controller/irq.h> 14179882Sdas#include <dt-bindings/interrupt-controller/arm-gic.h> 15179882Sdas#include "skeleton.dtsi" 16179882Sdas 17179882Sdas/ { 18179882Sdas interrupt-parent = <&gic>; 19179882Sdas 20179882Sdas chipcommonA { 21179882Sdas compatible = "simple-bus"; 22179882Sdas ranges = <0x00000000 0x18000000 0x00001000>; 23179882Sdas #address-cells = <1>; 24179882Sdas #size-cells = <1>; 25179882Sdas 26179882Sdas uart0: serial@0300 { 27179882Sdas compatible = "ns16550"; 28179882Sdas reg = <0x0300 0x100>; 29179882Sdas interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 30179882Sdas clock-frequency = <100000000>; 31179882Sdas status = "disabled"; 32179882Sdas }; 33179882Sdas 34179882Sdas uart1: serial@0400 { 35179882Sdas compatible = "ns16550"; 36179882Sdas reg = <0x0400 0x100>; 37179882Sdas interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 38179882Sdas clock-frequency = <100000000>; 39179882Sdas status = "disabled"; 40179882Sdas }; 41179882Sdas }; 42179882Sdas 43179882Sdas mpcore { 44179882Sdas compatible = "simple-bus"; 45179882Sdas ranges = <0x00000000 0x19020000 0x00003000>; 46179882Sdas #address-cells = <1>; 47179882Sdas #size-cells = <1>; 48179882Sdas 49179882Sdas scu@0000 { 50179882Sdas compatible = "arm,cortex-a9-scu"; 51179882Sdas reg = <0x0000 0x100>; 52179882Sdas }; 53179882Sdas 54179882Sdas timer@0200 { 55179882Sdas compatible = "arm,cortex-a9-global-timer"; 56179882Sdas reg = <0x0200 0x100>; 57179882Sdas interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>; 58179882Sdas clocks = <&clk_periph>; 59179882Sdas }; 60179882Sdas 61179882Sdas local-timer@0600 { 62179882Sdas compatible = "arm,cortex-a9-twd-timer"; 63179882Sdas reg = <0x0600 0x100>; 64179882Sdas interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>; 65179882Sdas clocks = <&clk_periph>; 66179882Sdas }; 67179882Sdas 68179882Sdas gic: interrupt-controller@1000 { 69179882Sdas compatible = "arm,cortex-a9-gic"; 70179882Sdas #interrupt-cells = <3>; 71179882Sdas #address-cells = <0>; 72179882Sdas interrupt-controller; 73179882Sdas reg = <0x1000 0x1000>, 74179882Sdas <0x0100 0x100>; 75179882Sdas }; 76179882Sdas 77179882Sdas L2: cache-controller@2000 { 78179882Sdas compatible = "arm,pl310-cache"; 79179882Sdas reg = <0x2000 0x1000>; 80179882Sdas cache-unified; 81179882Sdas cache-level = <2>; 82179882Sdas }; 83179882Sdas }; 84179882Sdas 85179882Sdas clocks { 86179882Sdas #address-cells = <1>; 87179882Sdas #size-cells = <0>; 88179882Sdas 89179882Sdas /* As long as we do not have a real clock driver us this 90179882Sdas * fixed clock */ 91179882Sdas clk_periph: periph { 92179882Sdas compatible = "fixed-clock"; 93179882Sdas #clock-cells = <0>; 94179882Sdas clock-frequency = <400000000>; 95179882Sdas }; 96179882Sdas }; 97179882Sdas 98179882Sdas axi@18000000 { 99179882Sdas compatible = "brcm,bus-axi"; 100179882Sdas reg = <0x18000000 0x1000>; 101179882Sdas ranges = <0x00000000 0x18000000 0x00100000>; 102179882Sdas #address-cells = <1>; 103179882Sdas #size-cells = <1>; 104179882Sdas 105179882Sdas #interrupt-cells = <1>; 106179882Sdas interrupt-map-mask = <0x000fffff 0xffff>; 107179882Sdas interrupt-map = 108179882Sdas /* ChipCommon */ 109179882Sdas <0x00000000 0 &gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 110179882Sdas 111179882Sdas /* USB 2.0 Controller */ 112179882Sdas <0x00021000 0 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>, 113179882Sdas 114179882Sdas /* USB 3.0 Controller */ 115179882Sdas <0x00023000 0 &gic GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, 116179882Sdas 117179882Sdas /* Ethernet Controller 0 */ 118179882Sdas <0x00024000 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>, 119179882Sdas 120179882Sdas /* Ethernet Controller 1 */ 121179882Sdas <0x00025000 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 122179882Sdas 123179882Sdas /* Ethernet Controller 2 */ 124179882Sdas <0x00026000 0 &gic GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 125179882Sdas 126179882Sdas /* Ethernet Controller 3 */ 127179882Sdas <0x00027000 0 &gic GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>, 128179882Sdas 129179882Sdas /* NAND Controller */ 130179882Sdas <0x00028000 0 &gic GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, 131179882Sdas <0x00028000 1 &gic GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, 132179882Sdas <0x00028000 2 &gic GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>, 133179882Sdas <0x00028000 3 &gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 134179882Sdas <0x00028000 4 &gic GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 135181063Sdas <0x00028000 5 &gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, 136179882Sdas <0x00028000 6 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, 137179882Sdas <0x00028000 7 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 138179882Sdas 139179882Sdas chipcommon: chipcommon@0 { 140179882Sdas reg = <0x00000000 0x1000>; 141179882Sdas 142179882Sdas gpio-controller; 143179882Sdas #gpio-cells = <2>; 144179882Sdas }; 145179882Sdas }; 146179882Sdas}; 147179882Sdas