am33xx.dtsi revision 284090
1/* 2 * Device Tree Source for AM33XX SoC 3 * 4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ 5 * 6 * This file is licensed under the terms of the GNU General Public License 7 * version 2. This program is licensed "as is" without any warranty of any 8 * kind, whether express or implied. 9 */ 10 11#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/pinctrl/am33xx.h> 13 14#include "skeleton.dtsi" 15 16/ { 17 compatible = "ti,am33xx"; 18 interrupt-parent = <&intc>; 19 20 aliases { 21 i2c0 = &i2c0; 22 i2c1 = &i2c1; 23 i2c2 = &i2c2; 24 serial0 = &uart0; 25 serial1 = &uart1; 26 serial2 = &uart2; 27 serial3 = &uart3; 28 serial4 = &uart4; 29 serial5 = &uart5; 30 d_can0 = &dcan0; 31 d_can1 = &dcan1; 32 usb0 = &usb0; 33 usb1 = &usb1; 34 phy0 = &usb0_phy; 35 phy1 = &usb1_phy; 36 ethernet0 = &cpsw_emac0; 37 ethernet1 = &cpsw_emac1; 38 }; 39 40 cpus { 41 #address-cells = <1>; 42 #size-cells = <0>; 43 cpu@0 { 44 compatible = "arm,cortex-a8"; 45 device_type = "cpu"; 46 reg = <0>; 47 48 /* 49 * To consider voltage drop between PMIC and SoC, 50 * tolerance value is reduced to 2% from 4% and 51 * voltage value is increased as a precaution. 52 */ 53 operating-points = < 54 /* kHz uV */ 55 720000 1285000 56 600000 1225000 57 500000 1125000 58 275000 1125000 59 >; 60 voltage-tolerance = <2>; /* 2 percentage */ 61 62 clocks = <&dpll_mpu_ck>; 63 clock-names = "cpu"; 64 65 clock-latency = <300000>; /* From omap-cpufreq driver */ 66 }; 67 }; 68 69 pmu { 70 compatible = "arm,cortex-a8-pmu"; 71 interrupts = <3>; 72 }; 73 74 /* 75 * The soc node represents the soc top level view. It is used for IPs 76 * that are not memory mapped in the MPU view or for the MPU itself. 77 */ 78 soc { 79 compatible = "ti,omap-infra"; 80 mpu { 81 compatible = "ti,omap3-mpu"; 82 ti,hwmods = "mpu"; 83 }; 84 }; 85 86 am33xx_control_module: control_module@4a002000 { 87 compatible = "syscon"; 88 reg = <0x44e10000 0x7fc>; 89 }; 90 91 am33xx_pinmux: pinmux@44e10800 { 92 compatible = "pinctrl-single"; 93 reg = <0x44e10800 0x0238>; 94 #address-cells = <1>; 95 #size-cells = <0>; 96 pinctrl-single,register-width = <32>; 97 pinctrl-single,function-mask = <0x7f>; 98 }; 99 100 /* 101 * XXX: Use a flat representation of the AM33XX interconnect. 102 * The real AM33XX interconnect network is quite complex. Since 103 * it will not bring real advantage to represent that in DT 104 * for the moment, just use a fake OCP bus entry to represent 105 * the whole bus hierarchy. 106 */ 107 ocp { 108 compatible = "simple-bus"; 109 #address-cells = <1>; 110 #size-cells = <1>; 111 ranges; 112 ti,hwmods = "l3_main"; 113 114 prcm: prcm@44e00000 { 115 compatible = "ti,am3-prcm"; 116 reg = <0x44e00000 0x4000>; 117 118 prcm_clocks: clocks { 119 #address-cells = <1>; 120 #size-cells = <0>; 121 }; 122 123 prcm_clockdomains: clockdomains { 124 }; 125 }; 126 127 scrm: scrm@44e10000 { 128 compatible = "ti,am3-scrm"; 129 reg = <0x44e10000 0x2000>; 130 131 scrm_clocks: clocks { 132 #address-cells = <1>; 133 #size-cells = <0>; 134 }; 135 136 scrm_clockdomains: clockdomains { 137 }; 138 }; 139 140 cm: syscon@44e10000 { 141 compatible = "ti,am33xx-controlmodule", "syscon"; 142 reg = <0x44e10000 0x800>; 143 }; 144 145 intc: interrupt-controller@48200000 { 146 compatible = "ti,am33xx-intc"; 147 interrupt-controller; 148 #interrupt-cells = <1>; 149 reg = <0x48200000 0x1000>; 150 }; 151 152 edma: edma@49000000 { 153 compatible = "ti,edma3"; 154 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2"; 155 reg = <0x49000000 0x10000>, 156 <0x44e10f90 0x40>; 157 interrupts = <12 13 14>; 158 #dma-cells = <1>; 159 }; 160 161 gpio0: gpio@44e07000 { 162 compatible = "ti,omap4-gpio"; 163 ti,hwmods = "gpio1"; 164 gpio-controller; 165 #gpio-cells = <2>; 166 interrupt-controller; 167 #interrupt-cells = <2>; 168 reg = <0x44e07000 0x1000>; 169 interrupts = <96>; 170 }; 171 172 gpio1: gpio@4804c000 { 173 compatible = "ti,omap4-gpio"; 174 ti,hwmods = "gpio2"; 175 gpio-controller; 176 #gpio-cells = <2>; 177 interrupt-controller; 178 #interrupt-cells = <2>; 179 reg = <0x4804c000 0x1000>; 180 interrupts = <98>; 181 }; 182 183 gpio2: gpio@481ac000 { 184 compatible = "ti,omap4-gpio"; 185 ti,hwmods = "gpio3"; 186 gpio-controller; 187 #gpio-cells = <2>; 188 interrupt-controller; 189 #interrupt-cells = <2>; 190 reg = <0x481ac000 0x1000>; 191 interrupts = <32>; 192 }; 193 194 gpio3: gpio@481ae000 { 195 compatible = "ti,omap4-gpio"; 196 ti,hwmods = "gpio4"; 197 gpio-controller; 198 #gpio-cells = <2>; 199 interrupt-controller; 200 #interrupt-cells = <2>; 201 reg = <0x481ae000 0x1000>; 202 interrupts = <62>; 203 }; 204 205 uart0: serial@44e09000 { 206 compatible = "ti,omap3-uart"; 207 ti,hwmods = "uart1"; 208 clock-frequency = <48000000>; 209 reg = <0x44e09000 0x2000>; 210 interrupts = <72>; 211 status = "disabled"; 212 dmas = <&edma 26>, <&edma 27>; 213 dma-names = "tx", "rx"; 214 }; 215 216 uart1: serial@48022000 { 217 compatible = "ti,omap3-uart"; 218 ti,hwmods = "uart2"; 219 clock-frequency = <48000000>; 220 reg = <0x48022000 0x2000>; 221 interrupts = <73>; 222 status = "disabled"; 223 dmas = <&edma 28>, <&edma 29>; 224 dma-names = "tx", "rx"; 225 }; 226 227 uart2: serial@48024000 { 228 compatible = "ti,omap3-uart"; 229 ti,hwmods = "uart3"; 230 clock-frequency = <48000000>; 231 reg = <0x48024000 0x2000>; 232 interrupts = <74>; 233 status = "disabled"; 234 dmas = <&edma 30>, <&edma 31>; 235 dma-names = "tx", "rx"; 236 }; 237 238 uart3: serial@481a6000 { 239 compatible = "ti,omap3-uart"; 240 ti,hwmods = "uart4"; 241 clock-frequency = <48000000>; 242 reg = <0x481a6000 0x2000>; 243 interrupts = <44>; 244 status = "disabled"; 245 }; 246 247 uart4: serial@481a8000 { 248 compatible = "ti,omap3-uart"; 249 ti,hwmods = "uart5"; 250 clock-frequency = <48000000>; 251 reg = <0x481a8000 0x2000>; 252 interrupts = <45>; 253 status = "disabled"; 254 }; 255 256 uart5: serial@481aa000 { 257 compatible = "ti,omap3-uart"; 258 ti,hwmods = "uart6"; 259 clock-frequency = <48000000>; 260 reg = <0x481aa000 0x2000>; 261 interrupts = <46>; 262 status = "disabled"; 263 }; 264 265 i2c0: i2c@44e0b000 { 266 compatible = "ti,omap4-i2c"; 267 #address-cells = <1>; 268 #size-cells = <0>; 269 ti,hwmods = "i2c1"; 270 reg = <0x44e0b000 0x1000>; 271 interrupts = <70>; 272 status = "disabled"; 273 }; 274 275 i2c1: i2c@4802a000 { 276 compatible = "ti,omap4-i2c"; 277 #address-cells = <1>; 278 #size-cells = <0>; 279 ti,hwmods = "i2c2"; 280 reg = <0x4802a000 0x1000>; 281 interrupts = <71>; 282 status = "disabled"; 283 }; 284 285 i2c2: i2c@4819c000 { 286 compatible = "ti,omap4-i2c"; 287 #address-cells = <1>; 288 #size-cells = <0>; 289 ti,hwmods = "i2c3"; 290 reg = <0x4819c000 0x1000>; 291 interrupts = <30>; 292 status = "disabled"; 293 }; 294 295 mmc1: mmc@48060000 { 296 compatible = "ti,omap4-hsmmc"; 297 ti,hwmods = "mmc1"; 298 ti,dual-volt; 299 ti,needs-special-reset; 300 ti,needs-special-hs-handling; 301 dmas = <&edma 24 302 &edma 25>; 303 dma-names = "tx", "rx"; 304 interrupts = <64>; 305 interrupt-parent = <&intc>; 306 reg = <0x48060000 0x1000>; 307 status = "disabled"; 308 }; 309 310 mmc2: mmc@481d8000 { 311 compatible = "ti,omap4-hsmmc"; 312 ti,hwmods = "mmc2"; 313 ti,needs-special-reset; 314 dmas = <&edma 2 315 &edma 3>; 316 dma-names = "tx", "rx"; 317 interrupts = <28>; 318 interrupt-parent = <&intc>; 319 reg = <0x481d8000 0x1000>; 320 status = "disabled"; 321 }; 322 323 mmc3: mmc@47810000 { 324 compatible = "ti,omap4-hsmmc"; 325 ti,hwmods = "mmc3"; 326 ti,needs-special-reset; 327 interrupts = <29>; 328 interrupt-parent = <&intc>; 329 reg = <0x47810000 0x1000>; 330 status = "disabled"; 331 }; 332 333 hwspinlock: spinlock@480ca000 { 334 compatible = "ti,omap4-hwspinlock"; 335 reg = <0x480ca000 0x1000>; 336 ti,hwmods = "spinlock"; 337 #hwlock-cells = <1>; 338 }; 339 340 wdt2: wdt@44e35000 { 341 compatible = "ti,omap3-wdt"; 342 ti,hwmods = "wd_timer2"; 343 reg = <0x44e35000 0x1000>; 344 interrupts = <91>; 345 }; 346 347 dcan0: can@481cc000 { 348 compatible = "ti,am3352-d_can"; 349 ti,hwmods = "d_can0"; 350 reg = <0x481cc000 0x2000>; 351 clocks = <&dcan0_fck>; 352 clock-names = "fck"; 353 syscon-raminit = <&am33xx_control_module 0x644 0>; 354 interrupts = <52>; 355 status = "disabled"; 356 }; 357 358 dcan1: can@481d0000 { 359 compatible = "ti,am3352-d_can"; 360 ti,hwmods = "d_can1"; 361 reg = <0x481d0000 0x2000>; 362 clocks = <&dcan1_fck>; 363 clock-names = "fck"; 364 syscon-raminit = <&am33xx_control_module 0x644 1>; 365 interrupts = <55>; 366 status = "disabled"; 367 }; 368 369 mailbox: mailbox@480C8000 { 370 compatible = "ti,omap4-mailbox"; 371 reg = <0x480C8000 0x200>; 372 interrupts = <77>; 373 ti,hwmods = "mailbox"; 374 #mbox-cells = <1>; 375 ti,mbox-num-users = <4>; 376 ti,mbox-num-fifos = <8>; 377 mbox_wkupm3: wkup_m3 { 378 ti,mbox-tx = <0 0 0>; 379 ti,mbox-rx = <0 0 3>; 380 }; 381 }; 382 383 timer1: timer@44e31000 { 384 compatible = "ti,am335x-timer-1ms"; 385 reg = <0x44e31000 0x400>; 386 interrupts = <67>; 387 ti,hwmods = "timer1"; 388 ti,timer-alwon; 389 }; 390 391 timer2: timer@48040000 { 392 compatible = "ti,am335x-timer"; 393 reg = <0x48040000 0x400>; 394 interrupts = <68>; 395 ti,hwmods = "timer2"; 396 }; 397 398 timer3: timer@48042000 { 399 compatible = "ti,am335x-timer"; 400 reg = <0x48042000 0x400>; 401 interrupts = <69>; 402 ti,hwmods = "timer3"; 403 }; 404 405 timer4: timer@48044000 { 406 compatible = "ti,am335x-timer"; 407 reg = <0x48044000 0x400>; 408 interrupts = <92>; 409 ti,hwmods = "timer4"; 410 ti,timer-pwm; 411 }; 412 413 timer5: timer@48046000 { 414 compatible = "ti,am335x-timer"; 415 reg = <0x48046000 0x400>; 416 interrupts = <93>; 417 ti,hwmods = "timer5"; 418 ti,timer-pwm; 419 }; 420 421 timer6: timer@48048000 { 422 compatible = "ti,am335x-timer"; 423 reg = <0x48048000 0x400>; 424 interrupts = <94>; 425 ti,hwmods = "timer6"; 426 ti,timer-pwm; 427 }; 428 429 timer7: timer@4804a000 { 430 compatible = "ti,am335x-timer"; 431 reg = <0x4804a000 0x400>; 432 interrupts = <95>; 433 ti,hwmods = "timer7"; 434 ti,timer-pwm; 435 }; 436 437 rtc: rtc@44e3e000 { 438 compatible = "ti,am3352-rtc", "ti,da830-rtc"; 439 reg = <0x44e3e000 0x1000>; 440 interrupts = <75 441 76>; 442 ti,hwmods = "rtc"; 443 }; 444 445 spi0: spi@48030000 { 446 compatible = "ti,omap4-mcspi"; 447 #address-cells = <1>; 448 #size-cells = <0>; 449 reg = <0x48030000 0x400>; 450 interrupts = <65>; 451 ti,spi-num-cs = <2>; 452 ti,hwmods = "spi0"; 453 dmas = <&edma 16 454 &edma 17 455 &edma 18 456 &edma 19>; 457 dma-names = "tx0", "rx0", "tx1", "rx1"; 458 status = "disabled"; 459 }; 460 461 spi1: spi@481a0000 { 462 compatible = "ti,omap4-mcspi"; 463 #address-cells = <1>; 464 #size-cells = <0>; 465 reg = <0x481a0000 0x400>; 466 interrupts = <125>; 467 ti,spi-num-cs = <2>; 468 ti,hwmods = "spi1"; 469 dmas = <&edma 42 470 &edma 43 471 &edma 44 472 &edma 45>; 473 dma-names = "tx0", "rx0", "tx1", "rx1"; 474 status = "disabled"; 475 }; 476 477 usb: usb@47400000 { 478 compatible = "ti,am33xx-usb"; 479 reg = <0x47400000 0x1000>; 480 ranges; 481 #address-cells = <1>; 482 #size-cells = <1>; 483 ti,hwmods = "usb_otg_hs"; 484 status = "disabled"; 485 486 usb_ctrl_mod: control@44e10620 { 487 compatible = "ti,am335x-usb-ctrl-module"; 488 reg = <0x44e10620 0x10 489 0x44e10648 0x4>; 490 reg-names = "phy_ctrl", "wakeup"; 491 status = "disabled"; 492 }; 493 494 usb0_phy: usb-phy@47401300 { 495 compatible = "ti,am335x-usb-phy"; 496 reg = <0x47401300 0x100>; 497 reg-names = "phy"; 498 status = "disabled"; 499 ti,ctrl_mod = <&usb_ctrl_mod>; 500 }; 501 502 usb0: usb@47401000 { 503 compatible = "ti,musb-am33xx"; 504 status = "disabled"; 505 reg = <0x47401400 0x400 506 0x47401000 0x200>; 507 reg-names = "mc", "control"; 508 509 interrupts = <18>; 510 interrupt-names = "mc"; 511 dr_mode = "otg"; 512 mentor,multipoint = <1>; 513 mentor,num-eps = <16>; 514 mentor,ram-bits = <12>; 515 mentor,power = <500>; 516 phys = <&usb0_phy>; 517 518 dmas = <&cppi41dma 0 0 &cppi41dma 1 0 519 &cppi41dma 2 0 &cppi41dma 3 0 520 &cppi41dma 4 0 &cppi41dma 5 0 521 &cppi41dma 6 0 &cppi41dma 7 0 522 &cppi41dma 8 0 &cppi41dma 9 0 523 &cppi41dma 10 0 &cppi41dma 11 0 524 &cppi41dma 12 0 &cppi41dma 13 0 525 &cppi41dma 14 0 &cppi41dma 0 1 526 &cppi41dma 1 1 &cppi41dma 2 1 527 &cppi41dma 3 1 &cppi41dma 4 1 528 &cppi41dma 5 1 &cppi41dma 6 1 529 &cppi41dma 7 1 &cppi41dma 8 1 530 &cppi41dma 9 1 &cppi41dma 10 1 531 &cppi41dma 11 1 &cppi41dma 12 1 532 &cppi41dma 13 1 &cppi41dma 14 1>; 533 dma-names = 534 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", 535 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", 536 "rx14", "rx15", 537 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", 538 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", 539 "tx14", "tx15"; 540 }; 541 542 usb1_phy: usb-phy@47401b00 { 543 compatible = "ti,am335x-usb-phy"; 544 reg = <0x47401b00 0x100>; 545 reg-names = "phy"; 546 status = "disabled"; 547 ti,ctrl_mod = <&usb_ctrl_mod>; 548 }; 549 550 usb1: usb@47401800 { 551 compatible = "ti,musb-am33xx"; 552 status = "disabled"; 553 reg = <0x47401c00 0x400 554 0x47401800 0x200>; 555 reg-names = "mc", "control"; 556 interrupts = <19>; 557 interrupt-names = "mc"; 558 dr_mode = "otg"; 559 mentor,multipoint = <1>; 560 mentor,num-eps = <16>; 561 mentor,ram-bits = <12>; 562 mentor,power = <500>; 563 phys = <&usb1_phy>; 564 565 dmas = <&cppi41dma 15 0 &cppi41dma 16 0 566 &cppi41dma 17 0 &cppi41dma 18 0 567 &cppi41dma 19 0 &cppi41dma 20 0 568 &cppi41dma 21 0 &cppi41dma 22 0 569 &cppi41dma 23 0 &cppi41dma 24 0 570 &cppi41dma 25 0 &cppi41dma 26 0 571 &cppi41dma 27 0 &cppi41dma 28 0 572 &cppi41dma 29 0 &cppi41dma 15 1 573 &cppi41dma 16 1 &cppi41dma 17 1 574 &cppi41dma 18 1 &cppi41dma 19 1 575 &cppi41dma 20 1 &cppi41dma 21 1 576 &cppi41dma 22 1 &cppi41dma 23 1 577 &cppi41dma 24 1 &cppi41dma 25 1 578 &cppi41dma 26 1 &cppi41dma 27 1 579 &cppi41dma 28 1 &cppi41dma 29 1>; 580 dma-names = 581 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", 582 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", 583 "rx14", "rx15", 584 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", 585 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", 586 "tx14", "tx15"; 587 }; 588 589 cppi41dma: dma-controller@47402000 { 590 compatible = "ti,am3359-cppi41"; 591 reg = <0x47400000 0x1000 592 0x47402000 0x1000 593 0x47403000 0x1000 594 0x47404000 0x4000>; 595 reg-names = "glue", "controller", "scheduler", "queuemgr"; 596 interrupts = <17>; 597 interrupt-names = "glue"; 598 #dma-cells = <2>; 599 #dma-channels = <30>; 600 #dma-requests = <256>; 601 status = "disabled"; 602 }; 603 }; 604 605 epwmss0: epwmss@48300000 { 606 compatible = "ti,am33xx-pwmss"; 607 reg = <0x48300000 0x10>; 608 ti,hwmods = "epwmss0"; 609 #address-cells = <1>; 610 #size-cells = <1>; 611 status = "disabled"; 612 ranges = <0x48300100 0x48300100 0x80 /* ECAP */ 613 0x48300180 0x48300180 0x80 /* EQEP */ 614 0x48300200 0x48300200 0x80>; /* EHRPWM */ 615 616 ecap0: ecap@48300100 { 617 compatible = "ti,am33xx-ecap"; 618 #pwm-cells = <3>; 619 reg = <0x48300100 0x80>; 620 interrupts = <31>; 621 interrupt-names = "ecap0"; 622 ti,hwmods = "ecap0"; 623 status = "disabled"; 624 }; 625 626 ehrpwm0: ehrpwm@48300200 { 627 compatible = "ti,am33xx-ehrpwm"; 628 #pwm-cells = <3>; 629 reg = <0x48300200 0x80>; 630 ti,hwmods = "ehrpwm0"; 631 status = "disabled"; 632 }; 633 }; 634 635 epwmss1: epwmss@48302000 { 636 compatible = "ti,am33xx-pwmss"; 637 reg = <0x48302000 0x10>; 638 ti,hwmods = "epwmss1"; 639 #address-cells = <1>; 640 #size-cells = <1>; 641 status = "disabled"; 642 ranges = <0x48302100 0x48302100 0x80 /* ECAP */ 643 0x48302180 0x48302180 0x80 /* EQEP */ 644 0x48302200 0x48302200 0x80>; /* EHRPWM */ 645 646 ecap1: ecap@48302100 { 647 compatible = "ti,am33xx-ecap"; 648 #pwm-cells = <3>; 649 reg = <0x48302100 0x80>; 650 interrupts = <47>; 651 interrupt-names = "ecap1"; 652 ti,hwmods = "ecap1"; 653 status = "disabled"; 654 }; 655 656 ehrpwm1: ehrpwm@48302200 { 657 compatible = "ti,am33xx-ehrpwm"; 658 #pwm-cells = <3>; 659 reg = <0x48302200 0x80>; 660 ti,hwmods = "ehrpwm1"; 661 status = "disabled"; 662 }; 663 }; 664 665 epwmss2: epwmss@48304000 { 666 compatible = "ti,am33xx-pwmss"; 667 reg = <0x48304000 0x10>; 668 ti,hwmods = "epwmss2"; 669 #address-cells = <1>; 670 #size-cells = <1>; 671 status = "disabled"; 672 ranges = <0x48304100 0x48304100 0x80 /* ECAP */ 673 0x48304180 0x48304180 0x80 /* EQEP */ 674 0x48304200 0x48304200 0x80>; /* EHRPWM */ 675 676 ecap2: ecap@48304100 { 677 compatible = "ti,am33xx-ecap"; 678 #pwm-cells = <3>; 679 reg = <0x48304100 0x80>; 680 interrupts = <61>; 681 interrupt-names = "ecap2"; 682 ti,hwmods = "ecap2"; 683 status = "disabled"; 684 }; 685 686 ehrpwm2: ehrpwm@48304200 { 687 compatible = "ti,am33xx-ehrpwm"; 688 #pwm-cells = <3>; 689 reg = <0x48304200 0x80>; 690 ti,hwmods = "ehrpwm2"; 691 status = "disabled"; 692 }; 693 }; 694 695 mac: ethernet@4a100000 { 696 compatible = "ti,cpsw"; 697 ti,hwmods = "cpgmac0"; 698 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>; 699 clock-names = "fck", "cpts"; 700 cpdma_channels = <8>; 701 ale_entries = <1024>; 702 bd_ram_size = <0x2000>; 703 no_bd_ram = <0>; 704 rx_descs = <64>; 705 mac_control = <0x20>; 706 slaves = <2>; 707 active_slave = <0>; 708 cpts_clock_mult = <0x80000000>; 709 cpts_clock_shift = <29>; 710 reg = <0x4a100000 0x800 711 0x4a101200 0x100>; 712 #address-cells = <1>; 713 #size-cells = <1>; 714 interrupt-parent = <&intc>; 715 /* 716 * c0_rx_thresh_pend 717 * c0_rx_pend 718 * c0_tx_pend 719 * c0_misc_pend 720 */ 721 interrupts = <40 41 42 43>; 722 ranges; 723 syscon = <&cm>; 724 status = "disabled"; 725 726 davinci_mdio: mdio@4a101000 { 727 compatible = "ti,davinci_mdio"; 728 #address-cells = <1>; 729 #size-cells = <0>; 730 ti,hwmods = "davinci_mdio"; 731 bus_freq = <1000000>; 732 reg = <0x4a101000 0x100>; 733 status = "disabled"; 734 }; 735 736 cpsw_emac0: slave@4a100200 { 737 /* Filled in by U-Boot */ 738 mac-address = [ 00 00 00 00 00 00 ]; 739 }; 740 741 cpsw_emac1: slave@4a100300 { 742 /* Filled in by U-Boot */ 743 mac-address = [ 00 00 00 00 00 00 ]; 744 }; 745 746 phy_sel: cpsw-phy-sel@44e10650 { 747 compatible = "ti,am3352-cpsw-phy-sel"; 748 reg= <0x44e10650 0x4>; 749 reg-names = "gmii-sel"; 750 }; 751 }; 752 753 ocmcram: ocmcram@40300000 { 754 compatible = "mmio-sram"; 755 reg = <0x40300000 0x10000>; /* 64k */ 756 }; 757 758 wkup_m3: wkup_m3@44d00000 { 759 compatible = "ti,am3353-wkup-m3"; 760 reg = <0x44d00000 0x4000 /* M3 UMEM */ 761 0x44d80000 0x2000>; /* M3 DMEM */ 762 ti,hwmods = "wkup_m3"; 763 ti,no-reset-on-init; 764 }; 765 766 elm: elm@48080000 { 767 compatible = "ti,am3352-elm"; 768 reg = <0x48080000 0x2000>; 769 interrupts = <4>; 770 ti,hwmods = "elm"; 771 status = "disabled"; 772 }; 773 774 lcdc: lcdc@4830e000 { 775 compatible = "ti,am33xx-tilcdc"; 776 reg = <0x4830e000 0x1000>; 777 interrupt-parent = <&intc>; 778 interrupts = <36>; 779 ti,hwmods = "lcdc"; 780 status = "disabled"; 781 }; 782 783 tscadc: tscadc@44e0d000 { 784 compatible = "ti,am3359-tscadc"; 785 reg = <0x44e0d000 0x1000>; 786 interrupt-parent = <&intc>; 787 interrupts = <16>; 788 ti,hwmods = "adc_tsc"; 789 status = "disabled"; 790 791 tsc { 792 compatible = "ti,am3359-tsc"; 793 }; 794 am335x_adc: adc { 795 #io-channel-cells = <1>; 796 compatible = "ti,am3359-adc"; 797 }; 798 }; 799 800 gpmc: gpmc@50000000 { 801 compatible = "ti,am3352-gpmc"; 802 ti,hwmods = "gpmc"; 803 ti,no-idle-on-init; 804 reg = <0x50000000 0x2000>; 805 interrupts = <100>; 806 gpmc,num-cs = <7>; 807 gpmc,num-waitpins = <2>; 808 #address-cells = <2>; 809 #size-cells = <1>; 810 status = "disabled"; 811 }; 812 813 sham: sham@53100000 { 814 compatible = "ti,omap4-sham"; 815 ti,hwmods = "sham"; 816 reg = <0x53100000 0x200>; 817 interrupts = <109>; 818 dmas = <&edma 36>; 819 dma-names = "rx"; 820 }; 821 822 aes: aes@53500000 { 823 compatible = "ti,omap4-aes"; 824 ti,hwmods = "aes"; 825 reg = <0x53500000 0xa0>; 826 interrupts = <103>; 827 dmas = <&edma 6>, 828 <&edma 5>; 829 dma-names = "tx", "rx"; 830 }; 831 832 mcasp0: mcasp@48038000 { 833 compatible = "ti,am33xx-mcasp-audio"; 834 ti,hwmods = "mcasp0"; 835 reg = <0x48038000 0x2000>, 836 <0x46000000 0x400000>; 837 reg-names = "mpu", "dat"; 838 interrupts = <80>, <81>; 839 interrupt-names = "tx", "rx"; 840 status = "disabled"; 841 dmas = <&edma 8>, 842 <&edma 9>; 843 dma-names = "tx", "rx"; 844 }; 845 846 mcasp1: mcasp@4803C000 { 847 compatible = "ti,am33xx-mcasp-audio"; 848 ti,hwmods = "mcasp1"; 849 reg = <0x4803C000 0x2000>, 850 <0x46400000 0x400000>; 851 reg-names = "mpu", "dat"; 852 interrupts = <82>, <83>; 853 interrupt-names = "tx", "rx"; 854 status = "disabled"; 855 dmas = <&edma 10>, 856 <&edma 11>; 857 dma-names = "tx", "rx"; 858 }; 859 860 rng: rng@48310000 { 861 compatible = "ti,omap4-rng"; 862 ti,hwmods = "rng"; 863 reg = <0x48310000 0x2000>; 864 interrupts = <111>; 865 }; 866 }; 867}; 868 869/include/ "am33xx-clocks.dtsi" 870