vt_vga.c revision 287126
1/*- 2 * Copyright (c) 2005 Marcel Moolenaar 3 * All rights reserved. 4 * 5 * Copyright (c) 2009 The FreeBSD Foundation 6 * All rights reserved. 7 * 8 * Portions of this software were developed by Ed Schouten 9 * under sponsorship from the FreeBSD Foundation. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33#include <sys/cdefs.h> 34__FBSDID("$FreeBSD: stable/10/sys/dev/vt/hw/vga/vt_vga.c 287126 2015-08-25 14:39:40Z marcel $"); 35 36#include <sys/param.h> 37#include <sys/kernel.h> 38#include <sys/systm.h> 39 40#include <dev/vt/vt.h> 41#include <dev/vt/hw/vga/vt_vga_reg.h> 42 43#include <machine/bus.h> 44 45struct vga_softc { 46 bus_space_tag_t vga_fb_tag; 47 bus_space_handle_t vga_fb_handle; 48 bus_space_tag_t vga_reg_tag; 49 bus_space_handle_t vga_reg_handle; 50 int vga_wmode; 51 term_color_t vga_curfg, vga_curbg; 52}; 53 54/* Convenience macros. */ 55#define MEM_READ1(sc, ofs) \ 56 bus_space_read_1(sc->vga_fb_tag, sc->vga_fb_handle, ofs) 57#define MEM_WRITE1(sc, ofs, val) \ 58 bus_space_write_1(sc->vga_fb_tag, sc->vga_fb_handle, ofs, val) 59#define REG_READ1(sc, reg) \ 60 bus_space_read_1(sc->vga_reg_tag, sc->vga_reg_handle, reg) 61#define REG_WRITE1(sc, reg, val) \ 62 bus_space_write_1(sc->vga_reg_tag, sc->vga_reg_handle, reg, val) 63 64#define VT_VGA_WIDTH 640 65#define VT_VGA_HEIGHT 480 66#define VT_VGA_MEMSIZE (VT_VGA_WIDTH * VT_VGA_HEIGHT / 8) 67 68/* 69 * VGA is designed to handle 8 pixels at a time (8 pixels in one byte of 70 * memory). 71 */ 72#define VT_VGA_PIXELS_BLOCK 8 73 74/* 75 * We use an off-screen addresses to: 76 * o store the background color; 77 * o store pixels pattern. 78 * Those addresses are then loaded in the latches once. 79 */ 80#define VT_VGA_BGCOLOR_OFFSET VT_VGA_MEMSIZE 81 82static vd_probe_t vga_probe; 83static vd_init_t vga_init; 84static vd_blank_t vga_blank; 85static vd_bitblt_text_t vga_bitblt_text; 86static vd_bitblt_bmp_t vga_bitblt_bitmap; 87static vd_drawrect_t vga_drawrect; 88static vd_setpixel_t vga_setpixel; 89static vd_postswitch_t vga_postswitch; 90 91static const struct vt_driver vt_vga_driver = { 92 .vd_name = "vga", 93 .vd_probe = vga_probe, 94 .vd_init = vga_init, 95 .vd_blank = vga_blank, 96 .vd_bitblt_text = vga_bitblt_text, 97 .vd_bitblt_bmp = vga_bitblt_bitmap, 98 .vd_drawrect = vga_drawrect, 99 .vd_setpixel = vga_setpixel, 100 .vd_postswitch = vga_postswitch, 101 .vd_priority = VD_PRIORITY_GENERIC, 102}; 103 104/* 105 * Driver supports both text mode and graphics mode. Make sure the 106 * buffer is always big enough to support both. 107 */ 108static struct vga_softc vga_conssoftc; 109VT_DRIVER_DECLARE(vt_vga, vt_vga_driver); 110 111static inline void 112vga_setwmode(struct vt_device *vd, int wmode) 113{ 114 struct vga_softc *sc = vd->vd_softc; 115 116 if (sc->vga_wmode == wmode) 117 return; 118 119 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 120 REG_WRITE1(sc, VGA_GC_DATA, wmode); 121 sc->vga_wmode = wmode; 122 123 switch (wmode) { 124 case 3: 125 /* Re-enable all plans. */ 126 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 127 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 | 128 VGA_SEQ_MM_EM1 | VGA_SEQ_MM_EM0); 129 break; 130 } 131} 132 133static inline void 134vga_setfg(struct vt_device *vd, term_color_t color) 135{ 136 struct vga_softc *sc = vd->vd_softc; 137 138 vga_setwmode(vd, 3); 139 140 if (sc->vga_curfg == color) 141 return; 142 143 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 144 REG_WRITE1(sc, VGA_GC_DATA, color); 145 sc->vga_curfg = color; 146} 147 148static inline void 149vga_setbg(struct vt_device *vd, term_color_t color) 150{ 151 struct vga_softc *sc = vd->vd_softc; 152 153 vga_setwmode(vd, 3); 154 155 if (sc->vga_curbg == color) 156 return; 157 158 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 159 REG_WRITE1(sc, VGA_GC_DATA, color); 160 161 /* 162 * Write 8 pixels using the background color to an off-screen 163 * byte in the video memory. 164 */ 165 MEM_WRITE1(sc, VT_VGA_BGCOLOR_OFFSET, 0xff); 166 167 /* 168 * Read those 8 pixels back to load the background color in the 169 * latches register. 170 */ 171 MEM_READ1(sc, VT_VGA_BGCOLOR_OFFSET); 172 173 sc->vga_curbg = color; 174 175 /* 176 * The Set/Reset register doesn't contain the fg color anymore, 177 * store an invalid color. 178 */ 179 sc->vga_curfg = 0xff; 180} 181 182/* 183 * Binary searchable table for Unicode to CP437 conversion. 184 */ 185 186struct unicp437 { 187 uint16_t unicode_base; 188 uint8_t cp437_base; 189 uint8_t length; 190}; 191 192static const struct unicp437 cp437table[] = { 193 { 0x0020, 0x20, 0x5e }, { 0x00a0, 0x20, 0x00 }, 194 { 0x00a1, 0xad, 0x00 }, { 0x00a2, 0x9b, 0x00 }, 195 { 0x00a3, 0x9c, 0x00 }, { 0x00a5, 0x9d, 0x00 }, 196 { 0x00a7, 0x15, 0x00 }, { 0x00aa, 0xa6, 0x00 }, 197 { 0x00ab, 0xae, 0x00 }, { 0x00ac, 0xaa, 0x00 }, 198 { 0x00b0, 0xf8, 0x00 }, { 0x00b1, 0xf1, 0x00 }, 199 { 0x00b2, 0xfd, 0x00 }, { 0x00b5, 0xe6, 0x00 }, 200 { 0x00b6, 0x14, 0x00 }, { 0x00b7, 0xfa, 0x00 }, 201 { 0x00ba, 0xa7, 0x00 }, { 0x00bb, 0xaf, 0x00 }, 202 { 0x00bc, 0xac, 0x00 }, { 0x00bd, 0xab, 0x00 }, 203 { 0x00bf, 0xa8, 0x00 }, { 0x00c4, 0x8e, 0x01 }, 204 { 0x00c6, 0x92, 0x00 }, { 0x00c7, 0x80, 0x00 }, 205 { 0x00c9, 0x90, 0x00 }, { 0x00d1, 0xa5, 0x00 }, 206 { 0x00d6, 0x99, 0x00 }, { 0x00dc, 0x9a, 0x00 }, 207 { 0x00df, 0xe1, 0x00 }, { 0x00e0, 0x85, 0x00 }, 208 { 0x00e1, 0xa0, 0x00 }, { 0x00e2, 0x83, 0x00 }, 209 { 0x00e4, 0x84, 0x00 }, { 0x00e5, 0x86, 0x00 }, 210 { 0x00e6, 0x91, 0x00 }, { 0x00e7, 0x87, 0x00 }, 211 { 0x00e8, 0x8a, 0x00 }, { 0x00e9, 0x82, 0x00 }, 212 { 0x00ea, 0x88, 0x01 }, { 0x00ec, 0x8d, 0x00 }, 213 { 0x00ed, 0xa1, 0x00 }, { 0x00ee, 0x8c, 0x00 }, 214 { 0x00ef, 0x8b, 0x00 }, { 0x00f0, 0xeb, 0x00 }, 215 { 0x00f1, 0xa4, 0x00 }, { 0x00f2, 0x95, 0x00 }, 216 { 0x00f3, 0xa2, 0x00 }, { 0x00f4, 0x93, 0x00 }, 217 { 0x00f6, 0x94, 0x00 }, { 0x00f7, 0xf6, 0x00 }, 218 { 0x00f8, 0xed, 0x00 }, { 0x00f9, 0x97, 0x00 }, 219 { 0x00fa, 0xa3, 0x00 }, { 0x00fb, 0x96, 0x00 }, 220 { 0x00fc, 0x81, 0x00 }, { 0x00ff, 0x98, 0x00 }, 221 { 0x0192, 0x9f, 0x00 }, { 0x0393, 0xe2, 0x00 }, 222 { 0x0398, 0xe9, 0x00 }, { 0x03a3, 0xe4, 0x00 }, 223 { 0x03a6, 0xe8, 0x00 }, { 0x03a9, 0xea, 0x00 }, 224 { 0x03b1, 0xe0, 0x01 }, { 0x03b4, 0xeb, 0x00 }, 225 { 0x03b5, 0xee, 0x00 }, { 0x03bc, 0xe6, 0x00 }, 226 { 0x03c0, 0xe3, 0x00 }, { 0x03c3, 0xe5, 0x00 }, 227 { 0x03c4, 0xe7, 0x00 }, { 0x03c6, 0xed, 0x00 }, 228 { 0x03d5, 0xed, 0x00 }, { 0x2010, 0x2d, 0x00 }, 229 { 0x2014, 0x2d, 0x00 }, { 0x2018, 0x60, 0x00 }, 230 { 0x2019, 0x27, 0x00 }, { 0x201c, 0x22, 0x00 }, 231 { 0x201d, 0x22, 0x00 }, { 0x2022, 0x07, 0x00 }, 232 { 0x203c, 0x13, 0x00 }, { 0x207f, 0xfc, 0x00 }, 233 { 0x20a7, 0x9e, 0x00 }, { 0x20ac, 0xee, 0x00 }, 234 { 0x2126, 0xea, 0x00 }, { 0x2190, 0x1b, 0x00 }, 235 { 0x2191, 0x18, 0x00 }, { 0x2192, 0x1a, 0x00 }, 236 { 0x2193, 0x19, 0x00 }, { 0x2194, 0x1d, 0x00 }, 237 { 0x2195, 0x12, 0x00 }, { 0x21a8, 0x17, 0x00 }, 238 { 0x2202, 0xeb, 0x00 }, { 0x2208, 0xee, 0x00 }, 239 { 0x2211, 0xe4, 0x00 }, { 0x2212, 0x2d, 0x00 }, 240 { 0x2219, 0xf9, 0x00 }, { 0x221a, 0xfb, 0x00 }, 241 { 0x221e, 0xec, 0x00 }, { 0x221f, 0x1c, 0x00 }, 242 { 0x2229, 0xef, 0x00 }, { 0x2248, 0xf7, 0x00 }, 243 { 0x2261, 0xf0, 0x00 }, { 0x2264, 0xf3, 0x00 }, 244 { 0x2265, 0xf2, 0x00 }, { 0x2302, 0x7f, 0x00 }, 245 { 0x2310, 0xa9, 0x00 }, { 0x2320, 0xf4, 0x00 }, 246 { 0x2321, 0xf5, 0x00 }, { 0x2500, 0xc4, 0x00 }, 247 { 0x2502, 0xb3, 0x00 }, { 0x250c, 0xda, 0x00 }, 248 { 0x2510, 0xbf, 0x00 }, { 0x2514, 0xc0, 0x00 }, 249 { 0x2518, 0xd9, 0x00 }, { 0x251c, 0xc3, 0x00 }, 250 { 0x2524, 0xb4, 0x00 }, { 0x252c, 0xc2, 0x00 }, 251 { 0x2534, 0xc1, 0x00 }, { 0x253c, 0xc5, 0x00 }, 252 { 0x2550, 0xcd, 0x00 }, { 0x2551, 0xba, 0x00 }, 253 { 0x2552, 0xd5, 0x00 }, { 0x2553, 0xd6, 0x00 }, 254 { 0x2554, 0xc9, 0x00 }, { 0x2555, 0xb8, 0x00 }, 255 { 0x2556, 0xb7, 0x00 }, { 0x2557, 0xbb, 0x00 }, 256 { 0x2558, 0xd4, 0x00 }, { 0x2559, 0xd3, 0x00 }, 257 { 0x255a, 0xc8, 0x00 }, { 0x255b, 0xbe, 0x00 }, 258 { 0x255c, 0xbd, 0x00 }, { 0x255d, 0xbc, 0x00 }, 259 { 0x255e, 0xc6, 0x01 }, { 0x2560, 0xcc, 0x00 }, 260 { 0x2561, 0xb5, 0x00 }, { 0x2562, 0xb6, 0x00 }, 261 { 0x2563, 0xb9, 0x00 }, { 0x2564, 0xd1, 0x01 }, 262 { 0x2566, 0xcb, 0x00 }, { 0x2567, 0xcf, 0x00 }, 263 { 0x2568, 0xd0, 0x00 }, { 0x2569, 0xca, 0x00 }, 264 { 0x256a, 0xd8, 0x00 }, { 0x256b, 0xd7, 0x00 }, 265 { 0x256c, 0xce, 0x00 }, { 0x2580, 0xdf, 0x00 }, 266 { 0x2584, 0xdc, 0x00 }, { 0x2588, 0xdb, 0x00 }, 267 { 0x258c, 0xdd, 0x00 }, { 0x2590, 0xde, 0x00 }, 268 { 0x2591, 0xb0, 0x02 }, { 0x25a0, 0xfe, 0x00 }, 269 { 0x25ac, 0x16, 0x00 }, { 0x25b2, 0x1e, 0x00 }, 270 { 0x25ba, 0x10, 0x00 }, { 0x25bc, 0x1f, 0x00 }, 271 { 0x25c4, 0x11, 0x00 }, { 0x25cb, 0x09, 0x00 }, 272 { 0x25d8, 0x08, 0x00 }, { 0x25d9, 0x0a, 0x00 }, 273 { 0x263a, 0x01, 0x01 }, { 0x263c, 0x0f, 0x00 }, 274 { 0x2640, 0x0c, 0x00 }, { 0x2642, 0x0b, 0x00 }, 275 { 0x2660, 0x06, 0x00 }, { 0x2663, 0x05, 0x00 }, 276 { 0x2665, 0x03, 0x01 }, { 0x266a, 0x0d, 0x00 }, 277 { 0x266c, 0x0e, 0x00 }, 278}; 279 280static uint8_t 281vga_get_cp437(term_char_t c) 282{ 283 int min, mid, max; 284 285 min = 0; 286 max = (sizeof(cp437table) / sizeof(struct unicp437)) - 1; 287 288 if (c < cp437table[0].unicode_base || 289 c > cp437table[max].unicode_base + cp437table[max].length) 290 return '?'; 291 292 while (max >= min) { 293 mid = (min + max) / 2; 294 if (c < cp437table[mid].unicode_base) 295 max = mid - 1; 296 else if (c > cp437table[mid].unicode_base + 297 cp437table[mid].length) 298 min = mid + 1; 299 else 300 return (c - cp437table[mid].unicode_base + 301 cp437table[mid].cp437_base); 302 } 303 304 return '?'; 305} 306 307static void 308vga_blank(struct vt_device *vd, term_color_t color) 309{ 310 struct vga_softc *sc = vd->vd_softc; 311 u_int ofs; 312 313 vga_setfg(vd, color); 314 for (ofs = 0; ofs < VT_VGA_MEMSIZE; ofs++) 315 MEM_WRITE1(sc, ofs, 0xff); 316} 317 318static inline void 319vga_bitblt_put(struct vt_device *vd, u_long dst, term_color_t color, 320 uint8_t v) 321{ 322 struct vga_softc *sc = vd->vd_softc; 323 324 /* Skip empty writes, in order to avoid palette changes. */ 325 if (v != 0x00) { 326 vga_setfg(vd, color); 327 /* 328 * When this MEM_READ1() gets disabled, all sorts of 329 * artifacts occur. This is because this read loads the 330 * set of 8 pixels that are about to be changed. There 331 * is one scenario where we can avoid the read, namely 332 * if all pixels are about to be overwritten anyway. 333 */ 334 if (v != 0xff) { 335 MEM_READ1(sc, dst); 336 337 /* The bg color was trashed by the reads. */ 338 sc->vga_curbg = 0xff; 339 } 340 MEM_WRITE1(sc, dst, v); 341 } 342} 343 344static void 345vga_setpixel(struct vt_device *vd, int x, int y, term_color_t color) 346{ 347 348 if (vd->vd_flags & VDF_TEXTMODE) 349 return; 350 351 vga_bitblt_put(vd, (y * VT_VGA_WIDTH / 8) + (x / 8), color, 352 0x80 >> (x % 8)); 353} 354 355static void 356vga_drawrect(struct vt_device *vd, int x1, int y1, int x2, int y2, int fill, 357 term_color_t color) 358{ 359 int x, y; 360 361 if (vd->vd_flags & VDF_TEXTMODE) 362 return; 363 364 for (y = y1; y <= y2; y++) { 365 if (fill || (y == y1) || (y == y2)) { 366 for (x = x1; x <= x2; x++) 367 vga_setpixel(vd, x, y, color); 368 } else { 369 vga_setpixel(vd, x1, y, color); 370 vga_setpixel(vd, x2, y, color); 371 } 372 } 373} 374 375static void 376vga_compute_shifted_pattern(const uint8_t *src, unsigned int bytes, 377 unsigned int src_x, unsigned int x_count, unsigned int dst_x, 378 uint8_t *pattern, uint8_t *mask) 379{ 380 unsigned int n; 381 382 n = src_x / 8; 383 384 /* 385 * This mask has bits set, where a pixel (ether 0 or 1) 386 * comes from the source bitmap. 387 */ 388 if (mask != NULL) { 389 *mask = (0xff 390 >> (8 - x_count)) 391 << (8 - x_count - dst_x); 392 } 393 394 if (n == (src_x + x_count - 1) / 8) { 395 /* All the pixels we want are in the same byte. */ 396 *pattern = src[n]; 397 if (dst_x >= src_x) 398 *pattern >>= (dst_x - src_x % 8); 399 else 400 *pattern <<= (src_x % 8 - dst_x); 401 } else { 402 /* The pixels we want are split into two bytes. */ 403 if (dst_x >= src_x % 8) { 404 *pattern = 405 src[n] << (8 - dst_x - src_x % 8) | 406 src[n + 1] >> (dst_x - src_x % 8); 407 } else { 408 *pattern = 409 src[n] << (src_x % 8 - dst_x) | 410 src[n + 1] >> (8 - src_x % 8 - dst_x); 411 } 412 } 413} 414 415static void 416vga_copy_bitmap_portion(uint8_t *pattern_2colors, uint8_t *pattern_ncolors, 417 const uint8_t *src, const uint8_t *src_mask, unsigned int src_width, 418 unsigned int src_x, unsigned int dst_x, unsigned int x_count, 419 unsigned int src_y, unsigned int dst_y, unsigned int y_count, 420 term_color_t fg, term_color_t bg, int overwrite) 421{ 422 unsigned int i, bytes; 423 uint8_t pattern, relevant_bits, mask; 424 425 bytes = (src_width + 7) / 8; 426 427 for (i = 0; i < y_count; ++i) { 428 vga_compute_shifted_pattern(src + (src_y + i) * bytes, 429 bytes, src_x, x_count, dst_x, &pattern, &relevant_bits); 430 431 if (src_mask == NULL) { 432 /* 433 * No src mask. Consider that all wanted bits 434 * from the source are "authoritative". 435 */ 436 mask = relevant_bits; 437 } else { 438 /* 439 * There's an src mask. We shift it the same way 440 * we shifted the source pattern. 441 */ 442 vga_compute_shifted_pattern( 443 src_mask + (src_y + i) * bytes, 444 bytes, src_x, x_count, dst_x, 445 &mask, NULL); 446 447 /* Now, only keep the wanted bits among them. */ 448 mask &= relevant_bits; 449 } 450 451 /* 452 * Clear bits from the pattern which must be 453 * transparent, according to the source mask. 454 */ 455 pattern &= mask; 456 457 /* Set the bits in the 2-colors array. */ 458 if (overwrite) 459 pattern_2colors[dst_y + i] &= ~mask; 460 pattern_2colors[dst_y + i] |= pattern; 461 462 if (pattern_ncolors == NULL) 463 continue; 464 465 /* 466 * Set the same bits in the n-colors array. This one 467 * supports transparency, when a given bit is cleared in 468 * all colors. 469 */ 470 if (overwrite) { 471 /* 472 * Ensure that the pixels used by this bitmap are 473 * cleared in other colors. 474 */ 475 for (int j = 0; j < 16; ++j) 476 pattern_ncolors[(dst_y + i) * 16 + j] &= 477 ~mask; 478 } 479 pattern_ncolors[(dst_y + i) * 16 + fg] |= pattern; 480 pattern_ncolors[(dst_y + i) * 16 + bg] |= (~pattern & mask); 481 } 482} 483 484static void 485vga_bitblt_pixels_block_2colors(struct vt_device *vd, const uint8_t *masks, 486 term_color_t fg, term_color_t bg, 487 unsigned int x, unsigned int y, unsigned int height) 488{ 489 unsigned int i, offset; 490 struct vga_softc *sc; 491 492 /* 493 * The great advantage of Write Mode 3 is that we just need 494 * to load the foreground in the Set/Reset register, load the 495 * background color in the latches register (this is done 496 * through a write in offscreen memory followed by a read of 497 * that data), then write the pattern to video memory. This 498 * pattern indicates if the pixel should use the foreground 499 * color (bit set) or the background color (bit cleared). 500 */ 501 502 vga_setbg(vd, bg); 503 vga_setfg(vd, fg); 504 505 sc = vd->vd_softc; 506 offset = (VT_VGA_WIDTH * y + x) / 8; 507 508 for (i = 0; i < height; ++i, offset += VT_VGA_WIDTH / 8) { 509 MEM_WRITE1(sc, offset, masks[i]); 510 } 511} 512 513static void 514vga_bitblt_pixels_block_ncolors(struct vt_device *vd, const uint8_t *masks, 515 unsigned int x, unsigned int y, unsigned int height) 516{ 517 unsigned int i, j, plan, color, offset; 518 struct vga_softc *sc; 519 uint8_t mask, plans[height * 4]; 520 521 sc = vd->vd_softc; 522 523 memset(plans, 0, sizeof(plans)); 524 525 /* 526 * To write a group of pixels using 3 or more colors, we select 527 * Write Mode 0 and write one byte to each plan separately. 528 */ 529 530 /* 531 * We first compute each byte: each plan contains one bit of the 532 * color code for each of the 8 pixels. 533 * 534 * For example, if the 8 pixels are like this: 535 * GBBBBBBY 536 * where: 537 * G (gray) = 0b0111 538 * B (black) = 0b0000 539 * Y (yellow) = 0b0011 540 * 541 * The corresponding for bytes are: 542 * GBBBBBBY 543 * Plan 0: 10000001 = 0x81 544 * Plan 1: 10000001 = 0x81 545 * Plan 2: 10000000 = 0x80 546 * Plan 3: 00000000 = 0x00 547 * | | | 548 * | | +-> 0b0011 (Y) 549 * | +-----> 0b0000 (B) 550 * +--------> 0b0111 (G) 551 */ 552 553 for (i = 0; i < height; ++i) { 554 for (color = 0; color < 16; ++color) { 555 mask = masks[i * 16 + color]; 556 if (mask == 0x00) 557 continue; 558 559 for (j = 0; j < 8; ++j) { 560 if (!((mask >> (7 - j)) & 0x1)) 561 continue; 562 563 /* The pixel "j" uses color "color". */ 564 for (plan = 0; plan < 4; ++plan) 565 plans[i * 4 + plan] |= 566 ((color >> plan) & 0x1) << (7 - j); 567 } 568 } 569 } 570 571 /* 572 * The bytes are ready: we now switch to Write Mode 0 and write 573 * all bytes, one plan at a time. 574 */ 575 vga_setwmode(vd, 0); 576 577 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 578 for (plan = 0; plan < 4; ++plan) { 579 /* Select plan. */ 580 REG_WRITE1(sc, VGA_SEQ_DATA, 1 << plan); 581 582 /* Write all bytes for this plan, from Y to Y+height. */ 583 for (i = 0; i < height; ++i) { 584 offset = (VT_VGA_WIDTH * (y + i) + x) / 8; 585 MEM_WRITE1(sc, offset, plans[i * 4 + plan]); 586 } 587 } 588} 589 590static void 591vga_bitblt_one_text_pixels_block(struct vt_device *vd, 592 const struct vt_window *vw, unsigned int x, unsigned int y) 593{ 594 const struct vt_buf *vb; 595 const struct vt_font *vf; 596 unsigned int i, col, row, src_x, x_count; 597 unsigned int used_colors_list[16], used_colors; 598 uint8_t pattern_2colors[vw->vw_font->vf_height]; 599 uint8_t pattern_ncolors[vw->vw_font->vf_height * 16]; 600 term_char_t c; 601 term_color_t fg, bg; 602 const uint8_t *src; 603 604 vb = &vw->vw_buf; 605 vf = vw->vw_font; 606 607 /* 608 * The current pixels block. 609 * 610 * We fill it with portions of characters, because both "grids" 611 * may not match. 612 * 613 * i is the index in this pixels block. 614 */ 615 616 i = x; 617 used_colors = 0; 618 memset(used_colors_list, 0, sizeof(used_colors_list)); 619 memset(pattern_2colors, 0, sizeof(pattern_2colors)); 620 memset(pattern_ncolors, 0, sizeof(pattern_ncolors)); 621 622 if (i < vw->vw_draw_area.tr_begin.tp_col) { 623 /* 624 * i is in the margin used to center the text area on 625 * the screen. 626 */ 627 628 i = vw->vw_draw_area.tr_begin.tp_col; 629 } 630 631 while (i < x + VT_VGA_PIXELS_BLOCK && 632 i < vw->vw_draw_area.tr_end.tp_col) { 633 /* 634 * Find which character is drawn on this pixel in the 635 * pixels block. 636 * 637 * While here, record what colors it uses. 638 */ 639 640 col = (i - vw->vw_draw_area.tr_begin.tp_col) / vf->vf_width; 641 row = (y - vw->vw_draw_area.tr_begin.tp_row) / vf->vf_height; 642 643 c = VTBUF_GET_FIELD(vb, row, col); 644 src = vtfont_lookup(vf, c); 645 646 vt_determine_colors(c, VTBUF_ISCURSOR(vb, row, col), &fg, &bg); 647 if ((used_colors_list[fg] & 0x1) != 0x1) 648 used_colors++; 649 if ((used_colors_list[bg] & 0x2) != 0x2) 650 used_colors++; 651 used_colors_list[fg] |= 0x1; 652 used_colors_list[bg] |= 0x2; 653 654 /* 655 * Compute the portion of the character we want to draw, 656 * because the pixels block may start in the middle of a 657 * character. 658 * 659 * The first pixel to draw in the character is 660 * the current position - 661 * the start position of the character 662 * 663 * The last pixel to draw is either 664 * - the last pixel of the character, or 665 * - the pixel of the character matching the end of 666 * the pixels block 667 * whichever comes first. This position is then 668 * changed to be relative to the start position of the 669 * character. 670 */ 671 672 src_x = i - 673 (col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col); 674 x_count = min(min( 675 (col + 1) * vf->vf_width + 676 vw->vw_draw_area.tr_begin.tp_col, 677 x + VT_VGA_PIXELS_BLOCK), 678 vw->vw_draw_area.tr_end.tp_col); 679 x_count -= col * vf->vf_width + 680 vw->vw_draw_area.tr_begin.tp_col; 681 x_count -= src_x; 682 683 /* Copy a portion of the character. */ 684 vga_copy_bitmap_portion(pattern_2colors, pattern_ncolors, 685 src, NULL, vf->vf_width, 686 src_x, i % VT_VGA_PIXELS_BLOCK, x_count, 687 0, 0, vf->vf_height, fg, bg, 0); 688 689 /* We move to the next portion. */ 690 i += x_count; 691 } 692 693#ifndef SC_NO_CUTPASTE 694 /* 695 * Copy the mouse pointer bitmap if it's over the current pixels 696 * block. 697 * 698 * We use the saved cursor position (saved in vt_flush()), because 699 * the current position could be different than the one used 700 * to mark the area dirty. 701 */ 702 term_rect_t drawn_area; 703 704 drawn_area.tr_begin.tp_col = x; 705 drawn_area.tr_begin.tp_row = y; 706 drawn_area.tr_end.tp_col = x + VT_VGA_PIXELS_BLOCK; 707 drawn_area.tr_end.tp_row = y + vf->vf_height; 708 if (vd->vd_mshown && vt_is_cursor_in_area(vd, &drawn_area)) { 709 struct vt_mouse_cursor *cursor; 710 unsigned int mx, my; 711 unsigned int dst_x, src_y, dst_y, y_count; 712 713 cursor = vd->vd_mcursor; 714 mx = vd->vd_mx_drawn + vw->vw_draw_area.tr_begin.tp_col; 715 my = vd->vd_my_drawn + vw->vw_draw_area.tr_begin.tp_row; 716 717 /* Compute the portion of the cursor we want to copy. */ 718 src_x = x > mx ? x - mx : 0; 719 dst_x = mx > x ? mx - x : 0; 720 x_count = min(min(min( 721 cursor->width - src_x, 722 x + VT_VGA_PIXELS_BLOCK - mx), 723 vw->vw_draw_area.tr_end.tp_col - mx), 724 VT_VGA_PIXELS_BLOCK); 725 726 /* 727 * The cursor isn't aligned on the Y-axis with 728 * characters, so we need to compute the vertical 729 * start/count. 730 */ 731 src_y = y > my ? y - my : 0; 732 dst_y = my > y ? my - y : 0; 733 y_count = min( 734 min(cursor->height - src_y, y + vf->vf_height - my), 735 vf->vf_height); 736 737 /* Copy the cursor portion. */ 738 vga_copy_bitmap_portion(pattern_2colors, pattern_ncolors, 739 cursor->map, cursor->mask, cursor->width, 740 src_x, dst_x, x_count, src_y, dst_y, y_count, 741 vd->vd_mcursor_fg, vd->vd_mcursor_bg, 1); 742 743 if ((used_colors_list[vd->vd_mcursor_fg] & 0x1) != 0x1) 744 used_colors++; 745 if ((used_colors_list[vd->vd_mcursor_bg] & 0x2) != 0x2) 746 used_colors++; 747 } 748#endif 749 750 /* 751 * The pixels block is completed, we can now draw it on the 752 * screen. 753 */ 754 if (used_colors == 2) 755 vga_bitblt_pixels_block_2colors(vd, pattern_2colors, fg, bg, 756 x, y, vf->vf_height); 757 else 758 vga_bitblt_pixels_block_ncolors(vd, pattern_ncolors, 759 x, y, vf->vf_height); 760} 761 762static void 763vga_bitblt_text_gfxmode(struct vt_device *vd, const struct vt_window *vw, 764 const term_rect_t *area) 765{ 766 const struct vt_font *vf; 767 unsigned int col, row; 768 unsigned int x1, y1, x2, y2, x, y; 769 770 vf = vw->vw_font; 771 772 /* 773 * Compute the top-left pixel position aligned with the video 774 * adapter pixels block size. 775 * 776 * This is calculated from the top-left column of te dirty area: 777 * 778 * 1. Compute the top-left pixel of the character: 779 * col * font width + x offset 780 * 781 * NOTE: x offset is used to center the text area on the 782 * screen. It's expressed in pixels, not in characters 783 * col/row! 784 * 785 * 2. Find the pixel further on the left marking the start of 786 * an aligned pixels block (eg. chunk of 8 pixels): 787 * character's x / blocksize * blocksize 788 * 789 * The division, being made on integers, achieves the 790 * alignment. 791 * 792 * For the Y-axis, we need to compute the character's y 793 * coordinate, but we don't need to align it. 794 */ 795 796 col = area->tr_begin.tp_col; 797 row = area->tr_begin.tp_row; 798 x1 = (int)((col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col) 799 / VT_VGA_PIXELS_BLOCK) 800 * VT_VGA_PIXELS_BLOCK; 801 y1 = row * vf->vf_height + vw->vw_draw_area.tr_begin.tp_row; 802 803 /* 804 * Compute the bottom right pixel position, again, aligned with 805 * the pixels block size. 806 * 807 * The same rules apply, we just add 1 to base the computation 808 * on the "right border" of the dirty area. 809 */ 810 811 col = area->tr_end.tp_col; 812 row = area->tr_end.tp_row; 813 x2 = (int)((col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col 814 + VT_VGA_PIXELS_BLOCK - 1) 815 / VT_VGA_PIXELS_BLOCK) 816 * VT_VGA_PIXELS_BLOCK; 817 y2 = row * vf->vf_height + vw->vw_draw_area.tr_begin.tp_row; 818 819 /* Clip the area to the screen size. */ 820 x2 = min(x2, vw->vw_draw_area.tr_end.tp_col); 821 y2 = min(y2, vw->vw_draw_area.tr_end.tp_row); 822 823 /* 824 * Now, we take care of N pixels line at a time (the first for 825 * loop, N = font height), and for these lines, draw one pixels 826 * block at a time (the second for loop), not a character at a 827 * time. 828 * 829 * Therefore, on the X-axis, characters my be drawn partially if 830 * they are not aligned on 8-pixels boundary. 831 * 832 * However, the operation is repeated for the full height of the 833 * font before moving to the next character, because it allows 834 * to keep the color settings and write mode, before perhaps 835 * changing them with the next one. 836 */ 837 838 for (y = y1; y < y2; y += vf->vf_height) { 839 for (x = x1; x < x2; x += VT_VGA_PIXELS_BLOCK) { 840 vga_bitblt_one_text_pixels_block(vd, vw, x, y); 841 } 842 } 843} 844 845static void 846vga_bitblt_text_txtmode(struct vt_device *vd, const struct vt_window *vw, 847 const term_rect_t *area) 848{ 849 struct vga_softc *sc; 850 const struct vt_buf *vb; 851 unsigned int col, row; 852 term_char_t c; 853 term_color_t fg, bg; 854 uint8_t ch, attr; 855 856 sc = vd->vd_softc; 857 vb = &vw->vw_buf; 858 859 for (row = area->tr_begin.tp_row; row < area->tr_end.tp_row; ++row) { 860 for (col = area->tr_begin.tp_col; 861 col < area->tr_end.tp_col; 862 ++col) { 863 /* 864 * Get next character and its associated fg/bg 865 * colors. 866 */ 867 c = VTBUF_GET_FIELD(vb, row, col); 868 vt_determine_colors(c, VTBUF_ISCURSOR(vb, row, col), 869 &fg, &bg); 870 871 /* 872 * Convert character to CP437, which is the 873 * character set used by the VGA hardware by 874 * default. 875 */ 876 ch = vga_get_cp437(TCHAR_CHARACTER(c)); 877 878 /* Convert colors to VGA attributes. */ 879 attr = bg << 4 | fg; 880 881 MEM_WRITE1(sc, (row * 80 + col) * 2 + 0, 882 ch); 883 MEM_WRITE1(sc, (row * 80 + col) * 2 + 1, 884 attr); 885 } 886 } 887} 888 889static void 890vga_bitblt_text(struct vt_device *vd, const struct vt_window *vw, 891 const term_rect_t *area) 892{ 893 894 if (!(vd->vd_flags & VDF_TEXTMODE)) { 895 vga_bitblt_text_gfxmode(vd, vw, area); 896 } else { 897 vga_bitblt_text_txtmode(vd, vw, area); 898 } 899} 900 901static void 902vga_bitblt_bitmap(struct vt_device *vd, const struct vt_window *vw, 903 const uint8_t *pattern, const uint8_t *mask, 904 unsigned int width, unsigned int height, 905 unsigned int x, unsigned int y, term_color_t fg, term_color_t bg) 906{ 907 unsigned int x1, y1, x2, y2, i, j, src_x, dst_x, x_count; 908 uint8_t pattern_2colors; 909 910 /* Align coordinates with the 8-pxels grid. */ 911 x1 = x / VT_VGA_PIXELS_BLOCK * VT_VGA_PIXELS_BLOCK; 912 y1 = y; 913 914 x2 = (x + width + VT_VGA_PIXELS_BLOCK - 1) / 915 VT_VGA_PIXELS_BLOCK * VT_VGA_PIXELS_BLOCK; 916 y2 = y + height; 917 x2 = min(x2, vd->vd_width - 1); 918 y2 = min(y2, vd->vd_height - 1); 919 920 for (j = y1; j < y2; ++j) { 921 src_x = 0; 922 dst_x = x - x1; 923 x_count = VT_VGA_PIXELS_BLOCK - dst_x; 924 925 for (i = x1; i < x2; i += VT_VGA_PIXELS_BLOCK) { 926 pattern_2colors = 0; 927 928 vga_copy_bitmap_portion( 929 &pattern_2colors, NULL, 930 pattern, mask, width, 931 src_x, dst_x, x_count, 932 j - y1, 0, 1, fg, bg, 0); 933 934 vga_bitblt_pixels_block_2colors(vd, 935 &pattern_2colors, fg, bg, 936 i, j, 1); 937 938 src_x += x_count; 939 dst_x = (dst_x + x_count) % VT_VGA_PIXELS_BLOCK; 940 x_count = min(width - src_x, VT_VGA_PIXELS_BLOCK); 941 } 942 } 943} 944 945static void 946vga_initialize_graphics(struct vt_device *vd) 947{ 948 struct vga_softc *sc = vd->vd_softc; 949 950 /* Clock select. */ 951 REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, VGA_GEN_MO_VSP | VGA_GEN_MO_HSP | 952 VGA_GEN_MO_PB | VGA_GEN_MO_ER | VGA_GEN_MO_IOA); 953 /* Set sequencer clocking and memory mode. */ 954 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CLOCKING_MODE); 955 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_CM_89); 956 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MEMORY_MODE); 957 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_OE | VGA_SEQ_MM_EM); 958 959 /* Set the graphics controller in graphics mode. */ 960 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MISCELLANEOUS); 961 REG_WRITE1(sc, VGA_GC_DATA, 0x04 + VGA_GC_MISC_GA); 962 /* Program the CRT controller. */ 963 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_TOTAL); 964 REG_WRITE1(sc, VGA_CRTC_DATA, 0x5f); /* 760 */ 965 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_DISP_END); 966 REG_WRITE1(sc, VGA_CRTC_DATA, 0x4f); /* 640 - 8 */ 967 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_BLANK); 968 REG_WRITE1(sc, VGA_CRTC_DATA, 0x50); /* 640 */ 969 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_BLANK); 970 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHB_CR + 2); 971 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_RETRACE); 972 REG_WRITE1(sc, VGA_CRTC_DATA, 0x54); /* 672 */ 973 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_RETRACE); 974 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHR_EHB + 0); 975 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_TOTAL); 976 REG_WRITE1(sc, VGA_CRTC_DATA, 0x0b); /* 523 */ 977 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OVERFLOW); 978 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_OF_VT9 | VGA_CRTC_OF_LC8 | 979 VGA_CRTC_OF_VBS8 | VGA_CRTC_OF_VRS8 | VGA_CRTC_OF_VDE8); 980 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MAX_SCAN_LINE); 981 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MSL_LC9); 982 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_START); 983 REG_WRITE1(sc, VGA_CRTC_DATA, 0xea); /* 480 + 10 */ 984 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END); 985 REG_WRITE1(sc, VGA_CRTC_DATA, 0x0c); 986 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_DISPLAY_END); 987 REG_WRITE1(sc, VGA_CRTC_DATA, 0xdf); /* 480 - 1*/ 988 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OFFSET); 989 REG_WRITE1(sc, VGA_CRTC_DATA, 0x28); 990 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_VERT_BLANK); 991 REG_WRITE1(sc, VGA_CRTC_DATA, 0xe7); /* 480 + 7 */ 992 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_VERT_BLANK); 993 REG_WRITE1(sc, VGA_CRTC_DATA, 0x04); 994 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 995 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MC_WB | VGA_CRTC_MC_AW | 996 VGA_CRTC_MC_SRS | VGA_CRTC_MC_CMS); 997 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_LINE_COMPARE); 998 REG_WRITE1(sc, VGA_CRTC_DATA, 0xff); /* 480 + 31 */ 999 1000 REG_WRITE1(sc, VGA_GEN_FEATURE_CTRL_W, 0); 1001 1002 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 1003 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 | 1004 VGA_SEQ_MM_EM1 | VGA_SEQ_MM_EM0); 1005 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CHAR_MAP_SELECT); 1006 REG_WRITE1(sc, VGA_SEQ_DATA, 0); 1007 1008 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 1009 REG_WRITE1(sc, VGA_GC_DATA, 0); 1010 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET); 1011 REG_WRITE1(sc, VGA_GC_DATA, 0x0f); 1012 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_COMPARE); 1013 REG_WRITE1(sc, VGA_GC_DATA, 0); 1014 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_DATA_ROTATE); 1015 REG_WRITE1(sc, VGA_GC_DATA, 0); 1016 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_READ_MAP_SELECT); 1017 REG_WRITE1(sc, VGA_GC_DATA, 0); 1018 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 1019 REG_WRITE1(sc, VGA_GC_DATA, 0); 1020 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_DONT_CARE); 1021 REG_WRITE1(sc, VGA_GC_DATA, 0x0f); 1022 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_BIT_MASK); 1023 REG_WRITE1(sc, VGA_GC_DATA, 0xff); 1024} 1025 1026static void 1027vga_initialize(struct vt_device *vd, int textmode) 1028{ 1029 struct vga_softc *sc = vd->vd_softc; 1030 uint8_t x; 1031 1032 /* Make sure the VGA adapter is not in monochrome emulation mode. */ 1033 x = REG_READ1(sc, VGA_GEN_MISC_OUTPUT_R); 1034 REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, x | VGA_GEN_MO_IOA); 1035 1036 /* Unprotect CRTC registers 0-7. */ 1037 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END); 1038 x = REG_READ1(sc, VGA_CRTC_DATA); 1039 REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_VRE_PR); 1040 1041 /* 1042 * Wait for the vertical retrace. 1043 * NOTE: this code reads the VGA_GEN_INPUT_STAT_1 register, which has 1044 * the side-effect of clearing the internal flip-flip of the attribute 1045 * controller's write register. This means that because this code is 1046 * here, we know for sure that the first write to the attribute 1047 * controller will be a write to the address register. Removing this 1048 * code therefore also removes that guarantee and appropriate measures 1049 * need to be taken. 1050 */ 1051 do { 1052 x = REG_READ1(sc, VGA_GEN_INPUT_STAT_1); 1053 x &= VGA_GEN_IS1_VR | VGA_GEN_IS1_DE; 1054 } while (x != (VGA_GEN_IS1_VR | VGA_GEN_IS1_DE)); 1055 1056 /* Now, disable the sync. signals. */ 1057 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1058 x = REG_READ1(sc, VGA_CRTC_DATA); 1059 REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_MC_HR); 1060 1061 /* Asynchronous sequencer reset. */ 1062 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET); 1063 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR); 1064 1065 if (!textmode) 1066 vga_initialize_graphics(vd); 1067 1068 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_PRESET_ROW_SCAN); 1069 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1070 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_START); 1071 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_CS_COO); 1072 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_END); 1073 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1074 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_HIGH); 1075 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1076 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_LOW); 1077 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1078 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_HIGH); 1079 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1080 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_LOW); 1081 REG_WRITE1(sc, VGA_CRTC_DATA, 0x59); 1082 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_UNDERLINE_LOC); 1083 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_UL_UL); 1084 1085 if (textmode) { 1086 /* Set the attribute controller to blink disable. */ 1087 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL); 1088 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1089 } else { 1090 /* Set the attribute controller in graphics mode. */ 1091 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL); 1092 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MC_GA); 1093 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_HORIZ_PIXEL_PANNING); 1094 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1095 } 1096 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(0)); 1097 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1098 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(1)); 1099 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R); 1100 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(2)); 1101 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G); 1102 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(3)); 1103 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SG | VGA_AC_PAL_R); 1104 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(4)); 1105 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_B); 1106 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(5)); 1107 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_B); 1108 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(6)); 1109 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G | VGA_AC_PAL_B); 1110 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(7)); 1111 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_G | VGA_AC_PAL_B); 1112 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(8)); 1113 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1114 VGA_AC_PAL_SB); 1115 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(9)); 1116 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1117 VGA_AC_PAL_SB | VGA_AC_PAL_R); 1118 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(10)); 1119 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1120 VGA_AC_PAL_SB | VGA_AC_PAL_G); 1121 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(11)); 1122 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1123 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_G); 1124 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(12)); 1125 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1126 VGA_AC_PAL_SB | VGA_AC_PAL_B); 1127 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(13)); 1128 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1129 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_B); 1130 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(14)); 1131 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1132 VGA_AC_PAL_SB | VGA_AC_PAL_G | VGA_AC_PAL_B); 1133 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(15)); 1134 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1135 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_G | VGA_AC_PAL_B); 1136 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_OVERSCAN_COLOR); 1137 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1138 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_PLANE_ENABLE); 1139 REG_WRITE1(sc, VGA_AC_WRITE, 0x0f); 1140 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_SELECT); 1141 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1142 1143 if (!textmode) { 1144 u_int ofs; 1145 1146 /* 1147 * Done. Clear the frame buffer. All bit planes are 1148 * enabled, so a single-paged loop should clear all 1149 * planes. 1150 */ 1151 for (ofs = 0; ofs < VT_VGA_MEMSIZE; ofs++) { 1152 MEM_WRITE1(sc, ofs, 0); 1153 } 1154 } 1155 1156 /* Re-enable the sequencer. */ 1157 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET); 1158 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR | VGA_SEQ_RST_NAR); 1159 /* Re-enable the sync signals. */ 1160 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1161 x = REG_READ1(sc, VGA_CRTC_DATA); 1162 REG_WRITE1(sc, VGA_CRTC_DATA, x | VGA_CRTC_MC_HR); 1163 1164 if (!textmode) { 1165 /* Switch to write mode 3, because we'll mainly do bitblt. */ 1166 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 1167 REG_WRITE1(sc, VGA_GC_DATA, 3); 1168 sc->vga_wmode = 3; 1169 1170 /* 1171 * In Write Mode 3, Enable Set/Reset is ignored, but we 1172 * use Write Mode 0 to write a group of 8 pixels using 1173 * 3 or more colors. In this case, we want to disable 1174 * Set/Reset: set Enable Set/Reset to 0. 1175 */ 1176 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET); 1177 REG_WRITE1(sc, VGA_GC_DATA, 0x00); 1178 1179 /* 1180 * Clear the colors we think are loaded into Set/Reset or 1181 * the latches. 1182 */ 1183 sc->vga_curfg = sc->vga_curbg = 0xff; 1184 } 1185} 1186 1187static int 1188vga_probe(struct vt_device *vd) 1189{ 1190 1191 return (CN_INTERNAL); 1192} 1193 1194static int 1195vga_init(struct vt_device *vd) 1196{ 1197 struct vga_softc *sc; 1198 int textmode; 1199 1200 if (vd->vd_softc == NULL) 1201 vd->vd_softc = (void *)&vga_conssoftc; 1202 sc = vd->vd_softc; 1203 textmode = 0; 1204 1205#if defined(__amd64__) || defined(__i386__) 1206 sc->vga_fb_tag = X86_BUS_SPACE_MEM; 1207 sc->vga_reg_tag = X86_BUS_SPACE_IO; 1208#elif defined(__ia64__) 1209 sc->vga_fb_tag = IA64_BUS_SPACE_MEM; 1210 sc->vga_fb_handle = IA64_PHYS_TO_RR6(VGA_MEM_BASE); 1211 sc->vga_reg_tag = IA64_BUS_SPACE_IO; 1212 sc->vga_reg_handle = VGA_REG_BASE; 1213#else 1214# error "Architecture not yet supported!" 1215#endif 1216 1217 bus_space_map(sc->vga_reg_tag, VGA_REG_BASE, VGA_REG_SIZE, 0, 1218 &sc->vga_reg_handle); 1219 1220 TUNABLE_INT_FETCH("hw.vga.textmode", &textmode); 1221 if (textmode) { 1222 vd->vd_flags |= VDF_TEXTMODE; 1223 vd->vd_width = 80; 1224 vd->vd_height = 25; 1225 bus_space_map(sc->vga_fb_tag, VGA_TXT_BASE, VGA_TXT_SIZE, 0, 1226 &sc->vga_fb_handle); 1227 } else { 1228 vd->vd_width = VT_VGA_WIDTH; 1229 vd->vd_height = VT_VGA_HEIGHT; 1230 bus_space_map(sc->vga_fb_tag, VGA_MEM_BASE, VGA_MEM_SIZE, 0, 1231 &sc->vga_fb_handle); 1232 } 1233 vga_initialize(vd, textmode); 1234 1235 return (CN_INTERNAL); 1236} 1237 1238static void 1239vga_postswitch(struct vt_device *vd) 1240{ 1241 1242 /* Reinit VGA mode, to restore view after app which change mode. */ 1243 vga_initialize(vd, (vd->vd_flags & VDF_TEXTMODE)); 1244 /* Ask vt(9) to update chars on visible area. */ 1245 vd->vd_flags |= VDF_INVALID; 1246} 1247