vt_vga.c revision 271128
1/*- 2 * Copyright (c) 2005 Marcel Moolenaar 3 * All rights reserved. 4 * 5 * Copyright (c) 2009 The FreeBSD Foundation 6 * All rights reserved. 7 * 8 * Portions of this software were developed by Ed Schouten 9 * under sponsorship from the FreeBSD Foundation. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33#include <sys/cdefs.h> 34__FBSDID("$FreeBSD: stable/10/sys/dev/vt/hw/vga/vt_vga.c 271128 2014-09-04 20:18:08Z emaste $"); 35 36#include <sys/param.h> 37#include <sys/kernel.h> 38#include <sys/systm.h> 39 40#include <dev/vt/vt.h> 41#include <dev/vt/hw/vga/vt_vga_reg.h> 42 43#include <machine/bus.h> 44 45#if defined(__amd64__) || defined(__i386__) 46#include <vm/vm.h> 47#include <vm/pmap.h> 48#include <machine/pmap.h> 49#include <machine/vmparam.h> 50#endif /* __amd64__ || __i386__ */ 51 52struct vga_softc { 53 bus_space_tag_t vga_fb_tag; 54 bus_space_handle_t vga_fb_handle; 55 bus_space_tag_t vga_reg_tag; 56 bus_space_handle_t vga_reg_handle; 57 int vga_wmode; 58 term_color_t vga_curfg, vga_curbg; 59}; 60 61/* Convenience macros. */ 62#define MEM_READ1(sc, ofs) \ 63 bus_space_read_1(sc->vga_fb_tag, sc->vga_fb_handle, ofs) 64#define MEM_WRITE1(sc, ofs, val) \ 65 bus_space_write_1(sc->vga_fb_tag, sc->vga_fb_handle, ofs, val) 66#define REG_READ1(sc, reg) \ 67 bus_space_read_1(sc->vga_reg_tag, sc->vga_reg_handle, reg) 68#define REG_WRITE1(sc, reg, val) \ 69 bus_space_write_1(sc->vga_reg_tag, sc->vga_reg_handle, reg, val) 70 71#define VT_VGA_WIDTH 640 72#define VT_VGA_HEIGHT 480 73#define VT_VGA_MEMSIZE (VT_VGA_WIDTH * VT_VGA_HEIGHT / 8) 74 75/* 76 * VGA is designed to handle 8 pixels at a time (8 pixels in one byte of 77 * memory). 78 */ 79#define VT_VGA_PIXELS_BLOCK 8 80 81/* 82 * We use an off-screen addresses to: 83 * o store the background color; 84 * o store pixels pattern. 85 * Those addresses are then loaded in the latches once. 86 */ 87#define VT_VGA_BGCOLOR_OFFSET VT_VGA_MEMSIZE 88 89static vd_probe_t vga_probe; 90static vd_init_t vga_init; 91static vd_blank_t vga_blank; 92static vd_bitblt_text_t vga_bitblt_text; 93static vd_bitblt_bmp_t vga_bitblt_bitmap; 94static vd_drawrect_t vga_drawrect; 95static vd_setpixel_t vga_setpixel; 96static vd_postswitch_t vga_postswitch; 97 98static const struct vt_driver vt_vga_driver = { 99 .vd_name = "vga", 100 .vd_probe = vga_probe, 101 .vd_init = vga_init, 102 .vd_blank = vga_blank, 103 .vd_bitblt_text = vga_bitblt_text, 104 .vd_bitblt_bmp = vga_bitblt_bitmap, 105 .vd_drawrect = vga_drawrect, 106 .vd_setpixel = vga_setpixel, 107 .vd_postswitch = vga_postswitch, 108 .vd_priority = VD_PRIORITY_GENERIC, 109}; 110 111/* 112 * Driver supports both text mode and graphics mode. Make sure the 113 * buffer is always big enough to support both. 114 */ 115static struct vga_softc vga_conssoftc; 116VT_DRIVER_DECLARE(vt_vga, vt_vga_driver); 117 118static inline void 119vga_setwmode(struct vt_device *vd, int wmode) 120{ 121 struct vga_softc *sc = vd->vd_softc; 122 123 if (sc->vga_wmode == wmode) 124 return; 125 126 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 127 REG_WRITE1(sc, VGA_GC_DATA, wmode); 128 sc->vga_wmode = wmode; 129 130 switch (wmode) { 131 case 3: 132 /* Re-enable all plans. */ 133 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 134 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 | 135 VGA_SEQ_MM_EM1 | VGA_SEQ_MM_EM0); 136 break; 137 } 138} 139 140static inline void 141vga_setfg(struct vt_device *vd, term_color_t color) 142{ 143 struct vga_softc *sc = vd->vd_softc; 144 145 vga_setwmode(vd, 3); 146 147 if (sc->vga_curfg == color) 148 return; 149 150 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 151 REG_WRITE1(sc, VGA_GC_DATA, color); 152 sc->vga_curfg = color; 153} 154 155static inline void 156vga_setbg(struct vt_device *vd, term_color_t color) 157{ 158 struct vga_softc *sc = vd->vd_softc; 159 160 vga_setwmode(vd, 3); 161 162 if (sc->vga_curbg == color) 163 return; 164 165 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 166 REG_WRITE1(sc, VGA_GC_DATA, color); 167 168 /* 169 * Write 8 pixels using the background color to an off-screen 170 * byte in the video memory. 171 */ 172 MEM_WRITE1(sc, VT_VGA_BGCOLOR_OFFSET, 0xff); 173 174 /* 175 * Read those 8 pixels back to load the background color in the 176 * latches register. 177 */ 178 MEM_READ1(sc, VT_VGA_BGCOLOR_OFFSET); 179 180 sc->vga_curbg = color; 181 182 /* 183 * The Set/Reset register doesn't contain the fg color anymore, 184 * store an invalid color. 185 */ 186 sc->vga_curfg = 0xff; 187} 188 189/* 190 * Binary searchable table for Unicode to CP437 conversion. 191 */ 192 193struct unicp437 { 194 uint16_t unicode_base; 195 uint8_t cp437_base; 196 uint8_t length; 197}; 198 199static const struct unicp437 cp437table[] = { 200 { 0x0020, 0x20, 0x5e }, { 0x00a0, 0x20, 0x00 }, 201 { 0x00a1, 0xad, 0x00 }, { 0x00a2, 0x9b, 0x00 }, 202 { 0x00a3, 0x9c, 0x00 }, { 0x00a5, 0x9d, 0x00 }, 203 { 0x00a7, 0x15, 0x00 }, { 0x00aa, 0xa6, 0x00 }, 204 { 0x00ab, 0xae, 0x00 }, { 0x00ac, 0xaa, 0x00 }, 205 { 0x00b0, 0xf8, 0x00 }, { 0x00b1, 0xf1, 0x00 }, 206 { 0x00b2, 0xfd, 0x00 }, { 0x00b5, 0xe6, 0x00 }, 207 { 0x00b6, 0x14, 0x00 }, { 0x00b7, 0xfa, 0x00 }, 208 { 0x00ba, 0xa7, 0x00 }, { 0x00bb, 0xaf, 0x00 }, 209 { 0x00bc, 0xac, 0x00 }, { 0x00bd, 0xab, 0x00 }, 210 { 0x00bf, 0xa8, 0x00 }, { 0x00c4, 0x8e, 0x01 }, 211 { 0x00c6, 0x92, 0x00 }, { 0x00c7, 0x80, 0x00 }, 212 { 0x00c9, 0x90, 0x00 }, { 0x00d1, 0xa5, 0x00 }, 213 { 0x00d6, 0x99, 0x00 }, { 0x00dc, 0x9a, 0x00 }, 214 { 0x00df, 0xe1, 0x00 }, { 0x00e0, 0x85, 0x00 }, 215 { 0x00e1, 0xa0, 0x00 }, { 0x00e2, 0x83, 0x00 }, 216 { 0x00e4, 0x84, 0x00 }, { 0x00e5, 0x86, 0x00 }, 217 { 0x00e6, 0x91, 0x00 }, { 0x00e7, 0x87, 0x00 }, 218 { 0x00e8, 0x8a, 0x00 }, { 0x00e9, 0x82, 0x00 }, 219 { 0x00ea, 0x88, 0x01 }, { 0x00ec, 0x8d, 0x00 }, 220 { 0x00ed, 0xa1, 0x00 }, { 0x00ee, 0x8c, 0x00 }, 221 { 0x00ef, 0x8b, 0x00 }, { 0x00f0, 0xeb, 0x00 }, 222 { 0x00f1, 0xa4, 0x00 }, { 0x00f2, 0x95, 0x00 }, 223 { 0x00f3, 0xa2, 0x00 }, { 0x00f4, 0x93, 0x00 }, 224 { 0x00f6, 0x94, 0x00 }, { 0x00f7, 0xf6, 0x00 }, 225 { 0x00f8, 0xed, 0x00 }, { 0x00f9, 0x97, 0x00 }, 226 { 0x00fa, 0xa3, 0x00 }, { 0x00fb, 0x96, 0x00 }, 227 { 0x00fc, 0x81, 0x00 }, { 0x00ff, 0x98, 0x00 }, 228 { 0x0192, 0x9f, 0x00 }, { 0x0393, 0xe2, 0x00 }, 229 { 0x0398, 0xe9, 0x00 }, { 0x03a3, 0xe4, 0x00 }, 230 { 0x03a6, 0xe8, 0x00 }, { 0x03a9, 0xea, 0x00 }, 231 { 0x03b1, 0xe0, 0x01 }, { 0x03b4, 0xeb, 0x00 }, 232 { 0x03b5, 0xee, 0x00 }, { 0x03bc, 0xe6, 0x00 }, 233 { 0x03c0, 0xe3, 0x00 }, { 0x03c3, 0xe5, 0x00 }, 234 { 0x03c4, 0xe7, 0x00 }, { 0x03c6, 0xed, 0x00 }, 235 { 0x03d5, 0xed, 0x00 }, { 0x2010, 0x2d, 0x00 }, 236 { 0x2014, 0x2d, 0x00 }, { 0x2018, 0x60, 0x00 }, 237 { 0x2019, 0x27, 0x00 }, { 0x201c, 0x22, 0x00 }, 238 { 0x201d, 0x22, 0x00 }, { 0x2022, 0x07, 0x00 }, 239 { 0x203c, 0x13, 0x00 }, { 0x207f, 0xfc, 0x00 }, 240 { 0x20a7, 0x9e, 0x00 }, { 0x20ac, 0xee, 0x00 }, 241 { 0x2126, 0xea, 0x00 }, { 0x2190, 0x1b, 0x00 }, 242 { 0x2191, 0x18, 0x00 }, { 0x2192, 0x1a, 0x00 }, 243 { 0x2193, 0x19, 0x00 }, { 0x2194, 0x1d, 0x00 }, 244 { 0x2195, 0x12, 0x00 }, { 0x21a8, 0x17, 0x00 }, 245 { 0x2202, 0xeb, 0x00 }, { 0x2208, 0xee, 0x00 }, 246 { 0x2211, 0xe4, 0x00 }, { 0x2212, 0x2d, 0x00 }, 247 { 0x2219, 0xf9, 0x00 }, { 0x221a, 0xfb, 0x00 }, 248 { 0x221e, 0xec, 0x00 }, { 0x221f, 0x1c, 0x00 }, 249 { 0x2229, 0xef, 0x00 }, { 0x2248, 0xf7, 0x00 }, 250 { 0x2261, 0xf0, 0x00 }, { 0x2264, 0xf3, 0x00 }, 251 { 0x2265, 0xf2, 0x00 }, { 0x2302, 0x7f, 0x00 }, 252 { 0x2310, 0xa9, 0x00 }, { 0x2320, 0xf4, 0x00 }, 253 { 0x2321, 0xf5, 0x00 }, { 0x2500, 0xc4, 0x00 }, 254 { 0x2502, 0xb3, 0x00 }, { 0x250c, 0xda, 0x00 }, 255 { 0x2510, 0xbf, 0x00 }, { 0x2514, 0xc0, 0x00 }, 256 { 0x2518, 0xd9, 0x00 }, { 0x251c, 0xc3, 0x00 }, 257 { 0x2524, 0xb4, 0x00 }, { 0x252c, 0xc2, 0x00 }, 258 { 0x2534, 0xc1, 0x00 }, { 0x253c, 0xc5, 0x00 }, 259 { 0x2550, 0xcd, 0x00 }, { 0x2551, 0xba, 0x00 }, 260 { 0x2552, 0xd5, 0x00 }, { 0x2553, 0xd6, 0x00 }, 261 { 0x2554, 0xc9, 0x00 }, { 0x2555, 0xb8, 0x00 }, 262 { 0x2556, 0xb7, 0x00 }, { 0x2557, 0xbb, 0x00 }, 263 { 0x2558, 0xd4, 0x00 }, { 0x2559, 0xd3, 0x00 }, 264 { 0x255a, 0xc8, 0x00 }, { 0x255b, 0xbe, 0x00 }, 265 { 0x255c, 0xbd, 0x00 }, { 0x255d, 0xbc, 0x00 }, 266 { 0x255e, 0xc6, 0x01 }, { 0x2560, 0xcc, 0x00 }, 267 { 0x2561, 0xb5, 0x00 }, { 0x2562, 0xb6, 0x00 }, 268 { 0x2563, 0xb9, 0x00 }, { 0x2564, 0xd1, 0x01 }, 269 { 0x2566, 0xcb, 0x00 }, { 0x2567, 0xcf, 0x00 }, 270 { 0x2568, 0xd0, 0x00 }, { 0x2569, 0xca, 0x00 }, 271 { 0x256a, 0xd8, 0x00 }, { 0x256b, 0xd7, 0x00 }, 272 { 0x256c, 0xce, 0x00 }, { 0x2580, 0xdf, 0x00 }, 273 { 0x2584, 0xdc, 0x00 }, { 0x2588, 0xdb, 0x00 }, 274 { 0x258c, 0xdd, 0x00 }, { 0x2590, 0xde, 0x00 }, 275 { 0x2591, 0xb0, 0x02 }, { 0x25a0, 0xfe, 0x00 }, 276 { 0x25ac, 0x16, 0x00 }, { 0x25b2, 0x1e, 0x00 }, 277 { 0x25ba, 0x10, 0x00 }, { 0x25bc, 0x1f, 0x00 }, 278 { 0x25c4, 0x11, 0x00 }, { 0x25cb, 0x09, 0x00 }, 279 { 0x25d8, 0x08, 0x00 }, { 0x25d9, 0x0a, 0x00 }, 280 { 0x263a, 0x01, 0x01 }, { 0x263c, 0x0f, 0x00 }, 281 { 0x2640, 0x0c, 0x00 }, { 0x2642, 0x0b, 0x00 }, 282 { 0x2660, 0x06, 0x00 }, { 0x2663, 0x05, 0x00 }, 283 { 0x2665, 0x03, 0x01 }, { 0x266a, 0x0d, 0x00 }, 284 { 0x266c, 0x0e, 0x00 }, 285}; 286 287static uint8_t 288vga_get_cp437(term_char_t c) 289{ 290 int min, mid, max; 291 292 min = 0; 293 max = (sizeof(cp437table) / sizeof(struct unicp437)) - 1; 294 295 if (c < cp437table[0].unicode_base || 296 c > cp437table[max].unicode_base + cp437table[max].length) 297 return '?'; 298 299 while (max >= min) { 300 mid = (min + max) / 2; 301 if (c < cp437table[mid].unicode_base) 302 max = mid - 1; 303 else if (c > cp437table[mid].unicode_base + 304 cp437table[mid].length) 305 min = mid + 1; 306 else 307 return (c - cp437table[mid].unicode_base + 308 cp437table[mid].cp437_base); 309 } 310 311 return '?'; 312} 313 314static void 315vga_blank(struct vt_device *vd, term_color_t color) 316{ 317 struct vga_softc *sc = vd->vd_softc; 318 u_int ofs; 319 320 vga_setfg(vd, color); 321 for (ofs = 0; ofs < VT_VGA_MEMSIZE; ofs++) 322 MEM_WRITE1(sc, ofs, 0xff); 323} 324 325static inline void 326vga_bitblt_put(struct vt_device *vd, u_long dst, term_color_t color, 327 uint8_t v) 328{ 329 struct vga_softc *sc = vd->vd_softc; 330 331 /* Skip empty writes, in order to avoid palette changes. */ 332 if (v != 0x00) { 333 vga_setfg(vd, color); 334 /* 335 * When this MEM_READ1() gets disabled, all sorts of 336 * artifacts occur. This is because this read loads the 337 * set of 8 pixels that are about to be changed. There 338 * is one scenario where we can avoid the read, namely 339 * if all pixels are about to be overwritten anyway. 340 */ 341 if (v != 0xff) { 342 MEM_READ1(sc, dst); 343 344 /* The bg color was trashed by the reads. */ 345 sc->vga_curbg = 0xff; 346 } 347 MEM_WRITE1(sc, dst, v); 348 } 349} 350 351static void 352vga_setpixel(struct vt_device *vd, int x, int y, term_color_t color) 353{ 354 355 vga_bitblt_put(vd, (y * VT_VGA_WIDTH / 8) + (x / 8), color, 356 0x80 >> (x % 8)); 357} 358 359static void 360vga_drawrect(struct vt_device *vd, int x1, int y1, int x2, int y2, int fill, 361 term_color_t color) 362{ 363 int x, y; 364 365 for (y = y1; y <= y2; y++) { 366 if (fill || (y == y1) || (y == y2)) { 367 for (x = x1; x <= x2; x++) 368 vga_setpixel(vd, x, y, color); 369 } else { 370 vga_setpixel(vd, x1, y, color); 371 vga_setpixel(vd, x2, y, color); 372 } 373 } 374} 375 376static void 377vga_compute_shifted_pattern(const uint8_t *src, unsigned int bytes, 378 unsigned int src_x, unsigned int x_count, unsigned int dst_x, 379 uint8_t *pattern, uint8_t *mask) 380{ 381 unsigned int n; 382 383 n = src_x / 8; 384 385 /* 386 * This mask has bits set, where a pixel (ether 0 or 1) 387 * comes from the source bitmap. 388 */ 389 if (mask != NULL) { 390 *mask = (0xff 391 >> (8 - x_count)) 392 << (8 - x_count - dst_x); 393 } 394 395 if (n == (src_x + x_count - 1) / 8) { 396 /* All the pixels we want are in the same byte. */ 397 *pattern = src[n]; 398 if (dst_x >= src_x) 399 *pattern >>= (dst_x - src_x % 8); 400 else 401 *pattern <<= (src_x % 8 - dst_x); 402 } else { 403 /* The pixels we want are split into two bytes. */ 404 if (dst_x >= src_x % 8) { 405 *pattern = 406 src[n] << (8 - dst_x - src_x % 8) | 407 src[n + 1] >> (dst_x - src_x % 8); 408 } else { 409 *pattern = 410 src[n] << (src_x % 8 - dst_x) | 411 src[n + 1] >> (8 - src_x % 8 - dst_x); 412 } 413 } 414} 415 416static void 417vga_copy_bitmap_portion(uint8_t *pattern_2colors, uint8_t *pattern_ncolors, 418 const uint8_t *src, const uint8_t *src_mask, unsigned int src_width, 419 unsigned int src_x, unsigned int dst_x, unsigned int x_count, 420 unsigned int src_y, unsigned int dst_y, unsigned int y_count, 421 term_color_t fg, term_color_t bg, int overwrite) 422{ 423 unsigned int i, bytes; 424 uint8_t pattern, relevant_bits, mask; 425 426 bytes = (src_width + 7) / 8; 427 428 for (i = 0; i < y_count; ++i) { 429 vga_compute_shifted_pattern(src + (src_y + i) * bytes, 430 bytes, src_x, x_count, dst_x, &pattern, &relevant_bits); 431 432 if (src_mask == NULL) { 433 /* 434 * No src mask. Consider that all wanted bits 435 * from the source are "authoritative". 436 */ 437 mask = relevant_bits; 438 } else { 439 /* 440 * There's an src mask. We shift it the same way 441 * we shifted the source pattern. 442 */ 443 vga_compute_shifted_pattern( 444 src_mask + (src_y + i) * bytes, 445 bytes, src_x, x_count, dst_x, 446 &mask, NULL); 447 448 /* Now, only keep the wanted bits among them. */ 449 mask &= relevant_bits; 450 } 451 452 /* 453 * Clear bits from the pattern which must be 454 * transparent, according to the source mask. 455 */ 456 pattern &= mask; 457 458 /* Set the bits in the 2-colors array. */ 459 if (overwrite) 460 pattern_2colors[dst_y + i] &= ~mask; 461 pattern_2colors[dst_y + i] |= pattern; 462 463 if (pattern_ncolors == NULL) 464 continue; 465 466 /* 467 * Set the same bits in the n-colors array. This one 468 * supports transparency, when a given bit is cleared in 469 * all colors. 470 */ 471 if (overwrite) { 472 /* 473 * Ensure that the pixels used by this bitmap are 474 * cleared in other colors. 475 */ 476 for (int j = 0; j < 16; ++j) 477 pattern_ncolors[(dst_y + i) * 16 + j] &= 478 ~mask; 479 } 480 pattern_ncolors[(dst_y + i) * 16 + fg] |= pattern; 481 pattern_ncolors[(dst_y + i) * 16 + bg] |= (~pattern & mask); 482 } 483} 484 485static void 486vga_bitblt_pixels_block_2colors(struct vt_device *vd, const uint8_t *masks, 487 term_color_t fg, term_color_t bg, 488 unsigned int x, unsigned int y, unsigned int height) 489{ 490 unsigned int i, offset; 491 struct vga_softc *sc; 492 493 /* 494 * The great advantage of Write Mode 3 is that we just need 495 * to load the foreground in the Set/Reset register, load the 496 * background color in the latches register (this is done 497 * through a write in offscreen memory followed by a read of 498 * that data), then write the pattern to video memory. This 499 * pattern indicates if the pixel should use the foreground 500 * color (bit set) or the background color (bit cleared). 501 */ 502 503 vga_setbg(vd, bg); 504 vga_setfg(vd, fg); 505 506 sc = vd->vd_softc; 507 offset = (VT_VGA_WIDTH * y + x) / 8; 508 509 for (i = 0; i < height; ++i, offset += VT_VGA_WIDTH / 8) { 510 MEM_WRITE1(sc, offset, masks[i]); 511 } 512} 513 514static void 515vga_bitblt_pixels_block_ncolors(struct vt_device *vd, const uint8_t *masks, 516 unsigned int x, unsigned int y, unsigned int height) 517{ 518 unsigned int i, j, plan, color, offset; 519 struct vga_softc *sc; 520 uint8_t mask, plans[height * 4]; 521 522 sc = vd->vd_softc; 523 524 memset(plans, 0, sizeof(plans)); 525 526 /* 527 * To write a group of pixels using 3 or more colors, we select 528 * Write Mode 0 and write one byte to each plan separately. 529 */ 530 531 /* 532 * We first compute each byte: each plan contains one bit of the 533 * color code for each of the 8 pixels. 534 * 535 * For example, if the 8 pixels are like this: 536 * GBBBBBBY 537 * where: 538 * G (gray) = 0b0111 539 * B (black) = 0b0000 540 * Y (yellow) = 0b0011 541 * 542 * The corresponding for bytes are: 543 * GBBBBBBY 544 * Plan 0: 10000001 = 0x81 545 * Plan 1: 10000001 = 0x81 546 * Plan 2: 10000000 = 0x80 547 * Plan 3: 00000000 = 0x00 548 * | | | 549 * | | +-> 0b0011 (Y) 550 * | +-----> 0b0000 (B) 551 * +--------> 0b0111 (G) 552 */ 553 554 for (i = 0; i < height; ++i) { 555 for (color = 0; color < 16; ++color) { 556 mask = masks[i * 16 + color]; 557 if (mask == 0x00) 558 continue; 559 560 for (j = 0; j < 8; ++j) { 561 if (!((mask >> (7 - j)) & 0x1)) 562 continue; 563 564 /* The pixel "j" uses color "color". */ 565 for (plan = 0; plan < 4; ++plan) 566 plans[i * 4 + plan] |= 567 ((color >> plan) & 0x1) << (7 - j); 568 } 569 } 570 } 571 572 /* 573 * The bytes are ready: we now switch to Write Mode 0 and write 574 * all bytes, one plan at a time. 575 */ 576 vga_setwmode(vd, 0); 577 578 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 579 for (plan = 0; plan < 4; ++plan) { 580 /* Select plan. */ 581 REG_WRITE1(sc, VGA_SEQ_DATA, 1 << plan); 582 583 /* Write all bytes for this plan, from Y to Y+height. */ 584 for (i = 0; i < height; ++i) { 585 offset = (VT_VGA_WIDTH * (y + i) + x) / 8; 586 MEM_WRITE1(sc, offset, plans[i * 4 + plan]); 587 } 588 } 589} 590 591static void 592vga_bitblt_one_text_pixels_block(struct vt_device *vd, 593 const struct vt_window *vw, unsigned int x, unsigned int y) 594{ 595 const struct vt_buf *vb; 596 const struct vt_font *vf; 597 unsigned int i, col, row, src_x, x_count; 598 unsigned int used_colors_list[16], used_colors; 599 uint8_t pattern_2colors[vw->vw_font->vf_height]; 600 uint8_t pattern_ncolors[vw->vw_font->vf_height * 16]; 601 term_char_t c; 602 term_color_t fg, bg; 603 const uint8_t *src; 604 605 vb = &vw->vw_buf; 606 vf = vw->vw_font; 607 608 /* 609 * The current pixels block. 610 * 611 * We fill it with portions of characters, because both "grids" 612 * may not match. 613 * 614 * i is the index in this pixels block. 615 */ 616 617 i = x; 618 used_colors = 0; 619 memset(used_colors_list, 0, sizeof(used_colors_list)); 620 memset(pattern_2colors, 0, sizeof(pattern_2colors)); 621 memset(pattern_ncolors, 0, sizeof(pattern_ncolors)); 622 623 if (i < vw->vw_draw_area.tr_begin.tp_col) { 624 /* 625 * i is in the margin used to center the text area on 626 * the screen. 627 */ 628 629 i = vw->vw_draw_area.tr_begin.tp_col; 630 } 631 632 while (i < x + VT_VGA_PIXELS_BLOCK && 633 i < vw->vw_draw_area.tr_end.tp_col) { 634 /* 635 * Find which character is drawn on this pixel in the 636 * pixels block. 637 * 638 * While here, record what colors it uses. 639 */ 640 641 col = (i - vw->vw_draw_area.tr_begin.tp_col) / vf->vf_width; 642 row = (y - vw->vw_draw_area.tr_begin.tp_row) / vf->vf_height; 643 644 c = VTBUF_GET_FIELD(vb, row, col); 645 src = vtfont_lookup(vf, c); 646 647 vt_determine_colors(c, VTBUF_ISCURSOR(vb, row, col), &fg, &bg); 648 if ((used_colors_list[fg] & 0x1) != 0x1) 649 used_colors++; 650 if ((used_colors_list[bg] & 0x2) != 0x2) 651 used_colors++; 652 used_colors_list[fg] |= 0x1; 653 used_colors_list[bg] |= 0x2; 654 655 /* 656 * Compute the portion of the character we want to draw, 657 * because the pixels block may start in the middle of a 658 * character. 659 * 660 * The first pixel to draw in the character is 661 * the current position - 662 * the start position of the character 663 * 664 * The last pixel to draw is either 665 * - the last pixel of the character, or 666 * - the pixel of the character matching the end of 667 * the pixels block 668 * whichever comes first. This position is then 669 * changed to be relative to the start position of the 670 * character. 671 */ 672 673 src_x = i - 674 (col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col); 675 x_count = min(min( 676 (col + 1) * vf->vf_width + 677 vw->vw_draw_area.tr_begin.tp_col, 678 x + VT_VGA_PIXELS_BLOCK), 679 vw->vw_draw_area.tr_end.tp_col); 680 x_count -= col * vf->vf_width + 681 vw->vw_draw_area.tr_begin.tp_col; 682 x_count -= src_x; 683 684 /* Copy a portion of the character. */ 685 vga_copy_bitmap_portion(pattern_2colors, pattern_ncolors, 686 src, NULL, vf->vf_width, 687 src_x, i % VT_VGA_PIXELS_BLOCK, x_count, 688 0, 0, vf->vf_height, fg, bg, 0); 689 690 /* We move to the next portion. */ 691 i += x_count; 692 } 693 694#ifndef SC_NO_CUTPASTE 695 /* 696 * Copy the mouse pointer bitmap if it's over the current pixels 697 * block. 698 * 699 * We use the saved cursor position (saved in vt_flush()), because 700 * the current position could be different than the one used 701 * to mark the area dirty. 702 */ 703 term_rect_t drawn_area; 704 705 drawn_area.tr_begin.tp_col = x; 706 drawn_area.tr_begin.tp_row = y; 707 drawn_area.tr_end.tp_col = x + VT_VGA_PIXELS_BLOCK; 708 drawn_area.tr_end.tp_row = y + vf->vf_height; 709 if (vd->vd_mshown && vt_is_cursor_in_area(vd, &drawn_area)) { 710 struct vt_mouse_cursor *cursor; 711 unsigned int mx, my; 712 unsigned int dst_x, src_y, dst_y, y_count; 713 714 cursor = vd->vd_mcursor; 715 mx = vd->vd_mx_drawn + vw->vw_draw_area.tr_begin.tp_col; 716 my = vd->vd_my_drawn + vw->vw_draw_area.tr_begin.tp_row; 717 718 /* Compute the portion of the cursor we want to copy. */ 719 src_x = x > mx ? x - mx : 0; 720 dst_x = mx > x ? mx - x : 0; 721 x_count = min(min(min( 722 cursor->width - src_x, 723 x + VT_VGA_PIXELS_BLOCK - mx), 724 vw->vw_draw_area.tr_end.tp_col - mx), 725 VT_VGA_PIXELS_BLOCK); 726 727 /* 728 * The cursor isn't aligned on the Y-axis with 729 * characters, so we need to compute the vertical 730 * start/count. 731 */ 732 src_y = y > my ? y - my : 0; 733 dst_y = my > y ? my - y : 0; 734 y_count = min( 735 min(cursor->height - src_y, y + vf->vf_height - my), 736 vf->vf_height); 737 738 /* Copy the cursor portion. */ 739 vga_copy_bitmap_portion(pattern_2colors, pattern_ncolors, 740 cursor->map, cursor->mask, cursor->width, 741 src_x, dst_x, x_count, src_y, dst_y, y_count, 742 vd->vd_mcursor_fg, vd->vd_mcursor_bg, 1); 743 744 if ((used_colors_list[vd->vd_mcursor_fg] & 0x1) != 0x1) 745 used_colors++; 746 if ((used_colors_list[vd->vd_mcursor_bg] & 0x2) != 0x2) 747 used_colors++; 748 } 749#endif 750 751 /* 752 * The pixels block is completed, we can now draw it on the 753 * screen. 754 */ 755 if (used_colors == 2) 756 vga_bitblt_pixels_block_2colors(vd, pattern_2colors, fg, bg, 757 x, y, vf->vf_height); 758 else 759 vga_bitblt_pixels_block_ncolors(vd, pattern_ncolors, 760 x, y, vf->vf_height); 761} 762 763static void 764vga_bitblt_text_gfxmode(struct vt_device *vd, const struct vt_window *vw, 765 const term_rect_t *area) 766{ 767 const struct vt_font *vf; 768 unsigned int col, row; 769 unsigned int x1, y1, x2, y2, x, y; 770 771 vf = vw->vw_font; 772 773 /* 774 * Compute the top-left pixel position aligned with the video 775 * adapter pixels block size. 776 * 777 * This is calculated from the top-left column of te dirty area: 778 * 779 * 1. Compute the top-left pixel of the character: 780 * col * font width + x offset 781 * 782 * NOTE: x offset is used to center the text area on the 783 * screen. It's expressed in pixels, not in characters 784 * col/row! 785 * 786 * 2. Find the pixel further on the left marking the start of 787 * an aligned pixels block (eg. chunk of 8 pixels): 788 * character's x / blocksize * blocksize 789 * 790 * The division, being made on integers, achieves the 791 * alignment. 792 * 793 * For the Y-axis, we need to compute the character's y 794 * coordinate, but we don't need to align it. 795 */ 796 797 col = area->tr_begin.tp_col; 798 row = area->tr_begin.tp_row; 799 x1 = (int)((col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col) 800 / VT_VGA_PIXELS_BLOCK) 801 * VT_VGA_PIXELS_BLOCK; 802 y1 = row * vf->vf_height + vw->vw_draw_area.tr_begin.tp_row; 803 804 /* 805 * Compute the bottom right pixel position, again, aligned with 806 * the pixels block size. 807 * 808 * The same rules apply, we just add 1 to base the computation 809 * on the "right border" of the dirty area. 810 */ 811 812 col = area->tr_end.tp_col; 813 row = area->tr_end.tp_row; 814 x2 = (int)((col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col 815 + VT_VGA_PIXELS_BLOCK - 1) 816 / VT_VGA_PIXELS_BLOCK) 817 * VT_VGA_PIXELS_BLOCK; 818 y2 = row * vf->vf_height + vw->vw_draw_area.tr_begin.tp_row; 819 820 /* Clip the area to the screen size. */ 821 x2 = min(x2, vw->vw_draw_area.tr_end.tp_col); 822 y2 = min(y2, vw->vw_draw_area.tr_end.tp_row); 823 824 /* 825 * Now, we take care of N pixels line at a time (the first for 826 * loop, N = font height), and for these lines, draw one pixels 827 * block at a time (the second for loop), not a character at a 828 * time. 829 * 830 * Therefore, on the X-axis, characters my be drawn partially if 831 * they are not aligned on 8-pixels boundary. 832 * 833 * However, the operation is repeated for the full height of the 834 * font before moving to the next character, because it allows 835 * to keep the color settings and write mode, before perhaps 836 * changing them with the next one. 837 */ 838 839 for (y = y1; y < y2; y += vf->vf_height) { 840 for (x = x1; x < x2; x += VT_VGA_PIXELS_BLOCK) { 841 vga_bitblt_one_text_pixels_block(vd, vw, x, y); 842 } 843 } 844} 845 846static void 847vga_bitblt_text_txtmode(struct vt_device *vd, const struct vt_window *vw, 848 const term_rect_t *area) 849{ 850 struct vga_softc *sc; 851 const struct vt_buf *vb; 852 unsigned int col, row; 853 term_char_t c; 854 term_color_t fg, bg; 855 uint8_t ch, attr; 856 857 sc = vd->vd_softc; 858 vb = &vw->vw_buf; 859 860 for (row = area->tr_begin.tp_row; row < area->tr_end.tp_row; ++row) { 861 for (col = area->tr_begin.tp_col; 862 col < area->tr_end.tp_col; 863 ++col) { 864 /* 865 * Get next character and its associated fg/bg 866 * colors. 867 */ 868 c = VTBUF_GET_FIELD(vb, row, col); 869 vt_determine_colors(c, VTBUF_ISCURSOR(vb, row, col), 870 &fg, &bg); 871 872 /* 873 * Convert character to CP437, which is the 874 * character set used by the VGA hardware by 875 * default. 876 */ 877 ch = vga_get_cp437(TCHAR_CHARACTER(c)); 878 879 /* Convert colors to VGA attributes. */ 880 attr = bg << 4 | fg; 881 882 MEM_WRITE1(sc, 0x18000 + (row * 80 + col) * 2 + 0, 883 ch); 884 MEM_WRITE1(sc, 0x18000 + (row * 80 + col) * 2 + 1, 885 attr); 886 } 887 } 888} 889 890static void 891vga_bitblt_text(struct vt_device *vd, const struct vt_window *vw, 892 const term_rect_t *area) 893{ 894 895 if (!(vd->vd_flags & VDF_TEXTMODE)) { 896 vga_bitblt_text_gfxmode(vd, vw, area); 897 } else { 898 vga_bitblt_text_txtmode(vd, vw, area); 899 } 900} 901 902static void 903vga_bitblt_bitmap(struct vt_device *vd, const struct vt_window *vw, 904 const uint8_t *pattern, const uint8_t *mask, 905 unsigned int width, unsigned int height, 906 unsigned int x, unsigned int y, term_color_t fg, term_color_t bg) 907{ 908 unsigned int x1, y1, x2, y2, i, j, src_x, dst_x, x_count; 909 uint8_t pattern_2colors; 910 911 /* Align coordinates with the 8-pxels grid. */ 912 x1 = x / VT_VGA_PIXELS_BLOCK * VT_VGA_PIXELS_BLOCK; 913 y1 = y; 914 915 x2 = (x + width + VT_VGA_PIXELS_BLOCK - 1) / 916 VT_VGA_PIXELS_BLOCK * VT_VGA_PIXELS_BLOCK; 917 y2 = y + height; 918 x2 = min(x2, vd->vd_width - 1); 919 y2 = min(y2, vd->vd_height - 1); 920 921 for (j = y1; j < y2; ++j) { 922 src_x = 0; 923 dst_x = x - x1; 924 x_count = VT_VGA_PIXELS_BLOCK - dst_x; 925 926 for (i = x1; i < x2; i += VT_VGA_PIXELS_BLOCK) { 927 pattern_2colors = 0; 928 929 vga_copy_bitmap_portion( 930 &pattern_2colors, NULL, 931 pattern, mask, width, 932 src_x, dst_x, x_count, 933 j - y1, 0, 1, fg, bg, 0); 934 935 vga_bitblt_pixels_block_2colors(vd, 936 &pattern_2colors, fg, bg, 937 i, j, 1); 938 939 src_x += x_count; 940 dst_x = (dst_x + x_count) % VT_VGA_PIXELS_BLOCK; 941 x_count = min(width - src_x, VT_VGA_PIXELS_BLOCK); 942 } 943 } 944} 945 946static void 947vga_initialize_graphics(struct vt_device *vd) 948{ 949 struct vga_softc *sc = vd->vd_softc; 950 951 /* Clock select. */ 952 REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, VGA_GEN_MO_VSP | VGA_GEN_MO_HSP | 953 VGA_GEN_MO_PB | VGA_GEN_MO_ER | VGA_GEN_MO_IOA); 954 /* Set sequencer clocking and memory mode. */ 955 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CLOCKING_MODE); 956 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_CM_89); 957 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MEMORY_MODE); 958 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_OE | VGA_SEQ_MM_EM); 959 960 /* Set the graphics controller in graphics mode. */ 961 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MISCELLANEOUS); 962 REG_WRITE1(sc, VGA_GC_DATA, 0x04 + VGA_GC_MISC_GA); 963 /* Program the CRT controller. */ 964 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_TOTAL); 965 REG_WRITE1(sc, VGA_CRTC_DATA, 0x5f); /* 760 */ 966 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_DISP_END); 967 REG_WRITE1(sc, VGA_CRTC_DATA, 0x4f); /* 640 - 8 */ 968 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_BLANK); 969 REG_WRITE1(sc, VGA_CRTC_DATA, 0x50); /* 640 */ 970 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_BLANK); 971 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHB_CR + 2); 972 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_RETRACE); 973 REG_WRITE1(sc, VGA_CRTC_DATA, 0x54); /* 672 */ 974 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_RETRACE); 975 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHR_EHB + 0); 976 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_TOTAL); 977 REG_WRITE1(sc, VGA_CRTC_DATA, 0x0b); /* 523 */ 978 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OVERFLOW); 979 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_OF_VT9 | VGA_CRTC_OF_LC8 | 980 VGA_CRTC_OF_VBS8 | VGA_CRTC_OF_VRS8 | VGA_CRTC_OF_VDE8); 981 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MAX_SCAN_LINE); 982 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MSL_LC9); 983 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_START); 984 REG_WRITE1(sc, VGA_CRTC_DATA, 0xea); /* 480 + 10 */ 985 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END); 986 REG_WRITE1(sc, VGA_CRTC_DATA, 0x0c); 987 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_DISPLAY_END); 988 REG_WRITE1(sc, VGA_CRTC_DATA, 0xdf); /* 480 - 1*/ 989 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OFFSET); 990 REG_WRITE1(sc, VGA_CRTC_DATA, 0x28); 991 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_VERT_BLANK); 992 REG_WRITE1(sc, VGA_CRTC_DATA, 0xe7); /* 480 + 7 */ 993 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_VERT_BLANK); 994 REG_WRITE1(sc, VGA_CRTC_DATA, 0x04); 995 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 996 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MC_WB | VGA_CRTC_MC_AW | 997 VGA_CRTC_MC_SRS | VGA_CRTC_MC_CMS); 998 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_LINE_COMPARE); 999 REG_WRITE1(sc, VGA_CRTC_DATA, 0xff); /* 480 + 31 */ 1000 1001 REG_WRITE1(sc, VGA_GEN_FEATURE_CTRL_W, 0); 1002 1003 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 1004 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 | 1005 VGA_SEQ_MM_EM1 | VGA_SEQ_MM_EM0); 1006 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CHAR_MAP_SELECT); 1007 REG_WRITE1(sc, VGA_SEQ_DATA, 0); 1008 1009 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 1010 REG_WRITE1(sc, VGA_GC_DATA, 0); 1011 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET); 1012 REG_WRITE1(sc, VGA_GC_DATA, 0x0f); 1013 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_COMPARE); 1014 REG_WRITE1(sc, VGA_GC_DATA, 0); 1015 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_DATA_ROTATE); 1016 REG_WRITE1(sc, VGA_GC_DATA, 0); 1017 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_READ_MAP_SELECT); 1018 REG_WRITE1(sc, VGA_GC_DATA, 0); 1019 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 1020 REG_WRITE1(sc, VGA_GC_DATA, 0); 1021 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_DONT_CARE); 1022 REG_WRITE1(sc, VGA_GC_DATA, 0x0f); 1023 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_BIT_MASK); 1024 REG_WRITE1(sc, VGA_GC_DATA, 0xff); 1025} 1026 1027static void 1028vga_initialize(struct vt_device *vd, int textmode) 1029{ 1030 struct vga_softc *sc = vd->vd_softc; 1031 uint8_t x; 1032 1033 /* Make sure the VGA adapter is not in monochrome emulation mode. */ 1034 x = REG_READ1(sc, VGA_GEN_MISC_OUTPUT_R); 1035 REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, x | VGA_GEN_MO_IOA); 1036 1037 /* Unprotect CRTC registers 0-7. */ 1038 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END); 1039 x = REG_READ1(sc, VGA_CRTC_DATA); 1040 REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_VRE_PR); 1041 1042 /* 1043 * Wait for the vertical retrace. 1044 * NOTE: this code reads the VGA_GEN_INPUT_STAT_1 register, which has 1045 * the side-effect of clearing the internal flip-flip of the attribute 1046 * controller's write register. This means that because this code is 1047 * here, we know for sure that the first write to the attribute 1048 * controller will be a write to the address register. Removing this 1049 * code therefore also removes that guarantee and appropriate measures 1050 * need to be taken. 1051 */ 1052 do { 1053 x = REG_READ1(sc, VGA_GEN_INPUT_STAT_1); 1054 x &= VGA_GEN_IS1_VR | VGA_GEN_IS1_DE; 1055 } while (x != (VGA_GEN_IS1_VR | VGA_GEN_IS1_DE)); 1056 1057 /* Now, disable the sync. signals. */ 1058 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1059 x = REG_READ1(sc, VGA_CRTC_DATA); 1060 REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_MC_HR); 1061 1062 /* Asynchronous sequencer reset. */ 1063 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET); 1064 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR); 1065 1066 if (!textmode) 1067 vga_initialize_graphics(vd); 1068 1069 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_PRESET_ROW_SCAN); 1070 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1071 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_START); 1072 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_CS_COO); 1073 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_END); 1074 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1075 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_HIGH); 1076 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1077 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_LOW); 1078 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1079 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_HIGH); 1080 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1081 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_LOW); 1082 REG_WRITE1(sc, VGA_CRTC_DATA, 0x59); 1083 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_UNDERLINE_LOC); 1084 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_UL_UL); 1085 1086 if (textmode) { 1087 /* Set the attribute controller to blink disable. */ 1088 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL); 1089 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1090 } else { 1091 /* Set the attribute controller in graphics mode. */ 1092 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL); 1093 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MC_GA); 1094 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_HORIZ_PIXEL_PANNING); 1095 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1096 } 1097 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(0)); 1098 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1099 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(1)); 1100 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R); 1101 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(2)); 1102 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G); 1103 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(3)); 1104 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SG | VGA_AC_PAL_R); 1105 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(4)); 1106 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_B); 1107 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(5)); 1108 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_B); 1109 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(6)); 1110 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G | VGA_AC_PAL_B); 1111 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(7)); 1112 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_G | VGA_AC_PAL_B); 1113 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(8)); 1114 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1115 VGA_AC_PAL_SB); 1116 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(9)); 1117 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1118 VGA_AC_PAL_SB | VGA_AC_PAL_R); 1119 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(10)); 1120 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1121 VGA_AC_PAL_SB | VGA_AC_PAL_G); 1122 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(11)); 1123 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1124 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_G); 1125 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(12)); 1126 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1127 VGA_AC_PAL_SB | VGA_AC_PAL_B); 1128 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(13)); 1129 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1130 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_B); 1131 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(14)); 1132 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1133 VGA_AC_PAL_SB | VGA_AC_PAL_G | VGA_AC_PAL_B); 1134 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(15)); 1135 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1136 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_G | VGA_AC_PAL_B); 1137 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_OVERSCAN_COLOR); 1138 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1139 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_PLANE_ENABLE); 1140 REG_WRITE1(sc, VGA_AC_WRITE, 0x0f); 1141 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_SELECT); 1142 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1143 1144 if (!textmode) { 1145 u_int ofs; 1146 1147 /* 1148 * Done. Clear the frame buffer. All bit planes are 1149 * enabled, so a single-paged loop should clear all 1150 * planes. 1151 */ 1152 for (ofs = 0; ofs < VT_VGA_MEMSIZE; ofs++) { 1153 MEM_WRITE1(sc, ofs, 0); 1154 } 1155 } 1156 1157 /* Re-enable the sequencer. */ 1158 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET); 1159 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR | VGA_SEQ_RST_NAR); 1160 /* Re-enable the sync signals. */ 1161 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1162 x = REG_READ1(sc, VGA_CRTC_DATA); 1163 REG_WRITE1(sc, VGA_CRTC_DATA, x | VGA_CRTC_MC_HR); 1164 1165 if (!textmode) { 1166 /* Switch to write mode 3, because we'll mainly do bitblt. */ 1167 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 1168 REG_WRITE1(sc, VGA_GC_DATA, 3); 1169 sc->vga_wmode = 3; 1170 1171 /* 1172 * In Write Mode 3, Enable Set/Reset is ignored, but we 1173 * use Write Mode 0 to write a group of 8 pixels using 1174 * 3 or more colors. In this case, we want to disable 1175 * Set/Reset: set Enable Set/Reset to 0. 1176 */ 1177 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET); 1178 REG_WRITE1(sc, VGA_GC_DATA, 0x00); 1179 1180 /* 1181 * Clear the colors we think are loaded into Set/Reset or 1182 * the latches. 1183 */ 1184 sc->vga_curfg = sc->vga_curbg = 0xff; 1185 } 1186} 1187 1188static int 1189vga_probe(struct vt_device *vd) 1190{ 1191 1192 return (CN_INTERNAL); 1193} 1194 1195static int 1196vga_init(struct vt_device *vd) 1197{ 1198 struct vga_softc *sc; 1199 int textmode; 1200 1201 if (vd->vd_softc == NULL) 1202 vd->vd_softc = (void *)&vga_conssoftc; 1203 sc = vd->vd_softc; 1204 textmode = 0; 1205 1206#if defined(__amd64__) || defined(__i386__) 1207 sc->vga_fb_tag = X86_BUS_SPACE_MEM; 1208 sc->vga_fb_handle = KERNBASE + VGA_MEM_BASE; 1209 sc->vga_reg_tag = X86_BUS_SPACE_IO; 1210 sc->vga_reg_handle = VGA_REG_BASE; 1211#elif defined(__ia64__) 1212 sc->vga_fb_tag = IA64_BUS_SPACE_MEM; 1213 sc->vga_fb_handle = IA64_PHYS_TO_RR6(VGA_MEM_BASE); 1214 sc->vga_reg_tag = IA64_BUS_SPACE_IO; 1215 sc->vga_reg_handle = VGA_REG_BASE; 1216#else 1217# error "Architecture not yet supported!" 1218#endif 1219 1220 TUNABLE_INT_FETCH("hw.vga.textmode", &textmode); 1221 if (textmode) { 1222 vd->vd_flags |= VDF_TEXTMODE; 1223 vd->vd_width = 80; 1224 vd->vd_height = 25; 1225 } else { 1226 vd->vd_width = VT_VGA_WIDTH; 1227 vd->vd_height = VT_VGA_HEIGHT; 1228 } 1229 vga_initialize(vd, textmode); 1230 1231 return (CN_INTERNAL); 1232} 1233 1234static void 1235vga_postswitch(struct vt_device *vd) 1236{ 1237 1238 /* Reinit VGA mode, to restore view after app which change mode. */ 1239 vga_initialize(vd, (vd->vd_flags & VDF_TEXTMODE)); 1240 /* Ask vt(9) to update chars on visible area. */ 1241 vd->vd_flags |= VDF_INVALID; 1242} 1243