sfxge.h revision 284555
1/*- 2 * Copyright (c) 2010-2015 Solarflare Communications Inc. 3 * All rights reserved. 4 * 5 * This software was developed in part by Philip Paeps under contract for 6 * Solarflare Communications, Inc. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright notice, 12 * this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright notice, 14 * this list of conditions and the following disclaimer in the documentation 15 * and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 19 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 21 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 22 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 23 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 24 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 26 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 27 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 * The views and conclusions contained in the software and documentation are 30 * those of the authors and should not be interpreted as representing official 31 * policies, either expressed or implied, of the FreeBSD Project. 32 * 33 * $FreeBSD: stable/10/sys/dev/sfxge/sfxge.h 284555 2015-06-18 15:46:39Z arybchik $ 34 */ 35 36#ifndef _SFXGE_H 37#define _SFXGE_H 38 39#include <sys/param.h> 40#include <sys/kernel.h> 41#include <sys/socket.h> 42#include <sys/sysctl.h> 43#include <sys/sx.h> 44#include <vm/uma.h> 45 46#include <net/ethernet.h> 47#include <net/if.h> 48#include <net/if_media.h> 49#include <net/if_types.h> 50 51#include "sfxge_ioc.h" 52 53/* 54 * Debugging 55 */ 56#if 0 57#define DBGPRINT(dev, fmt, args...) \ 58 device_printf(dev, "%s: " fmt "\n", __func__, ## args) 59#else 60#define DBGPRINT(dev, fmt, args...) 61#endif 62 63/* 64 * Backward-compatibility 65 */ 66#ifndef CACHE_LINE_SIZE 67/* This should be right on most machines the driver will be used on, and 68 * we needn't care too much about wasting a few KB per interface. 69 */ 70#define CACHE_LINE_SIZE 128 71#endif 72 73#ifndef IFCAP_LINKSTATE 74#define IFCAP_LINKSTATE 0 75#endif 76 77#ifndef IFCAP_VLAN_HWTSO 78#define IFCAP_VLAN_HWTSO 0 79#endif 80 81#ifndef IFM_10G_T 82#define IFM_10G_T IFM_UNKNOWN 83#endif 84 85#ifndef IFM_10G_KX4 86#define IFM_10G_KX4 IFM_10G_CX4 87#endif 88 89#ifndef IFM_40G_CR4 90#define IFM_40G_CR4 IFM_UNKNOWN 91#endif 92 93#if (__FreeBSD_version >= 800501 && __FreeBSD_version < 900000) || \ 94 __FreeBSD_version >= 900003 95#define SFXGE_HAVE_DESCRIBE_INTR 96#endif 97 98#ifdef IFM_ETH_RXPAUSE 99#define SFXGE_HAVE_PAUSE_MEDIAOPTS 100#endif 101 102#ifndef CTLTYPE_U64 103#define CTLTYPE_U64 CTLTYPE_QUAD 104#endif 105 106#include "sfxge_rx.h" 107#include "sfxge_tx.h" 108 109#define ROUNDUP_POW_OF_TWO(_n) (1ULL << flsl((_n) - 1)) 110 111#define SFXGE_IP_ALIGN 2 112 113#define SFXGE_ETHERTYPE_LOOPBACK 0x9000 /* Xerox loopback */ 114 115enum sfxge_evq_state { 116 SFXGE_EVQ_UNINITIALIZED = 0, 117 SFXGE_EVQ_INITIALIZED, 118 SFXGE_EVQ_STARTING, 119 SFXGE_EVQ_STARTED 120}; 121 122#define SFXGE_EV_BATCH 16384 123 124struct sfxge_evq { 125 /* Structure members below are sorted by usage order */ 126 struct sfxge_softc *sc; 127 struct mtx lock; 128 unsigned int index; 129 enum sfxge_evq_state init_state; 130 efsys_mem_t mem; 131 efx_evq_t *common; 132 unsigned int read_ptr; 133 boolean_t exception; 134 unsigned int rx_done; 135 unsigned int tx_done; 136 137 /* Linked list of TX queues with completions to process */ 138 struct sfxge_txq *txq; 139 struct sfxge_txq **txqs; 140 141 /* Structure members not used on event processing path */ 142 unsigned int buf_base_id; 143 unsigned int entries; 144 char lock_name[SFXGE_LOCK_NAME_MAX]; 145} __aligned(CACHE_LINE_SIZE); 146 147#define SFXGE_NDESCS 1024 148#define SFXGE_MODERATION 30 149 150enum sfxge_intr_state { 151 SFXGE_INTR_UNINITIALIZED = 0, 152 SFXGE_INTR_INITIALIZED, 153 SFXGE_INTR_TESTING, 154 SFXGE_INTR_STARTED 155}; 156 157struct sfxge_intr_hdl { 158 int eih_rid; 159 void *eih_tag; 160 struct resource *eih_res; 161}; 162 163struct sfxge_intr { 164 enum sfxge_intr_state state; 165 struct resource *msix_res; 166 struct sfxge_intr_hdl *table; 167 int n_alloc; 168 int type; 169 efsys_mem_t status; 170 uint32_t zero_count; 171}; 172 173enum sfxge_mcdi_state { 174 SFXGE_MCDI_UNINITIALIZED = 0, 175 SFXGE_MCDI_INITIALIZED, 176 SFXGE_MCDI_BUSY, 177 SFXGE_MCDI_COMPLETED 178}; 179 180struct sfxge_mcdi { 181 struct mtx lock; 182 efsys_mem_t mem; 183 enum sfxge_mcdi_state state; 184 efx_mcdi_transport_t transport; 185 186 /* Only used in debugging output */ 187 char lock_name[SFXGE_LOCK_NAME_MAX]; 188}; 189 190struct sfxge_hw_stats { 191 clock_t update_time; 192 efsys_mem_t dma_buf; 193 void *decode_buf; 194}; 195 196enum sfxge_port_state { 197 SFXGE_PORT_UNINITIALIZED = 0, 198 SFXGE_PORT_INITIALIZED, 199 SFXGE_PORT_STARTED 200}; 201 202struct sfxge_port { 203 struct sfxge_softc *sc; 204 struct mtx lock; 205 enum sfxge_port_state init_state; 206#ifndef SFXGE_HAVE_PAUSE_MEDIAOPTS 207 unsigned int wanted_fc; 208#endif 209 struct sfxge_hw_stats phy_stats; 210 struct sfxge_hw_stats mac_stats; 211 efx_link_mode_t link_mode; 212 uint8_t mcast_addrs[EFX_MAC_MULTICAST_LIST_MAX * 213 EFX_MAC_ADDR_LEN]; 214 unsigned int mcast_count; 215 216 /* Only used in debugging output */ 217 char lock_name[SFXGE_LOCK_NAME_MAX]; 218}; 219 220enum sfxge_softc_state { 221 SFXGE_UNINITIALIZED = 0, 222 SFXGE_INITIALIZED, 223 SFXGE_REGISTERED, 224 SFXGE_STARTED 225}; 226 227struct sfxge_softc { 228 device_t dev; 229 struct sx softc_lock; 230 char softc_lock_name[SFXGE_LOCK_NAME_MAX]; 231 enum sfxge_softc_state init_state; 232 struct ifnet *ifnet; 233 unsigned int if_flags; 234 struct sysctl_oid *stats_node; 235 struct sysctl_oid *txqs_node; 236 237 struct task task_reset; 238 239 efx_family_t family; 240 caddr_t vpd_data; 241 size_t vpd_size; 242 efx_nic_t *enp; 243 efsys_lock_t enp_lock; 244 245 unsigned int rxq_entries; 246 unsigned int txq_entries; 247 248 bus_dma_tag_t parent_dma_tag; 249 efsys_bar_t bar; 250 251 struct sfxge_intr intr; 252 struct sfxge_mcdi mcdi; 253 struct sfxge_port port; 254 uint32_t buffer_table_next; 255 256 struct sfxge_evq *evq[SFXGE_RX_SCALE_MAX]; 257 unsigned int ev_moderation; 258#if EFSYS_OPT_QSTATS 259 clock_t ev_stats_update_time; 260 uint64_t ev_stats[EV_NQSTATS]; 261#endif 262 263 unsigned int max_rss_channels; 264 uma_zone_t rxq_cache; 265 struct sfxge_rxq *rxq[SFXGE_RX_SCALE_MAX]; 266 unsigned int rx_indir_table[SFXGE_RX_SCALE_MAX]; 267 268 struct sfxge_txq *txq[SFXGE_TXQ_NTYPES + SFXGE_RX_SCALE_MAX]; 269 270 struct ifmedia media; 271 272 size_t rx_prefix_size; 273 size_t rx_buffer_size; 274 size_t rx_buffer_align; 275 uma_zone_t rx_buffer_zone; 276 277 unsigned int evq_max; 278 unsigned int evq_count; 279 unsigned int rxq_count; 280 unsigned int txq_count; 281 282 int tso_fw_assisted; 283}; 284 285#define SFXGE_LINK_UP(sc) ((sc)->port.link_mode != EFX_LINK_DOWN) 286#define SFXGE_RUNNING(sc) ((sc)->ifnet->if_drv_flags & IFF_DRV_RUNNING) 287 288#define SFXGE_PARAM(_name) "hw.sfxge." #_name 289 290SYSCTL_DECL(_hw_sfxge); 291 292/* 293 * From sfxge.c. 294 */ 295extern void sfxge_schedule_reset(struct sfxge_softc *sc); 296extern void sfxge_sram_buf_tbl_alloc(struct sfxge_softc *sc, size_t n, 297 uint32_t *idp); 298 299/* 300 * From sfxge_dma.c. 301 */ 302extern int sfxge_dma_init(struct sfxge_softc *sc); 303extern void sfxge_dma_fini(struct sfxge_softc *sc); 304extern int sfxge_dma_alloc(struct sfxge_softc *sc, bus_size_t len, 305 efsys_mem_t *esmp); 306extern void sfxge_dma_free(efsys_mem_t *esmp); 307extern int sfxge_dma_map_sg_collapse(bus_dma_tag_t tag, bus_dmamap_t map, 308 struct mbuf **mp, 309 bus_dma_segment_t *segs, 310 int *nsegs, int maxsegs); 311 312/* 313 * From sfxge_ev.c. 314 */ 315extern int sfxge_ev_init(struct sfxge_softc *sc); 316extern void sfxge_ev_fini(struct sfxge_softc *sc); 317extern int sfxge_ev_start(struct sfxge_softc *sc); 318extern void sfxge_ev_stop(struct sfxge_softc *sc); 319extern int sfxge_ev_qpoll(struct sfxge_evq *evq); 320 321/* 322 * From sfxge_intr.c. 323 */ 324extern int sfxge_intr_init(struct sfxge_softc *sc); 325extern void sfxge_intr_fini(struct sfxge_softc *sc); 326extern int sfxge_intr_start(struct sfxge_softc *sc); 327extern void sfxge_intr_stop(struct sfxge_softc *sc); 328 329/* 330 * From sfxge_mcdi.c. 331 */ 332extern int sfxge_mcdi_init(struct sfxge_softc *sc); 333extern void sfxge_mcdi_fini(struct sfxge_softc *sc); 334extern int sfxge_mcdi_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ip); 335 336/* 337 * From sfxge_nvram.c. 338 */ 339extern int sfxge_nvram_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ip); 340 341/* 342 * From sfxge_port.c. 343 */ 344extern int sfxge_port_init(struct sfxge_softc *sc); 345extern void sfxge_port_fini(struct sfxge_softc *sc); 346extern int sfxge_port_start(struct sfxge_softc *sc); 347extern void sfxge_port_stop(struct sfxge_softc *sc); 348extern void sfxge_mac_link_update(struct sfxge_softc *sc, 349 efx_link_mode_t mode); 350extern int sfxge_mac_filter_set(struct sfxge_softc *sc); 351extern int sfxge_port_ifmedia_init(struct sfxge_softc *sc); 352 353#define SFXGE_MAX_MTU (9 * 1024) 354 355#define SFXGE_ADAPTER_LOCK_INIT(_sc, _ifname) \ 356 do { \ 357 struct sfxge_softc *__sc = (_sc); \ 358 \ 359 snprintf((__sc)->softc_lock_name, \ 360 sizeof((__sc)->softc_lock_name), \ 361 "%s:softc", (_ifname)); \ 362 sx_init(&(__sc)->softc_lock, (__sc)->softc_lock_name); \ 363 } while (B_FALSE) 364#define SFXGE_ADAPTER_LOCK_DESTROY(_sc) \ 365 sx_destroy(&(_sc)->softc_lock) 366#define SFXGE_ADAPTER_LOCK(_sc) \ 367 sx_xlock(&(_sc)->softc_lock) 368#define SFXGE_ADAPTER_UNLOCK(_sc) \ 369 sx_xunlock(&(_sc)->softc_lock) 370#define SFXGE_ADAPTER_LOCK_ASSERT_OWNED(_sc) \ 371 sx_assert(&(_sc)->softc_lock, LA_XLOCKED) 372 373#define SFXGE_PORT_LOCK_INIT(_port, _ifname) \ 374 do { \ 375 struct sfxge_port *__port = (_port); \ 376 \ 377 snprintf((__port)->lock_name, \ 378 sizeof((__port)->lock_name), \ 379 "%s:port", (_ifname)); \ 380 mtx_init(&(__port)->lock, (__port)->lock_name, \ 381 NULL, MTX_DEF); \ 382 } while (B_FALSE) 383#define SFXGE_PORT_LOCK_DESTROY(_port) \ 384 mtx_destroy(&(_port)->lock) 385#define SFXGE_PORT_LOCK(_port) \ 386 mtx_lock(&(_port)->lock) 387#define SFXGE_PORT_UNLOCK(_port) \ 388 mtx_unlock(&(_port)->lock) 389#define SFXGE_PORT_LOCK_ASSERT_OWNED(_port) \ 390 mtx_assert(&(_port)->lock, MA_OWNED) 391 392#define SFXGE_MCDI_LOCK_INIT(_mcdi, _ifname) \ 393 do { \ 394 struct sfxge_mcdi *__mcdi = (_mcdi); \ 395 \ 396 snprintf((__mcdi)->lock_name, \ 397 sizeof((__mcdi)->lock_name), \ 398 "%s:mcdi", (_ifname)); \ 399 mtx_init(&(__mcdi)->lock, (__mcdi)->lock_name, \ 400 NULL, MTX_DEF); \ 401 } while (B_FALSE) 402#define SFXGE_MCDI_LOCK_DESTROY(_mcdi) \ 403 mtx_destroy(&(_mcdi)->lock) 404#define SFXGE_MCDI_LOCK(_mcdi) \ 405 mtx_lock(&(_mcdi)->lock) 406#define SFXGE_MCDI_UNLOCK(_mcdi) \ 407 mtx_unlock(&(_mcdi)->lock) 408#define SFXGE_MCDI_LOCK_ASSERT_OWNED(_mcdi) \ 409 mtx_assert(&(_mcdi)->lock, MA_OWNED) 410 411#define SFXGE_EVQ_LOCK_INIT(_evq, _ifname, _evq_index) \ 412 do { \ 413 struct sfxge_evq *__evq = (_evq); \ 414 \ 415 snprintf((__evq)->lock_name, \ 416 sizeof((__evq)->lock_name), \ 417 "%s:evq%u", (_ifname), (_evq_index)); \ 418 mtx_init(&(__evq)->lock, (__evq)->lock_name, \ 419 NULL, MTX_DEF); \ 420 } while (B_FALSE) 421#define SFXGE_EVQ_LOCK_DESTROY(_evq) \ 422 mtx_destroy(&(_evq)->lock) 423#define SFXGE_EVQ_LOCK(_evq) \ 424 mtx_lock(&(_evq)->lock) 425#define SFXGE_EVQ_UNLOCK(_evq) \ 426 mtx_unlock(&(_evq)->lock) 427#define SFXGE_EVQ_LOCK_ASSERT_OWNED(_evq) \ 428 mtx_assert(&(_evq)->lock, MA_OWNED) 429 430#endif /* _SFXGE_H */ 431