siena_impl.h revision 284555 
1/*-
2 * Copyright (c) 2009-2015 Solarflare Communications Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,
9 *    this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 *    this list of conditions and the following disclaimer in the documentation
12 *    and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
24 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * The views and conclusions contained in the software and documentation are
27 * those of the authors and should not be interpreted as representing official
28 * policies, either expressed or implied, of the FreeBSD Project.
29 *
30 * $FreeBSD: stable/10/sys/dev/sfxge/common/siena_impl.h 284555 2015-06-18 15:46:39Z arybchik $
31 */
32
33#ifndef _SYS_SIENA_IMPL_H
34#define	_SYS_SIENA_IMPL_H
35
36#include "efx.h"
37#include "efx_regs.h"
38#include "efx_mcdi.h"
39#include "siena_flash.h"
40
41#ifdef	__cplusplus
42extern "C" {
43#endif
44
45#if EFSYS_OPT_PHY_PROPS
46
47/* START MKCONFIG GENERATED SienaPhyHeaderPropsBlock a8db1f8eb5106efd */
48typedef enum siena_phy_prop_e {
49	SIENA_PHY_NPROPS
50} siena_phy_prop_t;
51
52/* END MKCONFIG GENERATED SienaPhyHeaderPropsBlock */
53
54#endif  /* EFSYS_OPT_PHY_PROPS */
55
56#define	SIENA_NVRAM_CHUNK 0x80
57
58extern	__checkReturn	int
59siena_nic_probe(
60	__in		efx_nic_t *enp);
61
62#if EFSYS_OPT_PCIE_TUNE
63
64extern	__checkReturn	int
65siena_nic_pcie_extended_sync(
66	__in		efx_nic_t *enp);
67
68#endif
69
70extern	__checkReturn	int
71siena_nic_reset(
72	__in		efx_nic_t *enp);
73
74extern	__checkReturn	int
75siena_nic_init(
76	__in		efx_nic_t *enp);
77
78#if EFSYS_OPT_DIAG
79
80extern	__checkReturn	int
81siena_nic_register_test(
82	__in		efx_nic_t *enp);
83
84#endif	/* EFSYS_OPT_DIAG */
85
86extern			void
87siena_nic_fini(
88	__in		efx_nic_t *enp);
89
90extern			void
91siena_nic_unprobe(
92	__in		efx_nic_t *enp);
93
94#define	SIENA_SRAM_ROWS	0x12000
95
96extern			void
97siena_sram_init(
98	__in		efx_nic_t *enp);
99
100#if EFSYS_OPT_DIAG
101
102extern	__checkReturn	int
103siena_sram_test(
104	__in		efx_nic_t *enp,
105	__in		efx_sram_pattern_fn_t func);
106
107#endif	/* EFSYS_OPT_DIAG */
108
109#if EFSYS_OPT_MCDI
110
111extern	__checkReturn	int
112siena_mcdi_init(
113	__in		efx_nic_t *enp,
114	__in		const efx_mcdi_transport_t *mtp);
115
116extern			void
117siena_mcdi_request_copyin(
118	__in		efx_nic_t *enp,
119	__in		efx_mcdi_req_t *emrp,
120	__in		unsigned int seq,
121	__in		boolean_t ev_cpl,
122	__in		boolean_t new_epoch);
123
124extern	__checkReturn	boolean_t
125siena_mcdi_request_poll(
126	__in		efx_nic_t *enp);
127
128extern			void
129siena_mcdi_request_copyout(
130	__in		efx_nic_t *enp,
131	__in		efx_mcdi_req_t *emrp);
132
133extern			int
134siena_mcdi_poll_reboot(
135	__in		efx_nic_t *enp);
136
137extern			void
138siena_mcdi_fini(
139	__in		efx_nic_t *enp);
140
141extern	__checkReturn	int
142siena_mcdi_fw_update_supported(
143	__in		efx_nic_t *enp,
144	__out		boolean_t *supportedp);
145
146extern	__checkReturn	int
147siena_mcdi_macaddr_change_supported(
148	__in		efx_nic_t *enp,
149	__out		boolean_t *supportedp);
150
151#endif /* EFSYS_OPT_MCDI */
152
153#if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD
154
155extern	__checkReturn		int
156siena_nvram_partn_size(
157	__in			efx_nic_t *enp,
158	__in			unsigned int partn,
159	__out			size_t *sizep);
160
161extern	__checkReturn		int
162siena_nvram_partn_lock(
163	__in			efx_nic_t *enp,
164	__in			unsigned int partn);
165
166extern	__checkReturn		int
167siena_nvram_partn_read(
168	__in			efx_nic_t *enp,
169	__in			unsigned int partn,
170	__in			unsigned int offset,
171	__out_bcount(size)	caddr_t data,
172	__in			size_t size);
173
174extern	__checkReturn		int
175siena_nvram_partn_erase(
176	__in			efx_nic_t *enp,
177	__in			unsigned int partn,
178	__in			unsigned int offset,
179	__in			size_t size);
180
181extern	__checkReturn		int
182siena_nvram_partn_write(
183	__in			efx_nic_t *enp,
184	__in			unsigned int partn,
185	__in			unsigned int offset,
186	__out_bcount(size)	caddr_t data,
187	__in			size_t size);
188
189extern				void
190siena_nvram_partn_unlock(
191	__in			efx_nic_t *enp,
192	__in			unsigned int partn);
193
194extern	__checkReturn		int
195siena_nvram_get_dynamic_cfg(
196	__in			efx_nic_t *enp,
197	__in			unsigned int index,
198	__in			boolean_t vpd,
199	__out			siena_mc_dynamic_config_hdr_t **dcfgp,
200	__out			size_t *sizep);
201
202#endif	/* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */
203
204#if EFSYS_OPT_NVRAM
205
206#if EFSYS_OPT_DIAG
207
208extern	__checkReturn		int
209siena_nvram_test(
210	__in			efx_nic_t *enp);
211
212#endif	/* EFSYS_OPT_DIAG */
213
214extern	__checkReturn		int
215siena_nvram_size(
216	__in			efx_nic_t *enp,
217	__in			efx_nvram_type_t type,
218	__out			size_t *sizep);
219
220extern	__checkReturn		int
221siena_nvram_get_subtype(
222	__in			efx_nic_t *enp,
223	__in			unsigned int partn,
224	__out			uint32_t *subtypep);
225
226extern	__checkReturn		int
227siena_nvram_get_version(
228	__in			efx_nic_t *enp,
229	__in			efx_nvram_type_t type,
230	__out			uint32_t *subtypep,
231	__out_ecount(4)		uint16_t version[4]);
232
233extern	__checkReturn		int
234siena_nvram_rw_start(
235	__in			efx_nic_t *enp,
236	__in			efx_nvram_type_t type,
237	__out			size_t *pref_chunkp);
238
239extern	__checkReturn		int
240siena_nvram_read_chunk(
241	__in			efx_nic_t *enp,
242	__in			efx_nvram_type_t type,
243	__in			unsigned int offset,
244	__out_bcount(size)	caddr_t data,
245	__in			size_t size);
246
247extern	 __checkReturn		int
248siena_nvram_erase(
249	__in			efx_nic_t *enp,
250	__in			efx_nvram_type_t type);
251
252extern	__checkReturn		int
253siena_nvram_write_chunk(
254	__in			efx_nic_t *enp,
255	__in			efx_nvram_type_t type,
256	__in			unsigned int offset,
257	__in_bcount(size)	caddr_t data,
258	__in			size_t size);
259
260extern				void
261siena_nvram_rw_finish(
262	__in			efx_nic_t *enp,
263	__in			efx_nvram_type_t type);
264
265extern	__checkReturn		int
266siena_nvram_set_version(
267	__in			efx_nic_t *enp,
268	__in			efx_nvram_type_t type,
269	__in_ecount(4)		uint16_t version[4]);
270
271#endif	/* EFSYS_OPT_NVRAM */
272
273#if EFSYS_OPT_VPD
274
275extern	__checkReturn		int
276siena_vpd_init(
277	__in			efx_nic_t *enp);
278
279extern	__checkReturn		int
280siena_vpd_size(
281	__in			efx_nic_t *enp,
282	__out			size_t *sizep);
283
284extern	__checkReturn		int
285siena_vpd_read(
286	__in			efx_nic_t *enp,
287	__out_bcount(size)	caddr_t data,
288	__in			size_t size);
289
290extern	__checkReturn		int
291siena_vpd_verify(
292	__in			efx_nic_t *enp,
293	__in_bcount(size)	caddr_t data,
294	__in			size_t size);
295
296extern	__checkReturn		int
297siena_vpd_reinit(
298	__in			efx_nic_t *enp,
299	__in_bcount(size)	caddr_t data,
300	__in			size_t size);
301
302extern	__checkReturn		int
303siena_vpd_get(
304	__in			efx_nic_t *enp,
305	__in_bcount(size)	caddr_t data,
306	__in			size_t size,
307	__inout			efx_vpd_value_t *evvp);
308
309extern	__checkReturn		int
310siena_vpd_set(
311	__in			efx_nic_t *enp,
312	__in_bcount(size)	caddr_t data,
313	__in			size_t size,
314	__in			efx_vpd_value_t *evvp);
315
316extern	__checkReturn		int
317siena_vpd_next(
318	__in			efx_nic_t *enp,
319	__in_bcount(size)	caddr_t data,
320	__in			size_t size,
321	__out			efx_vpd_value_t *evvp,
322	__inout			unsigned int *contp);
323
324extern __checkReturn		int
325siena_vpd_write(
326	__in			efx_nic_t *enp,
327	__in_bcount(size)	caddr_t data,
328	__in			size_t size);
329
330extern				void
331siena_vpd_fini(
332	__in			efx_nic_t *enp);
333
334#endif	/* EFSYS_OPT_VPD */
335
336typedef struct siena_link_state_s {
337	uint32_t		sls_adv_cap_mask;
338	uint32_t		sls_lp_cap_mask;
339	unsigned int 		sls_fcntl;
340	efx_link_mode_t		sls_link_mode;
341#if EFSYS_OPT_LOOPBACK
342	efx_loopback_type_t	sls_loopback;
343#endif
344	boolean_t		sls_mac_up;
345} siena_link_state_t;
346
347extern			void
348siena_phy_link_ev(
349	__in		efx_nic_t *enp,
350	__in		efx_qword_t *eqp,
351	__out		efx_link_mode_t *link_modep);
352
353extern	__checkReturn	int
354siena_phy_get_link(
355	__in		efx_nic_t *enp,
356	__out		siena_link_state_t *slsp);
357
358extern	__checkReturn	int
359siena_phy_power(
360	__in		efx_nic_t *enp,
361	__in		boolean_t on);
362
363extern	__checkReturn	int
364siena_phy_reconfigure(
365	__in		efx_nic_t *enp);
366
367extern	__checkReturn	int
368siena_phy_verify(
369	__in		efx_nic_t *enp);
370
371extern	__checkReturn	int
372siena_phy_oui_get(
373	__in		efx_nic_t *enp,
374	__out		uint32_t *ouip);
375
376#if EFSYS_OPT_PHY_STATS
377
378extern					void
379siena_phy_decode_stats(
380	__in				efx_nic_t *enp,
381	__in				uint32_t vmask,
382	__in_opt			efsys_mem_t *esmp,
383	__out_opt			uint64_t *smaskp,
384	__out_ecount_opt(EFX_PHY_NSTATS)	uint32_t *stat);
385
386extern	__checkReturn			int
387siena_phy_stats_update(
388	__in				efx_nic_t *enp,
389	__in				efsys_mem_t *esmp,
390	__out_ecount(EFX_PHY_NSTATS)	uint32_t *stat);
391
392#endif	/* EFSYS_OPT_PHY_STATS */
393
394#if EFSYS_OPT_PHY_PROPS
395
396#if EFSYS_OPT_NAMES
397
398extern		const char *
399siena_phy_prop_name(
400	__in	efx_nic_t *enp,
401	__in	unsigned int id);
402
403#endif	/* EFSYS_OPT_NAMES */
404
405extern	__checkReturn	int
406siena_phy_prop_get(
407	__in		efx_nic_t *enp,
408	__in		unsigned int id,
409	__in		uint32_t flags,
410	__out		uint32_t *valp);
411
412extern	__checkReturn	int
413siena_phy_prop_set(
414	__in		efx_nic_t *enp,
415	__in		unsigned int id,
416	__in		uint32_t val);
417
418#endif	/* EFSYS_OPT_PHY_PROPS */
419
420#if EFSYS_OPT_BIST
421
422extern	__checkReturn		int
423siena_phy_bist_start(
424	__in			efx_nic_t *enp,
425	__in			efx_bist_type_t type);
426
427extern	__checkReturn		int
428siena_phy_bist_poll(
429	__in			efx_nic_t *enp,
430	__in			efx_bist_type_t type,
431	__out			efx_bist_result_t *resultp,
432	__out_opt __drv_when(count > 0, __notnull)
433	uint32_t 	*value_maskp,
434	__out_ecount_opt(count)	__drv_when(count > 0, __notnull)
435	unsigned long	*valuesp,
436	__in			size_t count);
437
438extern				void
439siena_phy_bist_stop(
440	__in			efx_nic_t *enp,
441	__in			efx_bist_type_t type);
442
443#endif	/* EFSYS_OPT_BIST */
444
445extern	__checkReturn	int
446siena_mac_poll(
447	__in		efx_nic_t *enp,
448	__out		efx_link_mode_t *link_modep);
449
450extern	__checkReturn	int
451siena_mac_up(
452	__in		efx_nic_t *enp,
453	__out		boolean_t *mac_upp);
454
455extern	__checkReturn	int
456siena_mac_reconfigure(
457	__in	efx_nic_t *enp);
458
459#if EFSYS_OPT_LOOPBACK
460
461extern	__checkReturn	int
462siena_mac_loopback_set(
463	__in		efx_nic_t *enp,
464	__in		efx_link_mode_t link_mode,
465	__in		efx_loopback_type_t loopback_type);
466
467#endif	/* EFSYS_OPT_LOOPBACK */
468
469#if EFSYS_OPT_MAC_STATS
470
471extern	__checkReturn			int
472siena_mac_stats_update(
473	__in				efx_nic_t *enp,
474	__in				efsys_mem_t *esmp,
475	__out_ecount(EFX_MAC_NSTATS)	efsys_stat_t *stat,
476	__out_opt			uint32_t *generationp);
477
478#endif	/* EFSYS_OPT_MAC_STATS */
479
480#ifdef	__cplusplus
481}
482#endif
483
484#endif	/* _SYS_SIENA_IMPL_H */
485