siena_flash.h revision 284555
1/*- 2 * Copyright (c) 2007-2015 Solarflare Communications Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 24 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 * The views and conclusions contained in the software and documentation are 27 * those of the authors and should not be interpreted as representing official 28 * policies, either expressed or implied, of the FreeBSD Project. 29 * 30 * $FreeBSD: stable/10/sys/dev/sfxge/common/siena_flash.h 284555 2015-06-18 15:46:39Z arybchik $ 31 */ 32 33#ifndef _SYS_SIENA_FLASH_H 34#define _SYS_SIENA_FLASH_H 35 36#pragma pack(1) 37 38/* Fixed locations near the start of flash (which may be in the internal PHY 39 * firmware header) point to the boot header. 40 * 41 * - parsed by MC boot ROM and firmware 42 * - reserved (but not parsed) by PHY firmware 43 * - opaque to driver 44 */ 45 46#define SIENA_MC_BOOT_PHY_FW_HDR_LEN (0x20) 47 48#define SIENA_MC_BOOT_PTR_LOCATION (0x18) /* First thing we try to boot */ 49#define SIENA_MC_BOOT_ALT_PTR_LOCATION (0x1c) /* Alternative if that fails */ 50 51#define SIENA_MC_BOOT_HDR_LEN (0x200) 52 53#define SIENA_MC_BOOT_MAGIC (0x51E4A001) 54#define SIENA_MC_BOOT_VERSION (1) 55 56 57/*Structures supporting an arbitrary number of binary blobs in the flash image 58 intended to house code and tables for the satellite cpus*/ 59/*thanks to random.org for:*/ 60#define BLOBS_HEADER_MAGIC (0xBDA3BBD4) 61#define BLOB_HEADER_MAGIC (0xA1478A91) 62 63typedef struct blobs_hdr_s { /* GENERATED BY scripts/genfwdef */ 64 efx_dword_t magic; 65 efx_dword_t no_of_blobs; 66} blobs_hdr_t; 67 68typedef struct blob_hdr_s { /* GENERATED BY scripts/genfwdef */ 69 efx_dword_t magic; 70 efx_dword_t cpu_type; 71 efx_dword_t build_variant; 72 efx_dword_t offset; 73 efx_dword_t length; 74 efx_dword_t checksum; 75} blob_hdr_t; 76 77#define BLOB_CPU_TYPE_TXDI_TEXT (0) 78#define BLOB_CPU_TYPE_RXDI_TEXT (1) 79#define BLOB_CPU_TYPE_TXDP_TEXT (2) 80#define BLOB_CPU_TYPE_RXDP_TEXT (3) 81#define BLOB_CPU_TYPE_RXHRSL_HR_LUT (4) 82#define BLOB_CPU_TYPE_RXHRSL_HR_LUT_CFG (5) 83#define BLOB_CPU_TYPE_TXHRSL_HR_LUT (6) 84#define BLOB_CPU_TYPE_TXHRSL_HR_LUT_CFG (7) 85#define BLOB_CPU_TYPE_RXHRSL_HR_PGM (8) 86#define BLOB_CPU_TYPE_RXHRSL_SL_PGM (9) 87#define BLOB_CPU_TYPE_TXHRSL_HR_PGM (10) 88#define BLOB_CPU_TYPE_TXHRSL_SL_PGM (11) 89#define BLOB_CPU_TYPE_RXDI_VTBL0 (12) 90#define BLOB_CPU_TYPE_TXDI_VTBL0 (13) 91#define BLOB_CPU_TYPE_RXDI_VTBL1 (14) 92#define BLOB_CPU_TYPE_TXDI_VTBL1 (15) 93#define BLOB_CPU_TYPE_DUMPSPEC (32) 94 95typedef struct siena_mc_boot_hdr_s { /* GENERATED BY scripts/genfwdef */ 96 efx_dword_t magic; /* = SIENA_MC_BOOT_MAGIC */ 97 efx_word_t hdr_version; /* this structure definition is version 1 */ 98 efx_byte_t board_type; 99 efx_byte_t firmware_version_a; 100 efx_byte_t firmware_version_b; 101 efx_byte_t firmware_version_c; 102 efx_word_t checksum; /* of whole header area + firmware image */ 103 efx_word_t firmware_version_d; 104 efx_byte_t mcfw_subtype; 105 efx_byte_t reserved_a[1]; /* (set to 0) */ 106 efx_dword_t firmware_text_offset; /* offset to firmware .text */ 107 efx_dword_t firmware_text_size; /* length of firmware .text, in bytes */ 108 efx_dword_t firmware_data_offset; /* offset to firmware .data */ 109 efx_dword_t firmware_data_size; /* length of firmware .data, in bytes */ 110 efx_byte_t spi_rate; /* SPI rate for reading image, 0 is BootROM default */ 111 efx_byte_t spi_phase_adj; /* SPI SDO/SCL phase adjustment, 0 is default (no adj) */ 112 efx_word_t reserved_b[1]; /* (set to 0) */ 113 efx_dword_t reserved_c[7]; /* (set to 0) */ 114} siena_mc_boot_hdr_t; 115 116#define SIENA_MC_BOOT_HDR_PADDING \ 117 (SIENA_MC_BOOT_HDR_LEN - sizeof(siena_mc_boot_hdr_t)) 118 119#define SIENA_MC_STATIC_CONFIG_MAGIC (0xBDCF5555) 120#define SIENA_MC_STATIC_CONFIG_VERSION (0) 121 122typedef struct siena_mc_static_config_hdr_s { /* GENERATED BY scripts/genfwdef */ 123 efx_dword_t magic; /* = SIENA_MC_STATIC_CONFIG_MAGIC */ 124 efx_word_t length; /* of header area (i.e. not including VPD) */ 125 efx_byte_t version; 126 efx_byte_t csum; /* over header area (i.e. not including VPD) */ 127 efx_dword_t static_vpd_offset; 128 efx_dword_t static_vpd_length; 129 efx_dword_t capabilities; 130 efx_byte_t mac_addr_base[6]; 131 efx_byte_t green_mode_cal; /* Green mode calibration result */ 132 efx_byte_t green_mode_valid; /* Whether cal holds a valid value */ 133 efx_word_t mac_addr_count; 134 efx_word_t mac_addr_stride; 135 efx_word_t calibrated_vref; /* Vref as measured during production */ 136 efx_word_t adc_vref; /* Vref as read by ADC */ 137 efx_dword_t reserved2[1]; /* (write as zero) */ 138 efx_dword_t num_dbi_items; 139 struct { 140 efx_word_t addr; 141 efx_word_t byte_enables; 142 efx_dword_t value; 143 } dbi[]; 144} siena_mc_static_config_hdr_t; 145 146#define SIENA_MC_DYNAMIC_CONFIG_MAGIC (0xBDCFDDDD) 147#define SIENA_MC_DYNAMIC_CONFIG_VERSION (0) 148 149typedef struct siena_mc_fw_version_s { /* GENERATED BY scripts/genfwdef */ 150 efx_dword_t fw_subtype; 151 efx_word_t version_w; 152 efx_word_t version_x; 153 efx_word_t version_y; 154 efx_word_t version_z; 155} siena_mc_fw_version_t; 156 157typedef struct siena_mc_dynamic_config_hdr_s { /* GENERATED BY scripts/genfwdef */ 158 efx_dword_t magic; /* = SIENA_MC_DYNAMIC_CONFIG_MAGIC */ 159 efx_word_t length; /* of header area (i.e. not including VPD) */ 160 efx_byte_t version; 161 efx_byte_t csum; /* over header area (i.e. not including VPD) */ 162 efx_dword_t dynamic_vpd_offset; 163 efx_dword_t dynamic_vpd_length; 164 efx_dword_t num_fw_version_items; 165 siena_mc_fw_version_t fw_version[]; 166} siena_mc_dynamic_config_hdr_t; 167 168#define SIENA_MC_EXPROM_SINGLE_MAGIC (0xAA55) /* little-endian uint16_t */ 169 170#define SIENA_MC_EXPROM_COMBO_MAGIC (0xB0070102) /* little-endian uint32_t */ 171#define SIENA_MC_EXPROM_COMBO_V2_MAGIC (0xB0070103) /* little-endian uint32_t */ 172 173typedef struct siena_mc_combo_rom_hdr_s { /* GENERATED BY scripts/genfwdef */ 174 efx_dword_t magic; /* = SIENA_MC_EXPROM_COMBO_MAGIC or SIENA_MC_EXPROM_COMBO_V2_MAGIC */ 175 union { 176 struct { 177 efx_dword_t len1; /* length of first image */ 178 efx_dword_t len2; /* length of second image */ 179 efx_dword_t off1; /* offset of first byte to edit to combine images */ 180 efx_dword_t off2; /* offset of second byte to edit to combine images */ 181 efx_word_t infoblk0_off;/* infoblk offset */ 182 efx_word_t infoblk1_off;/* infoblk offset */ 183 efx_byte_t infoblk_len;/* length of space reserved for one infoblk structure */ 184 efx_byte_t reserved[7];/* (set to 0) */ 185 } v1; 186 struct { 187 efx_dword_t len1; /* length of first image */ 188 efx_dword_t len2; /* length of second image */ 189 efx_dword_t off1; /* offset of first byte to edit to combine images */ 190 efx_dword_t off2; /* offset of second byte to edit to combine images */ 191 efx_word_t infoblk_off;/* infoblk start offset */ 192 efx_word_t infoblk_count;/* infoblk count */ 193 efx_byte_t infoblk_len;/* length of space reserved for one infoblk structure */ 194 efx_byte_t reserved[7];/* (set to 0) */ 195 } v2; 196 }; 197} siena_mc_combo_rom_hdr_t; 198 199#pragma pack() 200 201#endif /* _SYS_SIENA_FLASH_H */ 202