hunt_nic.c revision 301344
1/*- 2 * Copyright (c) 2012-2015 Solarflare Communications Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 24 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 * The views and conclusions contained in the software and documentation are 27 * those of the authors and should not be interpreted as representing official 28 * policies, either expressed or implied, of the FreeBSD Project. 29 */ 30 31#include <sys/cdefs.h> 32__FBSDID("$FreeBSD: stable/10/sys/dev/sfxge/common/hunt_nic.c 301344 2016-06-04 15:24:11Z arybchik $"); 33 34#include "efx.h" 35#include "efx_impl.h" 36#if EFSYS_OPT_MON_MCDI 37#include "mcdi_mon.h" 38#endif 39 40#if EFSYS_OPT_HUNTINGTON 41 42 43 __checkReturn efx_rc_t 44hunt_board_cfg( 45 __in efx_nic_t *enp) 46{ 47 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); 48 efx_nic_cfg_t *encp = &(enp->en_nic_cfg); 49 uint8_t mac_addr[6]; 50 uint32_t board_type = 0; 51 ef10_link_state_t els; 52 efx_port_t *epp = &(enp->en_port); 53 uint32_t port; 54 uint32_t pf; 55 uint32_t vf; 56 uint32_t mask; 57 uint32_t flags; 58 uint32_t sysclk; 59 uint32_t base, nvec; 60 efx_rc_t rc; 61 62 if ((rc = efx_mcdi_get_port_assignment(enp, &port)) != 0) 63 goto fail1; 64 65 /* 66 * NOTE: The MCDI protocol numbers ports from zero. 67 * The common code MCDI interface numbers ports from one. 68 */ 69 emip->emi_port = port + 1; 70 71 if ((rc = ef10_external_port_mapping(enp, port, 72 &encp->enc_external_port)) != 0) 73 goto fail2; 74 75 /* 76 * Get PCIe function number from firmware (used for 77 * per-function privilege and dynamic config info). 78 * - PCIe PF: pf = PF number, vf = 0xffff. 79 * - PCIe VF: pf = parent PF, vf = VF number. 80 */ 81 if ((rc = efx_mcdi_get_function_info(enp, &pf, &vf)) != 0) 82 goto fail3; 83 84 encp->enc_pf = pf; 85 encp->enc_vf = vf; 86 87 /* MAC address for this function */ 88 if (EFX_PCI_FUNCTION_IS_PF(encp)) { 89 rc = efx_mcdi_get_mac_address_pf(enp, mac_addr); 90 if ((rc == 0) && (mac_addr[0] & 0x02)) { 91 /* 92 * If the static config does not include a global MAC 93 * address pool then the board may return a locally 94 * administered MAC address (this should only happen on 95 * incorrectly programmed boards). 96 */ 97 rc = EINVAL; 98 } 99 } else { 100 rc = efx_mcdi_get_mac_address_vf(enp, mac_addr); 101 } 102 if (rc != 0) 103 goto fail4; 104 105 EFX_MAC_ADDR_COPY(encp->enc_mac_addr, mac_addr); 106 107 /* Board configuration */ 108 rc = efx_mcdi_get_board_cfg(enp, &board_type, NULL, NULL); 109 if (rc != 0) { 110 /* Unprivileged functions may not be able to read board cfg */ 111 if (rc == EACCES) 112 board_type = 0; 113 else 114 goto fail5; 115 } 116 117 encp->enc_board_type = board_type; 118 encp->enc_clk_mult = 1; /* not used for Huntington */ 119 120 /* Fill out fields in enp->en_port and enp->en_nic_cfg from MCDI */ 121 if ((rc = efx_mcdi_get_phy_cfg(enp)) != 0) 122 goto fail6; 123 124 /* Obtain the default PHY advertised capabilities */ 125 if ((rc = ef10_phy_get_link(enp, &els)) != 0) 126 goto fail7; 127 epp->ep_default_adv_cap_mask = els.els_adv_cap_mask; 128 epp->ep_adv_cap_mask = els.els_adv_cap_mask; 129 130 /* 131 * Enable firmware workarounds for hardware errata. 132 * Expected responses are: 133 * - 0 (zero): 134 * Success: workaround enabled or disabled as requested. 135 * - MC_CMD_ERR_ENOSYS (reported as ENOTSUP): 136 * Firmware does not support the MC_CMD_WORKAROUND request. 137 * (assume that the workaround is not supported). 138 * - MC_CMD_ERR_ENOENT (reported as ENOENT): 139 * Firmware does not support the requested workaround. 140 * - MC_CMD_ERR_EPERM (reported as EACCES): 141 * Unprivileged function cannot enable/disable workarounds. 142 * 143 * See efx_mcdi_request_errcode() for MCDI error translations. 144 */ 145 146 /* 147 * If the bug35388 workaround is enabled, then use an indirect access 148 * method to avoid unsafe EVQ writes. 149 */ 150 rc = efx_mcdi_set_workaround(enp, MC_CMD_WORKAROUND_BUG35388, B_TRUE, 151 NULL); 152 if ((rc == 0) || (rc == EACCES)) 153 encp->enc_bug35388_workaround = B_TRUE; 154 else if ((rc == ENOTSUP) || (rc == ENOENT)) 155 encp->enc_bug35388_workaround = B_FALSE; 156 else 157 goto fail8; 158 159 /* 160 * If the bug41750 workaround is enabled, then do not test interrupts, 161 * as the test will fail (seen with Greenport controllers). 162 */ 163 rc = efx_mcdi_set_workaround(enp, MC_CMD_WORKAROUND_BUG41750, B_TRUE, 164 NULL); 165 if (rc == 0) { 166 encp->enc_bug41750_workaround = B_TRUE; 167 } else if (rc == EACCES) { 168 /* Assume a controller with 40G ports needs the workaround. */ 169 if (epp->ep_default_adv_cap_mask & EFX_PHY_CAP_40000FDX) 170 encp->enc_bug41750_workaround = B_TRUE; 171 else 172 encp->enc_bug41750_workaround = B_FALSE; 173 } else if ((rc == ENOTSUP) || (rc == ENOENT)) { 174 encp->enc_bug41750_workaround = B_FALSE; 175 } else { 176 goto fail9; 177 } 178 if (EFX_PCI_FUNCTION_IS_VF(encp)) { 179 /* Interrupt testing does not work for VFs. See bug50084. */ 180 encp->enc_bug41750_workaround = B_TRUE; 181 } 182 183 /* 184 * If the bug26807 workaround is enabled, then firmware has enabled 185 * support for chained multicast filters. Firmware will reset (FLR) 186 * functions which have filters in the hardware filter table when the 187 * workaround is enabled/disabled. 188 * 189 * We must recheck if the workaround is enabled after inserting the 190 * first hardware filter, in case it has been changed since this check. 191 */ 192 rc = efx_mcdi_set_workaround(enp, MC_CMD_WORKAROUND_BUG26807, 193 B_TRUE, &flags); 194 if (rc == 0) { 195 encp->enc_bug26807_workaround = B_TRUE; 196 if (flags & (1 << MC_CMD_WORKAROUND_EXT_OUT_FLR_DONE_LBN)) { 197 /* 198 * Other functions had installed filters before the 199 * workaround was enabled, and they have been reset 200 * by firmware. 201 */ 202 EFSYS_PROBE(bug26807_workaround_flr_done); 203 /* FIXME: bump MC warm boot count ? */ 204 } 205 } else if (rc == EACCES) { 206 /* 207 * Unprivileged functions cannot enable the workaround in older 208 * firmware. 209 */ 210 encp->enc_bug26807_workaround = B_FALSE; 211 } else if ((rc == ENOTSUP) || (rc == ENOENT)) { 212 encp->enc_bug26807_workaround = B_FALSE; 213 } else { 214 goto fail10; 215 } 216 217 /* Get sysclk frequency (in MHz). */ 218 if ((rc = efx_mcdi_get_clock(enp, &sysclk)) != 0) 219 goto fail11; 220 221 /* 222 * The timer quantum is 1536 sysclk cycles, documented for the 223 * EV_TMR_VAL field of EV_TIMER_TBL. Scale for MHz and ns units. 224 */ 225 encp->enc_evq_timer_quantum_ns = 1536000UL / sysclk; /* 1536 cycles */ 226 if (encp->enc_bug35388_workaround) { 227 encp->enc_evq_timer_max_us = (encp->enc_evq_timer_quantum_ns << 228 ERF_DD_EVQ_IND_TIMER_VAL_WIDTH) / 1000; 229 } else { 230 encp->enc_evq_timer_max_us = (encp->enc_evq_timer_quantum_ns << 231 FRF_CZ_TC_TIMER_VAL_WIDTH) / 1000; 232 } 233 234 /* Check capabilities of running datapath firmware */ 235 if ((rc = ef10_get_datapath_caps(enp)) != 0) 236 goto fail12; 237 238 /* Alignment for receive packet DMA buffers */ 239 encp->enc_rx_buf_align_start = 1; 240 encp->enc_rx_buf_align_end = 64; /* RX DMA end padding */ 241 242 /* Alignment for WPTR updates */ 243 encp->enc_rx_push_align = EF10_RX_WPTR_ALIGN; 244 245 /* 246 * Set resource limits for MC_CMD_ALLOC_VIS. Note that we cannot use 247 * MC_CMD_GET_RESOURCE_LIMITS here as that reports the available 248 * resources (allocated to this PCIe function), which is zero until 249 * after we have allocated VIs. 250 */ 251 encp->enc_evq_limit = 1024; 252 encp->enc_rxq_limit = EFX_RXQ_LIMIT_TARGET; 253 encp->enc_txq_limit = EFX_TXQ_LIMIT_TARGET; 254 255 encp->enc_buftbl_limit = 0xFFFFFFFF; 256 257 encp->enc_piobuf_limit = HUNT_PIOBUF_NBUFS; 258 encp->enc_piobuf_size = HUNT_PIOBUF_SIZE; 259 encp->enc_piobuf_min_alloc_size = HUNT_MIN_PIO_ALLOC_SIZE; 260 261 /* 262 * Get the current privilege mask. Note that this may be modified 263 * dynamically, so this value is informational only. DO NOT use 264 * the privilege mask to check for sufficient privileges, as that 265 * can result in time-of-check/time-of-use bugs. 266 */ 267 if ((rc = ef10_get_privilege_mask(enp, &mask)) != 0) 268 goto fail13; 269 encp->enc_privilege_mask = mask; 270 271 /* Get interrupt vector limits */ 272 if ((rc = efx_mcdi_get_vector_cfg(enp, &base, &nvec, NULL)) != 0) { 273 if (EFX_PCI_FUNCTION_IS_PF(encp)) 274 goto fail14; 275 276 /* Ignore error (cannot query vector limits from a VF). */ 277 base = 0; 278 nvec = 1024; 279 } 280 encp->enc_intr_vec_base = base; 281 encp->enc_intr_limit = nvec; 282 283 /* 284 * Maximum number of bytes into the frame the TCP header can start for 285 * firmware assisted TSO to work. 286 */ 287 encp->enc_tx_tso_tcp_header_offset_limit = EF10_TCP_HEADER_OFFSET_LIMIT; 288 289 return (0); 290 291fail14: 292 EFSYS_PROBE(fail14); 293fail13: 294 EFSYS_PROBE(fail13); 295fail12: 296 EFSYS_PROBE(fail12); 297fail11: 298 EFSYS_PROBE(fail11); 299fail10: 300 EFSYS_PROBE(fail10); 301fail9: 302 EFSYS_PROBE(fail9); 303fail8: 304 EFSYS_PROBE(fail8); 305fail7: 306 EFSYS_PROBE(fail7); 307fail6: 308 EFSYS_PROBE(fail6); 309fail5: 310 EFSYS_PROBE(fail5); 311fail4: 312 EFSYS_PROBE(fail4); 313fail3: 314 EFSYS_PROBE(fail3); 315fail2: 316 EFSYS_PROBE(fail2); 317fail1: 318 EFSYS_PROBE1(fail1, efx_rc_t, rc); 319 320 return (rc); 321} 322 323 324#endif /* EFSYS_OPT_HUNTINGTON */ 325