tdioctl.h revision 285809
1/******************************************************************************* 2*Copyright (c) 2014 PMC-Sierra, Inc. All rights reserved. 3* 4*Redistribution and use in source and binary forms, with or without modification, are permitted provided 5*that the following conditions are met: 6*1. Redistributions of source code must retain the above copyright notice, this list of conditions and the 7*following disclaimer. 8*2. Redistributions in binary form must reproduce the above copyright notice, 9*this list of conditions and the following disclaimer in the documentation and/or other materials provided 10*with the distribution. 11* 12*THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED 13*WARRANTIES,INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 14*FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 15*FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 16*NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 17*BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 18*LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 19*SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE 20* 21* $FreeBSD$ 22* 23*******************************************************************************/ 24/***************************************************************************** 25* 26* tdioctl.h 27* 28* Abstract: This module contains data structure definition used 29* by the Transport Dependent (TD) Layer IOCTL. 30* 31* 32* Notes: 33* 34* 35** MODIFICATION HISTORY ****************************************************** 36* 37* NAME DATE DESCRIPTION 38* ---- ---- ----------- 39* IWN 12/11/02 Initial creation. 40* 41* 42*****************************************************************************/ 43 44 45#ifndef TD_IOCTL_H 46 47#define TD_IOCTL_H 48 49//#include "global.h" 50 51/* 52 * PMC-Sierra IOCTL signature 53 */ 54#define PMC_SIERRA_SIGNATURE 0x1234 55#define PMC_SIERRA_IOCTL_SIGNATURE "PMC-STRG" 56 57/* 58 * Major function code of IOCTL functions, common to target and initiator. 59 */ 60#define IOCTL_MJ_CARD_PARAMETER 0x01 61#define IOCTL_MJ_FW_CONTROL 0x02 62#define IOCTL_MJ_NVMD_GET 0x03 63#define IOCTL_MJ_NVMD_SET 0x04 64#define IOCTL_MJ_GET_EVENT_LOG1 0x05 65#define IOCTL_MJ_GET_EVENT_LOG2 0x06 66#define IOCTL_MJ_GET_CORE_DUMP 0x07 67#define IOCTL_MJ_LL_TRACING 0x08 68#define IOCTL_MJ_FW_PROFILE 0x09 69#define IOCTL_MJ_MNID 0x0A 70#define IOCTL_MJ_ENCRYPTION_CTL 0x0B 71 72#define IOCTL_MJ_FW_INFO 0x0C 73 74#define IOCTL_MJ_LL_API_TEST 0x11 75#define IOCTL_MJ_CHECK_DPMC_EVENT 0x16 76#define IOCTL_MJ_GET_FW_REV 0x1A 77#define IOCTL_MJ_GET_DEVICE_INFO 0x1B 78#define IOCTL_MJ_GET_IO_ERROR_STATISTIC 0x1C 79#define IOCTL_MJ_GET_IO_EVENT_STATISTIC 0x1D 80#define IOCTL_MJ_GET_FORENSIC_DATA 0x1E 81#define IOCTL_MJ_GET_DEVICE_LIST 0x1F 82#define IOCTL_MJ_SMP_REQUEST 0x6D 83#define IOCTL_MJ_GET_DEVICE_LUN 0x7A1 84#define IOCTL_MJ_PHY_GENERAL_STATUS 0x7A6 85#define IOCTL_MJ_PHY_DETAILS 0x7A7 86#define IOCTL_MJ_SEND_BIST 0x20 87#define IOCTL_MJ_CHECK_FATAL_ERROR 0x70 88#define IOCTL_MJ_FATAL_ERROR_DUMP_COMPLETE 0x71 89#define IOCTL_MJ_GPIO 0x41 90#define IOCTL_MJ_SGPIO 0x42 91#define IOCTL_MJ_SEND_TMF 0x6E 92#define IOCTL_MJ_FATAL_ERROR_SOFT_RESET_TRIG 0x72 93#define IOCTL_MJ_FATAL_ERR_CHK_RET_FALSE 0x76 94#define IOCTL_MJ_FATAL_ERR_CHK_SEND_FALSE 0x76 95#define IOCTL_MJ_FATAL_ERR_CHK_SEND_TRUE 0x77 96 97 98/* 99 * Major function code of IOCTL functions, specific to initiator. 100 */ 101#define IOCTL_MJ_INI_ISCSI_DISCOVERY 0x21 102#define IOCTL_MJ_INI_SESSION_CONTROL 0x22 103#define IOCTL_MJ_INI_SNIA_IMA 0x23 104#define IOCTL_MJ_INI_SCSI 0x24 105#define IOCTL_MJ_INI_WMI 0x25 106#define IOCTL_MJ_INI_DRIVER_EVENT_LOG 0x26 107#define IOCTL_MJ_INI_PERSISTENT_BINDING 0x27 108#define IOCTL_MJ_INI_DRIVER_IDENTIFY 0x28 109 110/* temp */ 111#define IOCTL_MJ_PORT_STOP 0x29 112#define IOCTL_MJ_PORT_START 0x30 113 114/* SPCv controller configuration page commands */ 115#define IOCTL_MJ_MODE_CTL_PAGE 0x40 116 117#define IOCTL_MJ_SET_OR_GET_REGISTER 0x41 118 119#define IOCTL_MJ_GET_PHY_PROFILE 0x44 120#define IOCTL_MJ_SET_PHY_PROFILE 0x43 121 122#define IOCTL_MJ_GET_DRIVER_VERSION 0x101 123 124#define IOCTL_MN_PHY_PROFILE_COUNTERS 0x01 125#define IOCTL_MN_PHY_PROFILE_COUNTERS_CLR 0x02 126#define IOCTL_MN_PHY_PROFILE_BW_COUNTERS 0x03 127#define IOCTL_MN_PHY_PROFILE_ANALOG_SETTINGS 0x04 128 129/* 130 * Minor functions for Card parameter IOCTL functions. 131 */ 132#define IOCTL_MN_CARD_GET_VPD_INFO 0x01 133#define IOCTL_MN_CARD_GET_PORTSTART_INFO 0x02 134#define IOCTL_MN_CARD_GET_INTERRUPT_CONFIG 0x03 135#define IOCTL_MN_CARD_GET_PHY_ANALOGSETTING 0x04 136#define IOCTL_MN_CARD_GET_TIMER_CONFIG 0x05 137#define IOCTL_MN_CARD_GET_TYPE_FATAL_DUMP 0x06 138 139/* 140 * Minor functions for FW control IOCTL functions. 141 */ 142 143/* Send FW data requests. 144 */ 145#define IOCTL_MN_FW_DOWNLOAD_DATA 0x01 146 147/* Send the request for burning the new firmware. 148 */ 149#define IOCTL_MN_FW_DOWNLOAD_BURN 0x02 150 151/* Poll for the flash burn phases. Sequences of poll function calls are 152 * needed following the IOCTL_MN_FW_DOWNLOAD_BURN, IOCTL_MN_FW_BURN_OSPD 153 * and IOCTL_MN_FW_ROLL_BACK_FW functions. 154 */ 155#define IOCTL_MN_FW_BURN_POLL 0x03 156 157/* Instruct the FW to roll back FW to prior revision. 158 */ 159#define IOCTL_MN_FW_ROLL_BACK_FW 0x04 160 161/* Instruct the FW to return the current firmware revision number. 162 */ 163#define IOCTL_MN_FW_VERSION 0x05 164 165/* Retrieve the maximum size of the OS Persistent Data stored on the card. 166 */ 167#define IOCTL_MN_FW_GET_OSPD_SIZE 0x06 168 169/* Retrieve the OS Persistent Data from the card. 170 */ 171#define IOCTL_MN_FW_GET_OSPD 0x07 172 173/* Send a new OS Persistent Data to the card and burn in flash. 174 */ 175#define IOCTL_MN_FW_BURN_OSPD 0x08 176 177/* Retrieve the trace buffer from the card FW. Only available on the debug 178 * version of the FW. 179 */ 180#define IOCTL_MN_FW_GET_TRACE_BUFFER 0x0f 181 182#define IOCTL_MN_NVMD_GET_CONFIG 0x0A 183#define IOCTL_MN_NVMD_SET_CONFIG 0x0B 184 185#define IOCTL_MN_FW_GET_CORE_DUMP_AAP1 0x0C 186#define IOCTL_MN_FW_GET_CORE_DUMP_IOP 0x0D 187#define IOCTL_MN_FW_GET_CORE_DUMP_FLASH_AAP1 0x12 188#define IOCTL_MN_FW_GET_CORE_DUMP_FLASH_IOP 0x13 189 190#define IOCTL_MN_LL_RESET_TRACE_INDEX 0x0e 191#define IOCTL_MN_LL_GET_TRACE_BUFFER_INFO 0x0f 192#define IOCTL_MN_LL_GET_TRACE_BUFFER 0x10 193 194#define IOCTL_MN_ENCRYPTION_GET_INFO 0x13 195#define IOCTL_MN_ENCRYPTION_SET_MODE 0x14 196#define IOCTL_MN_ENCRYPTION_KEK_ADD 0x15 197#define IOCTL_MN_ENCRYPTION_DEK_ADD 0x16 198#define IOCTL_MN_ENCRYPTION_DEK_INVALID 0x17 199#define IOCTL_MN_ENCRYPTION_KEK_NVRAM 0x18 200#define IOCTL_MN_ENCRYPTION_DEK_ASSIGN 0x19 201#define IOCTL_MN_ENCRYPTION_LUN_QUERY 0x1A 202#define IOCTL_MN_ENCRYPTION_KEK_LOAD_NVRAM 0x1B 203#define IOCTL_MN_ENCRYPTION_ERROR_QUERY 0x1C 204#define IOCTL_MN_ENCRYPTION_DEK_TABLE_INIT 0x1D 205#define IOCTL_MN_ENCRYPT_LUN_VERIFY 0x1E 206#define IOCTL_MN_ENCRYPT_OPERATOR_MGMT 0x1F 207#define IOCTL_MN_ENCRYPT_SET_DEK_CONFIG_PAGE 0x21 208#define IOCTL_MN_ENCRYPT_SET_CONTROL_PAGE 0x22 209#define IOCTL_MN_ENCRYPT_SET_OPERATOR_CMD 0x23 210#define IOCTL_MN_ENCRYPT_TEST_EXECUTE 0x24 211#define IOCTL_MN_ENCRYPT_SET_HMAC_CONFIG_PAGE 0x25 212#define IOCTL_MN_ENCRYPT_GET_OPERATOR_CMD 0x26 213#define IOCTL_MN_ENCRYPT_RESCAN 0x27 214#ifdef SOFT_RESET_TEST 215#define IOCTL_MN_SOFT_RESET 0x28 216#endif 217/* SPCv configuration pages */ 218#define IOCTL_MN_MODE_SENSE 0x30 219#define IOCTL_MN_MODE_SELECT 0x31 220 221#define IOCTL_MN_TISA_TEST_ENCRYPT_DEK_DUMP 0x51 222 223#define IOCTL_MN_FW_GET_EVENT_FLASH_LOG1 0x5A 224#define IOCTL_MN_FW_GET_EVENT_FLASH_LOG2 0x6A 225#define IOCTL_MN_GET_EVENT_LOG1 0x5B 226#define IOCTL_MN_GET_EVENT_LOG2 0x6B 227 228#define IOCTL_MN_GPIO_PINSETUP 0x01 229#define IOCTL_MN_GPIO_EVENTSETUP 0x02 230#define IOCTL_MN_GPIO_READ 0x03 231#define IOCTL_MN_GPIO_WRITE 0x04 232 233#define IOCTL_MN_TMF_DEVICE_RESET 0x6F 234#define IOCTL_MN_TMF_LUN_RESET 0x70 235typedef struct tdFWControl 236{ 237 bit32 retcode; /* ret code (status) = (bit32)oscmCtrlEvnt_e */ 238 bit32 phase; /* ret code phase = (bit32)agcmCtrlFwPhase_e */ 239 bit32 phaseCmplt; /* percent complete for the current update phase */ 240 bit32 version; /* Hex encoded firmware version number */ 241 bit32 offset; /* Used for downloading firmware */ 242 bit32 len; /* len of buffer */ 243 bit32 size; /* Used in OS VPD and Trace get size operations. */ 244 bit32 reserved; /* padding required for 64 bit alignment */ 245 bit8 buffer[1]; /* Start of buffer */ 246} tdFWControl_t; 247 248 249typedef struct tdFWControlEx 250{ 251 tdFWControl_t *tdFWControl; 252 bit8 *buffer; // keep buffer pointer to be freed when the responce comes 253 bit8 *virtAddr; /* keep virtual address of the data */ 254 bit8 *usrAddr; /* keep virtual address of the user data */ 255 bit32 len; /* len of buffer */ 256 void *payload; /* pointer to IOCTL Payload */ 257 bit8 inProgress; /* if 1 - the IOCTL request is in progress */ 258 void *param1; 259 void *param2; 260 void *param3; 261} tdFWControlEx_t; 262 263/************************************************************/ 264//This flag and datastructure are specific for fw profiling, Now defined as 265// compiler flag 266//#define SPC_ENABLE_PROFILE 267 268#ifdef SPC_ENABLE_PROFILE 269typedef struct tdFWProfile 270{ 271 bit32 status; 272 bit32 tcid; 273 bit32 processor; /* processor name "iop/aap1" */ 274 bit32 cmd; /* cmd to fw */ 275 bit32 len; /* len of buffer */ 276 bit32 codeStartAdd; 277 bit32 codeEndAdd; 278 bit32 reserved; /* padding required for 64 bit alignment */ 279 bit8 buffer[1]; /* Start of buffer */ 280} tdFWProfile_t; 281 282/************************************************/ 283/**Definations for FW profile*/ 284#define FW_PROFILE_PROCESSOR_ID_IOP 0x00 285#define FW_PROFILE_PROCESSOR_ID_AAP1 0x02 286/* definitions for sub operation */ 287#define START_TIMER_PROFILE 0x01 288#define START_CODE_PROFILE 0x02 289#define STOP_TIMER_PROFILE 0x81 290#define STOP_CODE_PROFILE 0x82 291/************************************************/ 292 293typedef struct tdFWProfileEx 294{ 295 tdFWProfile_t *tdFWProfile; 296 bit8 *buffer; // keep buffer pointer to be freed when the responce comes 297 bit8 *virtAddr; /* keep virtual address of the data */ 298 bit8 *usrAddr; /* keep virtual address of the user data */ 299 bit32 len; /* len of buffer */ 300 void *payload; /* pointer to IOCTL Payload */ 301 bit8 inProgress; /* if 1 - the IOCTL request is in progress */ 302 void *param1; 303 void *param2; 304 void *param3; 305} tdFWProfileEx_t; 306#endif 307/************************************************************/ 308typedef struct tdVPDControl 309{ 310 bit32 retcode; /* ret code (status) */ 311 bit32 phase; /* ret code phase */ 312 bit32 phaseCmplt; /* percent complete for the current update phase */ 313 bit32 version; /* Hex encoded firmware version number */ 314 bit32 offset; /* Used for downloading firmware */ 315 bit32 len; /* len of buffer */ 316 bit32 size; /* Used in OS VPD and Trace get size operations. */ 317 bit8 deviceID; /* padding required for 64 bit alignment */ 318 bit8 reserved1; 319 bit16 reserved2; 320 bit32 signature; 321 bit8 buffer[1]; /* Start of buffer */ 322} tdVPDControl_t; 323 324typedef struct tdDeviceInfoIOCTL_s 325{ 326 bit8 deviceType; // TD_SATA_DEVICE or TD_SAS_DEVICE 327 bit8 linkRate; // 0x08: 1.5 Gbit/s; 0x09: 3.0; 0x0A: 6.0 Gbit/s. 328 bit8 phyId; 329 bit8 reserved; 330 bit32 sasAddressHi; // SAS address high 331 bit32 sasAddressLo; // SAS address low 332 bit32 up_sasAddressHi; // upstream SAS address high 333 bit32 up_sasAddressLo; // upstream SAS address low 334 bit32 ishost; 335 bit32 isEncryption; // is encryption enabled 336 bit32 isDIF; // is DIF enabled 337 unsigned long DeviceHandle; 338 bit32 host_num; 339 bit32 channel; 340 bit32 id; 341 bit32 lun; 342}tdDeviceInfoIOCTL_t; 343 344/* Payload of IOCTL dump device list at OS layer */ 345typedef struct tdDeviceInfoPayload_s 346{ 347 bit32 PathId; 348 bit32 TargetId; 349 bit32 Lun; 350 bit32 Reserved; /* Had better aligned to 64-bit. */ 351 352 /* output */ 353 tdDeviceInfoIOCTL_t devInfo; 354}tdDeviceInfoPayload_t; 355 356typedef struct tdDeviceListPayload_s 357{ 358 bit32 realDeviceCount;// the real device out in the array, returned by driver 359 bit32 deviceLength; // the length of tdDeviceInfoIOCTL_t array 360 bit8 pDeviceInfo[1]; // point to tdDeviceInfoIOCTL_t array 361}tdDeviceListPayload_t; 362 363// Payload of IO error and event statistic IOCTL. 364typedef struct tdIoErrorEventStatisticIOCTL_s 365{ 366 bit32 agOSSA_IO_COMPLETED_ERROR_SCSI_STATUS; 367 bit32 agOSSA_IO_ABORTED; 368 bit32 agOSSA_IO_OVERFLOW; 369 bit32 agOSSA_IO_UNDERFLOW; 370 bit32 agOSSA_IO_FAILED; 371 bit32 agOSSA_IO_ABORT_RESET; 372 bit32 agOSSA_IO_NOT_VALID; 373 bit32 agOSSA_IO_NO_DEVICE; 374 bit32 agOSSA_IO_ILLEGAL_PARAMETER; 375 bit32 agOSSA_IO_LINK_FAILURE; 376 bit32 agOSSA_IO_PROG_ERROR; 377 bit32 agOSSA_IO_DIF_IN_ERROR; 378 bit32 agOSSA_IO_DIF_OUT_ERROR; 379 bit32 agOSSA_IO_ERROR_HW_TIMEOUT; 380 bit32 agOSSA_IO_XFER_ERROR_BREAK; 381 bit32 agOSSA_IO_XFER_ERROR_PHY_NOT_READY; 382 bit32 agOSSA_IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED; 383 bit32 agOSSA_IO_OPEN_CNX_ERROR_ZONE_VIOLATION; 384 bit32 agOSSA_IO_OPEN_CNX_ERROR_BREAK; 385 bit32 agOSSA_IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS; 386 bit32 agOSSA_IO_OPEN_CNX_ERROR_BAD_DESTINATION; 387 bit32 agOSSA_IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED; 388 bit32 agOSSA_IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY; 389 bit32 agOSSA_IO_OPEN_CNX_ERROR_WRONG_DESTINATION; 390 bit32 agOSSA_IO_OPEN_CNX_ERROR_UNKNOWN_ERROR; 391 bit32 agOSSA_IO_XFER_ERROR_NAK_RECEIVED; 392 bit32 agOSSA_IO_XFER_ERROR_ACK_NAK_TIMEOUT; 393 bit32 agOSSA_IO_XFER_ERROR_PEER_ABORTED; 394 bit32 agOSSA_IO_XFER_ERROR_RX_FRAME; 395 bit32 agOSSA_IO_XFER_ERROR_DMA; 396 bit32 agOSSA_IO_XFER_ERROR_CREDIT_TIMEOUT; 397 bit32 agOSSA_IO_XFER_ERROR_SATA_LINK_TIMEOUT; 398 bit32 agOSSA_IO_XFER_ERROR_SATA; 399 bit32 agOSSA_IO_XFER_ERROR_ABORTED_DUE_TO_SRST; 400 bit32 agOSSA_IO_XFER_ERROR_REJECTED_NCQ_MODE; 401 bit32 agOSSA_IO_XFER_ERROR_ABORTED_NCQ_MODE; 402 bit32 agOSSA_IO_XFER_OPEN_RETRY_TIMEOUT; 403 bit32 agOSSA_IO_XFER_SMP_RESP_CONNECTION_ERROR; 404 bit32 agOSSA_IO_XFER_ERROR_UNEXPECTED_PHASE; 405 bit32 agOSSA_IO_XFER_ERROR_XFER_RDY_OVERRUN; 406 bit32 agOSSA_IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED; 407 bit32 agOSSA_IO_XFER_ERROR_CMD_ISSUE_ACK_NAK_TIMEOUT; 408 bit32 agOSSA_IO_XFER_ERROR_CMD_ISSUE_BREAK_BEFORE_ACK_NAK; 409 bit32 agOSSA_IO_XFER_ERROR_CMD_ISSUE_PHY_DOWN_BEFORE_ACK_NAK; 410 bit32 agOSSA_IO_XFER_ERROR_OFFSET_MISMATCH; 411 bit32 agOSSA_IO_XFER_ERROR_XFER_ZERO_DATA_LEN; 412 bit32 agOSSA_IO_XFER_CMD_FRAME_ISSUED; 413 bit32 agOSSA_IO_ERROR_INTERNAL_SMP_RESOURCE; 414 bit32 agOSSA_IO_PORT_IN_RESET; 415 bit32 agOSSA_IO_DS_NON_OPERATIONAL; 416 bit32 agOSSA_IO_DS_IN_RECOVERY; 417 bit32 agOSSA_IO_TM_TAG_NOT_FOUND; 418 bit32 agOSSA_IO_XFER_PIO_SETUP_ERROR; 419 bit32 agOSSA_IO_SSP_EXT_IU_ZERO_LEN_ERROR; 420 bit32 agOSSA_IO_DS_IN_ERROR; 421 bit32 agOSSA_IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY; 422 bit32 agOSSA_IO_ABORT_IN_PROGRESS; 423 bit32 agOSSA_IO_ABORT_DELAYED; 424 bit32 agOSSA_IO_INVALID_LENGTH; 425 bit32 agOSSA_IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY_ALT; 426 bit32 agOSSA_IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED; 427 bit32 agOSSA_IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO; 428 bit32 agOSSA_IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST; 429 bit32 agOSSA_IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE; 430 bit32 agOSSA_IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED; 431 bit32 agOSSA_IO_DS_INVALID; 432 bit32 agOSSA_IO_XFER_READ_COMPL_ERR; 433 bit32 agOSSA_IO_XFER_ERR_LAST_PIO_DATAIN_CRC_ERR; 434 bit32 agOSSA_IO_XFR_ERROR_INTERNAL_CRC_ERROR; 435 bit32 agOSSA_MPI_IO_RQE_BUSY_FULL; 436 bit32 agOSSA_MPI_ERR_IO_RESOURCE_UNAVAILABLE; 437 bit32 agOSSA_MPI_ERR_ATAPI_DEVICE_BUSY; 438 bit32 agOSSA_IO_XFR_ERROR_DEK_KEY_CACHE_MISS; 439 bit32 agOSSA_IO_XFR_ERROR_DEK_KEY_TAG_MISMATCH; 440 bit32 agOSSA_IO_XFR_ERROR_CIPHER_MODE_INVALID; 441 bit32 agOSSA_IO_XFR_ERROR_DEK_IV_MISMATCH; 442 bit32 agOSSA_IO_XFR_ERROR_DEK_RAM_INTERFACE_ERROR; 443 bit32 agOSSA_IO_XFR_ERROR_INTERNAL_RAM; 444 bit32 agOSSA_IO_XFR_ERROR_DIF_MISMATCH; 445 bit32 agOSSA_IO_XFR_ERROR_DIF_APPLICATION_TAG_MISMATCH; 446 bit32 agOSSA_IO_XFR_ERROR_DIF_REFERENCE_TAG_MISMATCH; 447 bit32 agOSSA_IO_XFR_ERROR_DIF_CRC_MISMATCH; 448 bit32 agOSSA_IO_XFR_ERROR_INVALID_SSP_RSP_FRAME; 449 bit32 agOSSA_IO_XFER_ERR_EOB_DATA_OVERRUN; 450 bit32 agOSSA_IO_XFR_ERROR_DEK_INDEX_OUT_OF_BOUNDS; 451 bit32 agOSSA_IO_OPEN_CNX_ERROR_OPEN_PREEMPTED; 452 bit32 agOSSA_IO_XFR_ERROR_DEK_ILLEGAL_TABLE; 453 bit32 agOSSA_IO_XFER_ERROR_DIF_INTERNAL_ERROR; 454 bit32 agOSSA_MPI_ERR_OFFLOAD_DIF_OR_ENC_NOT_ENABLED; 455 bit32 agOSSA_IO_UNKNOWN_ERROR; 456 457} tdIoErrorEventStatisticIOCTL_t; 458 459/* 46001: soft error 46102: not ready 46203: medium error 46304: hardware error 46405: illegal request 46506: unit attention 4660b: abort command 467*/ 468typedef struct tdSenseKeyCount_s{ 469 bit32 SoftError; 470 bit32 MediumNotReady; 471 bit32 MediumError; 472 bit32 HardwareError; 473 bit32 IllegalRequest; 474 bit32 UnitAttention; 475 bit32 AbortCommand; 476 bit32 OtherKeyType; 477}tdSenseKeyCount_t; 478 479/* 480Code Status Command completed Service response 48100h GOOD Yes COMMAND COMPLETE 48202h CHECK CONDITION Yes COMMAND COMPLETE 48304h CONDITION MET Yes COMMAND COMPLETE 48408h BUSY Yes COMMAND COMPLETE 48510h Obsolete 48614h Obsolete 48718h RESERVATION CONFLICT Yes COMMAND COMPLETE 48822h Obsolete 48928h TASK SET FULL Yes COMMAND COMPLETE 49030h ACA ACTIVE Yes COMMAND COMPLETE 49140h TASK ABORTED Yes COMMAND COMPLETE 492*/ 493typedef struct tdSCSIStatusCount_s{ 494 bit32 GoodStatus; 495 bit32 CheckCondition; 496 bit32 ConditionMet; 497 bit32 BusyStatus; 498 bit32 ResvConflict; 499 bit32 TaskSetFull; 500 bit32 AcaActive; 501 bit32 TaskAborted; 502 bit32 ObsoleteStatus; 503}tdSCSIStatusCount_t; 504 505/* Payload of Io Error Statistic IOCTL. */ 506typedef struct tdIoErrorStatisticPayload_s 507{ 508 bit32 flag; 509 bit32 Reserved; /* Had better aligned to 64-bit. */ 510 511 /* output */ 512 tdIoErrorEventStatisticIOCTL_t IoError; 513 tdSCSIStatusCount_t ScsiStatusCounter; 514 tdSenseKeyCount_t SenseKeyCounter; 515} tdIoErrorStatisticPayload_t; 516 517/* Payload of Io Error Statistic IOCTL. */ 518typedef struct tdIoEventStatisticPayload_s 519{ 520 bit32 flag; 521 bit32 Reserved; /* Had better aligned to 64-bit. */ 522 523 /* output */ 524 tdIoErrorEventStatisticIOCTL_t IoEvent; 525} tdIoEventStatisticPayload_t; 526 527/* Payload of Register IOCTL. */ 528typedef struct tdRegisterPayload_s 529{ 530 bit32 flag; 531 bit32 busNum; 532 bit32 RegAddr; /* Register address */ 533 bit32 RegValue; /* Register value */ 534 535} tdRegisterPayload_t; 536 537 538#define FORENSIC_DATA_TYPE_GSM_SPACE 1 539#define FORENSIC_DATA_TYPE_QUEUE 2 540#define FORENSIC_DATA_TYPE_FATAL 3 541#define FORENSIC_DATA_TYPE_NON_FATAL 4 542#define FORENSIC_DATA_TYPE_IB_QUEUE 5 543#define FORENSIC_DATA_TYPE_OB_QUEUE 6 544#define FORENSIC_DATA_TYPE_CHECK_FATAL 0x70 545 546#define FORENSIC_Q_TYPE_INBOUND 1 547#define FORENSIC_Q_TYPE_OUTBOUND 2 548 549/* get forensic data IOCTL payload */ 550typedef struct tdForensicDataPayload_s 551{ 552 bit32 DataType; 553 union 554 { 555 struct 556 { 557 bit32 directLen; 558 bit32 directOffset; 559 bit32 readLen; 560 bit8 directData[1]; 561 } gsmBuffer; 562 563 struct 564 { 565 bit16 queueType; 566 bit16 queueIndex; 567 bit32 directLen; 568 bit8 directData[1]; 569 } queueBuffer; 570 571 struct 572 { 573 bit32 directLen; 574 bit32 directOffset; 575 bit32 readLen; 576 bit8 directData[1]; 577 } dataBuffer; 578 }; 579}tdForensicDataPayload_t; 580 581typedef struct tdBistPayload_s 582{ 583 bit32 testType; 584 bit32 testLength; 585 bit32 testData[29]; 586}tdBistPayload_t; 587 588typedef struct _TSTMTID_CARD_LOCATION_INFO 589{ 590 bit32 CardNo; 591 bit32 Bus; 592 bit32 Slot; 593 bit32 Device; 594 bit32 Function; 595 bit32 IOLower; 596 bit32 IO_Upper; 597 bit32 VidDid; 598 bit32 PhyMem; 599 bit32 Flag; 600 601} TSTMTID_CARD_LOCATION_INFO; 602 603typedef struct _TSTMTID_TRACE_BUFFER_INFO 604{ 605 bit32 CardNo; 606 bit32 TraceCompiled; 607 bit32 BufferSize; 608 bit32 CurrentIndex; 609 bit32 TraceWrap; 610 bit32 CurrentTraceIndexWrapCount; 611 bit32 TraceMask; 612 bit32 Flag; 613 614} TSTMTID_TRACE_BUFFER_INFO; 615 616#define FetchBufferSIZE 32 617#define LowFence32Bits 0xFCFD1234 618#define HighFence32Bits 0x5678ABDC 619 620typedef struct _TSTMTID_TRACE_BUFFER_FETCH 621{ 622 bit32 CardNo; 623 bit32 BufferOffsetBegin; 624 bit32 LowFence; 625 bit8 Data[FetchBufferSIZE]; 626 bit32 HighFence; 627 bit32 Flag; 628 629} TSTMTID_TRACE_BUFFER_FETCH; 630 631 632typedef struct _TSTMTID_TRACE_BUFFER_RESET 633{ 634 bit32 CardNo; 635 bit32 Reset; 636 bit32 TraceMask; 637 bit32 Flag; 638 639} TSTMTID_TRACE_BUFFER_RESET; 640 641 642 643typedef struct tdPhyCount_s{ 644 bit32 Phy; 645 bit32 BW_tx; 646 bit32 BW_rx; 647 bit32 InvalidDword; 648 bit32 runningDisparityError; 649 bit32 codeViolation; 650 bit32 LossOfSyncDW; 651 bit32 phyResetProblem; 652 bit32 inboundCRCError; 653}tdPhyCount_t; 654 655 656typedef struct _PHY_GENERAL_STATE 657{ 658 bit32 Dword0; 659 bit32 Dword1; 660 661}GetPhyGenState_t; 662typedef struct agsaPhyGeneralState_s 663{ 664 GetPhyGenState_t PhyGenData[16]; 665 bit32 Reserved1; 666 bit32 Reserved2; 667} agsaPhyGeneralState_t; 668 669typedef struct _PHY_DETAILS_ 670{ 671 bit8 sasAddressLo[4]; 672 bit8 sasAddressHi[4]; 673 bit8 attached_sasAddressLo[4]; 674 bit8 attached_sasAddressHi[4]; 675 bit8 attached_phy; 676 bit8 attached_dev_type ; 677}PhyDetails_t; 678 679enum SAS_SATA_DEVICE_TYPE { 680 SAS_PHY_NO_DEVICE , 681 SAS_PHY_END_DEVICE, 682 SAS_PHY_EXPANDER_DEVICE, 683 SAS_PHY_SATA_DEVICE = 0x11, 684}; 685#define PHY_SETTINGS_LEN 1024 686 687#endif /* TD_IOCTL_H */ 688