titypes.h revision 285809
1/*******************************************************************************
2*Copyright (c) 2014 PMC-Sierra, Inc.  All rights reserved.
3*
4*Redistribution and use in source and binary forms, with or without modification, are permitted provided
5*that the following conditions are met:
6*1. Redistributions of source code must retain the above copyright notice, this list of conditions and the
7*following disclaimer.
8*2. Redistributions in binary form must reproduce the above copyright notice,
9*this list of conditions and the following disclaimer in the documentation and/or other materials provided
10*with the distribution.
11*
12*THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED
13*WARRANTIES,INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
14*FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
15*FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16*NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
17*BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
18*LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
19*SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
20*
21* $FreeBSD$
22*
23********************************************************************************/
24/********************************************************************************
25**
26** Version Control Information:
27**
28**
29*******************************************************************************/
30/********************************************************************************
31**
32**   titypes.h
33**
34**   Abstract:   This module contains data structure definition used
35**               by the Transport Independent API (TIAPI) Layer.
36**
37********************************************************************************/
38
39#include <dev/pms/RefTisa/tisa/api/tidefs.h>
40
41#ifndef TITYPES_H
42#define TITYPES_H
43
44/*****************************************************************************
45 * SHARED TYPES
46 *****************************************************************************/
47
48typedef struct tiPortalContext
49{
50  void    *osData;
51  void    *tdData;
52} tiPortalContext_t;
53
54typedef struct tiDeviceHandle
55{
56  void    *osData;
57  void    *tdData;
58} tiDeviceHandle_t;
59
60typedef struct tiRoot
61{
62  void    *osData;
63  void    *tdData;
64} tiRoot_t;
65
66typedef struct tiMem
67{
68  void    *virtPtr;
69  void    *osHandle;
70  bit32   physAddrUpper;
71  bit32   physAddrLower;
72  bit32   totalLength;
73  bit32   numElements;
74  bit32   singleElementLength;
75  bit32   alignment;
76  bit32   type;
77  bit32   reserved;
78} tiMem_t;
79
80typedef struct tiLoLevelMem
81{
82  bit32       count;
83  tiMem_t     mem[MAX_LL_LAYER_MEM_DESCRIPTORS];
84} tiLoLevelMem_t;
85
86typedef struct tiLoLevelOption
87{
88  bit32       usecsPerTick;
89  bit32       numOfQueuesPerPort;
90  bit32       mutexLockUsage;
91  bit32       pciFunctionNumber;
92  bit32       maxPortContext;
93  bit32       maxNumOSLocks;
94  agBOOLEAN   encryption;
95  bit32       maxInterruptVectors;
96  bit32       flag;
97  bit32       max_MSI_InterruptVectors;
98#ifdef SA_ENABLE_PCI_TRIGGER
99  bit32       PCI_trigger;
100#endif /* SA_ENABLE_PCI_TRIGGER */
101
102} tiLoLevelOption_t;
103
104typedef struct tiLoLevelResource
105{
106  tiLoLevelOption_t   loLevelOption;
107  tiLoLevelMem_t      loLevelMem;
108} tiLoLevelResource_t;
109
110typedef struct tiTdSharedMem
111{
112  tiMem_t     tdSharedCachedMem1;
113} tiTdSharedMem_t;
114
115typedef struct tiIORequest
116{
117  void    *osData;
118  void    *tdData;
119} tiIORequest_t;
120
121typedef struct tiSgl_s
122{
123  bit32   lower;
124  bit32   upper;
125  bit32   len;
126  bit32   type;
127} tiSgl_t;
128
129typedef struct tiSenseData
130{
131  void    *senseData;
132  bit8    senseLen;
133} tiSenseData_t;
134
135typedef struct tiIOCTLPayload
136{
137  bit32       Signature;
138  bit16       MajorFunction;
139  bit16       MinorFunction;
140  bit16       Length;
141  bit16       Status;
142  bit32       Reserved; /* required for 64 bit alignment */
143  bit8        FunctionSpecificArea[1];
144}tiIOCTLPayload_t;
145
146
147typedef struct tiIOCTLPayload_wwn
148{
149  bit32       Signature;
150  bit16       MajorFunction;
151  bit16       MinorFunction;
152  bit16       Length;
153  bit16       Status;
154  bit32       Reserved; /* required for 64 bit alignment */
155  bit8        FunctionSpecificArea[8];
156}tiIOCTLPayload_wwn_t;
157
158typedef struct tiPortInfo
159{
160  char  *name;
161  char  *address;
162  char  *localName;
163  char  *remoteName;
164  bit32 localNameLen;
165  bit32 remoteNameLen;
166} tiPortInfo_t;
167
168typedef struct tiDif_s
169{
170  agBOOLEAN   enableDIFPerLA;
171  bit32       flags;
172  bit16       initialIOSeed;
173  bit16       reserved;
174  bit32       DIFPerLAAddrLo;
175  bit32       DIFPerLAAddrHi;
176  bit16       DIFPerLARegion0SecCount;
177  bit16       DIFPerLANumOfRegions;
178  bit8        udtArray[DIF_UDT_SIZE];
179  bit8        udtrArray[DIF_UDT_SIZE];
180} tiDif_t;
181
182#define DIF_INSERT                  0
183#define DIF_VERIFY_FORWARD          1
184#define DIF_VERIFY_DELETE           2
185#define DIF_VERIFY_REPLACE          3
186#define DIF_VERIFY_UDT_REPLACE_CRC  5
187#define DIF_REPLACE_UDT_REPLACE_CRC 7
188
189#define DIF_BLOCK_SIZE_512          0x00
190#define DIF_BLOCK_SIZE_520          0x01
191#define DIF_BLOCK_SIZE_4096         0x02
192#define DIF_BLOCK_SIZE_4160         0x03
193
194#define DIF_ACTION_FLAG_MASK        0x00000007 /* 0 - 2 */
195#define DIF_CRC_VERIFICATION        0x00000008 /* 3 */
196#define DIF_CRC_INVERSION           0x00000010 /* 4 */
197#define DIF_CRC_IO_SEED             0x00000020 /* 5 */
198#define DIF_UDT_REF_BLOCK_COUNT     0x00000040 /* 6 */
199#define DIF_UDT_APP_BLOCK_COUNT     0x00000080 /* 7 */
200#define DIF_UDTR_REF_BLOCK_COUNT    0x00000100 /* 8 */
201#define DIF_UDTR_APP_BLOCK_COUNT    0x00000200 /* 9 */
202#define DIF_CUST_APP_TAG            0x00000C00 /* 10 - 11 */
203#define DIF_FLAG_RESERVED           0x0000F000 /* 12 - 15 */
204#define DIF_DATA_BLOCK_SIZE_MASK    0x000F0000 /* 16 - 19 */
205#define DIF_DATA_BLOCK_SIZE_SHIFT   16
206#define DIF_TAG_VERIFY_MASK         0x03F00000 /* 20 - 25 */
207#define DIF_TAG_UPDATE_MASK         0xFC000000 /* 26 - 31 */
208
209
210#define NORMAL_BLOCK_SIZE_512       512
211#define NORMAL_BLOCK_SIZE_4K        4096
212
213#define DIF_PHY_BLOCK_SIZE_512      512
214#define DIF_PHY_BLOCK_SIZE_520      520
215#define DIF_PHY_BLOCK_SIZE_4096     4096
216#define DIF_PHY_BLOCK_SIZE_4160     4160
217
218#define DIF_LOGIC_BLOCK_SIZE_520    520
219#define DIF_LOGIC_BLOCK_SIZE_528    528
220#define DIF_LOGIC_BLOCK_SIZE_4104   4104
221#define DIF_LOGIC_BLOCK_SIZE_4168   4168
222
223
224
225
226typedef struct tiDetailedDeviceInfo
227{
228  bit8    devType_S_Rate;
229    /* Bit 6-7: reserved
230       Bit 4-5: Two bits flag to specify a SAS or SATA (STP) device:
231                00: SATA or STP device
232                01: SSP or SMP device
233                10: Direct SATA device
234       Bit 0-3: Connection Rate field when opening the device.
235                Code Description:
236        00h:  Device has not been registered
237                08h:  1,5 Gbps
238                09h:  3,0 Gbps
239                0ah:  6.0 Gbps
240                All others Reserved
241    */
242  bit8    reserved1;
243  bit16   reserved2;
244} tiDetailedDeviceInfo_t;
245
246typedef struct tiDeviceInfo
247{
248  char                   *localName;
249  char                   *localAddress;
250  char                   *remoteName;
251  char                   *remoteAddress;
252  bit16                  osAddress1;
253  bit16                  osAddress2;
254  bit32                  loginState;
255  tiDetailedDeviceInfo_t info;
256} tiDeviceInfo_t;
257
258
259#define KEK_BLOB_SIZE           48
260#define KEK_AUTH_SIZE           40
261#define KEK_MAX_TABLE_ENTRIES   8
262
263#define DEK_MAX_TABLES          2
264#define DEK_MAX_TABLE_ENTRIES   (1024*4)
265
266#define DEK_BLOB_SIZE_07        72
267#define DEK_BLOB_SIZE_08        80
268
269#define OPERATOR_ROLE_ID_SIZE   1024
270
271#define HMAC_SECRET_KEY_SIZE    72
272
273typedef struct tiEncryptKekBlob
274{
275  bit8    kekBlob[KEK_BLOB_SIZE];
276} tiEncryptKekBlob_t;
277
278typedef struct tiEncryptDekBlob
279{
280  bit8    dekBlob[DEK_BLOB_SIZE_08];
281} tiEncryptDekBlob_t;
282
283typedef struct DEK_Table_s {
284  tiEncryptDekBlob_t  Dek[DEK_MAX_TABLE_ENTRIES];
285}tiDEK_Table_t;
286
287typedef struct DEK_Tables_s {
288  tiDEK_Table_t  DekTable[DEK_MAX_TABLES];
289} tiDEK_Tables_t;
290
291/*sTSDK  4.38  */
292#define OPR_MGMT_ID_STRING_SIZE 31
293
294typedef struct tiID_s {
295   bit8   ID[OPR_MGMT_ID_STRING_SIZE];
296} tiID_t;
297
298typedef struct tiEncryptInfo
299{
300  bit32   securityCipherMode;
301  bit32   status;
302  bit32   sectorSize[6];
303} tiEncryptInfo_t;
304
305typedef struct tiEncryptPort
306{
307  bit32   encryptEvent;
308  bit32   subEvent;
309  void    *pData;
310} tiEncryptPort_t;
311
312typedef struct tiEncryptDek
313{
314  bit32    dekTable;
315  bit32    dekIndex;
316} tiEncryptDek_t;
317
318typedef struct tiEncrypt
319{
320    tiEncryptDek_t dekInfo;
321    bit32          kekIndex;
322    agBOOLEAN      keyTagCheck;
323    agBOOLEAN      enableEncryptionPerLA;
324    bit32          sectorSizeIndex;
325    bit32          encryptMode;
326    bit32          keyTag_W0;
327    bit32          keyTag_W1;
328    bit32          tweakVal_W0;
329    bit32          tweakVal_W1;
330    bit32          tweakVal_W2;
331    bit32          tweakVal_W3;
332    bit32          EncryptionPerLAAddrLo;
333    bit32          EncryptionPerLAAddrHi;
334    bit16          EncryptionPerLRegion0SecCount;
335    bit16          reserved;
336} tiEncrypt_t;
337
338typedef struct tiHWEventMode_s
339{
340    bit32          modePageOperation;
341    bit32          status;
342    bit32          modePageLen;
343    void           *modePage;
344    void           *context;
345} tiHWEventMode_t;
346
347/*****************************************************************************
348 * INITIATOR TYPES
349 *****************************************************************************/
350
351typedef struct tiInitiatorMem
352{
353  bit32       count;
354  tiMem_t     tdCachedMem[6];
355} tiInitiatorMem_t;
356
357typedef struct tiInitiatorOption
358{
359  bit32       usecsPerTick;
360  bit32       pageSize;
361  tiMem_t     dynamicDmaMem;
362  tiMem_t     dynamicCachedMem;
363  bit32       ioRequestBodySize;
364} tiInitiatorOption_t;
365
366
367typedef struct tiInitiatorResource
368{
369  tiInitiatorOption_t     initiatorOption;
370  tiInitiatorMem_t        initiatorMem;
371} tiInitiatorResource_t;
372
373typedef struct tiLUN
374{
375  bit8    lun[8];
376} tiLUN_t;
377
378typedef struct tiIniScsiCmnd
379{
380  tiLUN_t     lun;
381  bit32       expDataLength;
382  bit32       taskAttribute;
383  bit32       crn;
384  bit8        cdb[16];
385} tiIniScsiCmnd_t;
386
387typedef struct tiScsiInitiatorRequest
388{
389  void                *sglVirtualAddr;
390  tiIniScsiCmnd_t     scsiCmnd;
391  tiSgl_t             agSgl1;
392  tiDataDirection_t   dataDirection;
393} tiScsiInitiatorRequest_t;
394
395/* This is the standard request body for I/O that requires DIF or encryption. */
396typedef struct tiSuperScsiInitiatorRequest
397{
398  void                *sglVirtualAddr;
399  tiIniScsiCmnd_t     scsiCmnd;
400  tiSgl_t             agSgl1;
401  tiDataDirection_t   dataDirection;
402  bit32               flags;
403#ifdef CCBUILD_INDIRECT_CDB
404  bit32               IndCDBLowAddr;       /* The low physical address of indirect CDB buffer in host memory */
405  bit32               IndCDBHighAddr;      /* The high physical address of indirect CDB buffer in host memory */
406  bit32               IndCDBLength;        /* Indirect CDB length */
407  void                *IndCDBBuffer;       /* Indirect SSPIU buffer */
408#endif
409  tiDif_t             Dif;
410  tiEncrypt_t         Encrypt;
411} tiSuperScsiInitiatorRequest_t;
412
413typedef struct tiSMPFrame
414{
415  void        *outFrameBuf;
416  bit32       outFrameAddrUpper32;
417  bit32       outFrameAddrLower32;
418  bit32       outFrameLen;
419  bit32       inFrameAddrUpper32;
420  bit32       inFrameAddrLower32;
421  bit32       inFrameLen;
422  bit32       expectedRespLen;
423  bit32       flag;
424} tiSMPFrame_t;
425typedef struct tiEVTData
426{
427  bit32   SequenceNo;
428  bit32   TimeStamp;
429  bit32   Source;
430  bit32   Code;
431  bit8    Reserved;
432  bit8    BinaryDataLength;
433  bit8    DataAndMessage[EVENTLOG_MAX_MSG_LEN];
434} tiEVTData_t;
435
436typedef bit32 (*IsrHandler_t)(
437                        tiRoot_t    *tiRoot,
438                        bit32       channelNum
439                        );
440typedef void (*DeferedHandler_t)(
441                        tiRoot_t    *tiRoot,
442                        bit32       channelNum,
443                        bit32       count,
444                        bit32       context
445                        );
446
447/*****************************************************************************
448 * TARGET TYPES
449 *****************************************************************************/
450
451typedef struct tiTargetMem {
452  bit32     count;
453  tiMem_t   tdMem[10];
454} tiTargetMem_t;
455
456typedef struct tiTargetOption {
457  bit32     usecsPerTick;
458  bit32     pageSize;
459  bit32     numLgns;
460  bit32     numSessions;
461  bit32     numXchgs;
462  tiMem_t   dynamicDmaMem;
463  tiMem_t   dynamicCachedMem;
464} tiTargetOption_t;
465
466typedef struct
467{
468  tiTargetOption_t     targetOption;
469  tiTargetMem_t        targetMem;
470} tiTargetResource_t;
471
472typedef struct
473{
474  bit8      *reqCDB;
475  bit8      *scsiLun;
476  bit32     taskAttribute;
477  bit32     taskId;
478  bit32     crn;
479} tiTargetScsiCmnd_t;
480
481typedef struct tiSuperScsiTargetRequest
482{
483  bit32               flags;
484  tiDif_t             Dif;
485  tiEncrypt_t         Encrypt;
486  tiSgl_t             agSgl;
487  void                *sglVirtualAddr;
488  tiSgl_t             agSglMirror;
489  void                *sglVirtualAddrMirror;
490  bit32               Offset;
491  bit32               DataLength;
492} tiSuperScsiTargetRequest_t;
493
494/* SPCv controller mode page definitions */
495typedef struct tiEncryptGeneralPage_s {
496  bit32             pageCode;           /* 0x20 */
497  bit32             numberOfDeks;
498} tiEncryptGeneralPage_t;
499
500#define TD_ENC_CONFIG_PAGE_KEK_NUMBER 0x0000FF00
501#define TD_ENC_CONFIG_PAGE_KEK_SHIFT  8
502
503typedef struct tiEncryptDekConfigPage
504{
505  bit32 pageCode;                      /* 0x21 */
506  bit32 table0AddrLo;
507  bit32 table0AddrHi;
508  bit32 table0Entries;
509  bit32 table0Config;
510  bit32 table1AddrLo;
511  bit32 table1AddrHi;
512  bit32 table1Entries;
513  bit32 table1Config;
514} tiEncryptDekConfigPage_t;
515
516#define TD_ENC_DEK_CONFIG_PAGE_DEK_TABLE_NUMBER 0xF0000000
517#define TD_ENC_DEK_CONFIG_PAGE_DEK_CACHE_WAYS   0x0F000000
518#define TD_ENC_DEK_CONFIG_PAGE_DPR              0x00000200
519#define TD_ENC_DEK_CONFIG_PAGE_DER              0x00000100
520#define TD_ENC_DEK_CONFIG_PAGE_DEK_CACHE_SHIFT  24
521#define TD_ENC_DEK_CONFIG_PAGE_DEK_TABLE_SHIFT  28
522#define TD_ENC_DEK_CONFIG_PAGE_DEK_HDP_SHIFT    8
523
524
525/* CCS (Current Crypto Services)  and NOPR (Number of Operators) are valid only in GET_CONTROLLER_CONFIG */
526/* NAR, CORCAP and USRCAP are valid only when AUT==1 */
527typedef struct tiEncryptControlParamPage_s {
528  bit32          PageCode;           /* 0x22 */
529  bit32          CORCAP;             /* Crypto Officer Role Capabilities */
530  bit32          USRCAP;             /* User Role Capabilities */
531  bit32          CCS;                /* Current Crypto Services */
532  bit32          NOPR;               /* Number of Operators */
533} tiEncryptControlParamPage_t;
534
535typedef struct tiEncryptHMACConfigPage_s
536{
537  bit32  PageCode;
538  bit32  CustomerTag;
539  bit32  KeyAddrLo;
540  bit32  KeyAddrHi;
541} tiEncryptHMACConfigPage_t;
542
543typedef struct tiInterruptConfigPage_s {
544   bit32  pageCode;                        /* 0x05 */
545   bit32  vectorMask;
546   bit32  reserved;
547   bit32  ICTC0;
548   bit32  ICTC1;
549   bit32  ICTC2;
550   bit32  ICTC3;
551   bit32  ICTC4;
552   bit32  ICTC5;
553   bit32  ICTC6;
554   bit32  ICTC7;
555} tiInterruptConfigPage_t;
556
557/* brief data structure for SAS protocol timer configuration page. */
558typedef struct  tiSASProtocolTimerConfigurationPage_s{
559  bit32 pageCode;                       /* 0x04 */
560  bit32 MST_MSI;
561  bit32 STP_SSP_MCT_TMO;
562  bit32 STP_FRM_TMO;
563  bit32 STP_IDLE_TMO;
564  bit32 OPNRJT_RTRY_INTVL;
565  bit32 Data_Cmd_OPNRJT_RTRY_TMO;
566  bit32 Data_Cmd_OPNRJT_RTRY_THR;
567} tiSASProtocolTimerConfigurationPage_t;
568
569/*sTSDK 4.19   */
570
571/* The command is for an operator to login to/logout from SPCve. */
572/* Only when all IOs are quiesced, can an operator logout. */
573typedef struct tiOperatorCommandSet_s {
574  bit32 OPRIDX_PIN_ACS;    /* Access type (ACS) [4 bits] */
575                          /* KEYopr pinned in the KEK RAM (PIN) [1 bit] */
576                          /* KEYopr Index in the KEK RAM (OPRIDX) [8 bits] */
577  bit8   cert[40];          /* Operator Certificate (CERT) [40 bytes] */
578  bit32 reserved[3];       /* reserved */
579} tiOperatorCommandSet_t;
580
581#define FIPS_SELFTEST_MAX_MSG_LEN       (128*1024)
582#define FIPS_SELFTEST_MAX_DIGEST_SIZE   64
583
584typedef struct tiEncryptSelfTestDescriptor_s {
585  bit32         AESNTC_AESPTC;       /* AES Negative/Positive Test Case Bit Map */
586  bit32         KWPNTC_PKWPPTC;      /* Key Wrap Negative/Positive Test Case Bit Map */
587  bit32         HMACNTC_HMACPTC;     /* HMAC Negative Test Case Bit Map */
588} tiEncryptSelfTestDescriptor_t;
589
590typedef struct  tiEncryptSelfTestResult_s{
591  bit32         AESNTCS_AESPTCS;       /* AES Negative/Positive Test Case Status */
592  bit32         KWPNTCS_PKWPPTCS;      /* Key Wrap Negative/Positive Test Case Status */
593  bit32         HMACNTCS_HMACPTCS;     /* HMAC Negative Test Case Status */
594} tiEncryptSelfTestResult_t;
595
596/*
597   Tell SPCve controller the underlying SHA algorithm, where to fetch the message,
598   the size of the message, where to store the digest, where to fetch the secret key and the size of the key.
599*/
600typedef struct tiEncryptHMACTestDescriptor_s
601{
602   bit32    Tlen_SHAAlgo;
603   bit32    MsgAddrLo;
604   bit32    MsgAddrHi;
605   bit32    MsgLen;
606   bit32    DigestAddrLo;
607   bit32    DigestAddrHi;
608   bit32    KeyAddrLo;
609   bit32    KeyAddrHi;
610   bit32    KeyLen;
611} tiEncryptHMACTestDescriptor_t;
612
613typedef struct tiEncryptHMACTestResult_s
614{
615  bit32  Tlen_SHAAlgo;
616   bit32    Reserved[12];
617} tiEncryptHMACTestResult_t;
618
619typedef struct tiEncryptSHATestDescriptor_s
620{
621   bit32    Dword0;
622   bit32    MsgAddrLo;
623   bit32    MsgAddrHi;
624   bit32    MsgLen;
625   bit32    DigestAddrLo;
626   bit32    DigestAddrHi;
627} tiEncryptSHATestDescriptor_t;
628
629typedef struct tiEncryptSHATestResult_s
630{
631   bit32    Dword0;
632   bit32    Dword[12];
633} tiEncryptSHATestResult_t;
634
635
636#endif  /* TITYPES_H */
637