sampidefs.h revision 285809
1139825Simp/******************************************************************************* 21549Srgrimes*Copyright (c) 2014 PMC-Sierra, Inc. All rights reserved. 31549Srgrimes* 4177342Salc*Redistribution and use in source and binary forms, with or without modification, are permitted provided 51541Srgrimes*that the following conditions are met: 61541Srgrimes*1. Redistributions of source code must retain the above copyright notice, this list of conditions and the 71541Srgrimes*following disclaimer. 81541Srgrimes*2. Redistributions in binary form must reproduce the above copyright notice, 91541Srgrimes*this list of conditions and the following disclaimer in the documentation and/or other materials provided 101541Srgrimes*with the distribution. 111541Srgrimes* 121541Srgrimes*THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED 131541Srgrimes*WARRANTIES,INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 141541Srgrimes*FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 151541Srgrimes*FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 161541Srgrimes*NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 171541Srgrimes*BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 181541Srgrimes*LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 191541Srgrimes*SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE 201541Srgrimes* 211541Srgrimes* $FreeBSD$ 221541Srgrimes* 231541Srgrimes********************************************************************************/ 241541Srgrimes/*******************************************************************************/ 251541Srgrimes/*! \file sampidefs.h 261541Srgrimes * \brief The file defines the constants used by SAS/SATA LL layer 271541Srgrimes * 281541Srgrimes */ 291541Srgrimes 301541Srgrimes/*******************************************************************************/ 311541Srgrimes 321541Srgrimes#ifndef __SAMPIDEFS_H__ 331549Srgrimes 341549Srgrimes#define __SAMPIDEFS_H__ 351549Srgrimes 36139825Simp/* for Request Opcode of IOMB */ 371541Srgrimes#define OPC_INB_ECHO 0x001 /* */ 381541Srgrimes 391541Srgrimes#define OPC_INB_PHYSTART 0x004 /* */ 401541Srgrimes#define OPC_INB_PHYSTOP 0x005 /* */ 415455Sdg#define OPC_INB_SSPINIIOSTART 0x006 /* */ 421541Srgrimes#define OPC_INB_SSPINITMSTART 0x007 /* */ 431541Srgrimes#define OPC_INB_SSPINIEXTIOSTART 0x008 /* V reserved */ 441541Srgrimes#define OPC_INB_DEV_HANDLE_ACCEPT 0x009 /* */ 451541Srgrimes#define OPC_INB_SSPTGTIOSTART 0x00a /* */ 461541Srgrimes#define OPC_INB_SSPTGTRSPSTART 0x00b /* */ 475455Sdg#define OPC_INB_SSP_ABORT 0x00f /* */ 485455Sdg#define OPC_INB_DEREG_DEV_HANDLE 0x010 /* 16 */ 495455Sdg#define OPC_INB_GET_DEV_HANDLE 0x011 /* 17 */ 501541Srgrimes#define OPC_INB_SMP_REQUEST 0x012 /* 18 */ 515455Sdg 521541Srgrimes#define OPC_INB_SMP_ABORT 0x014 /* 20 */ 531541Srgrimes 541541Srgrimes#define OPC_INB_SPC_REG_DEV 0x016 /* 22 V reserved */ 551541Srgrimes#define OPC_INB_SATA_HOST_OPSTART 0x017 /* 23 */ 561541Srgrimes#define OPC_INB_SATA_ABORT 0x018 /* 24 */ 571541Srgrimes#define OPC_INB_LOCAL_PHY_CONTROL 0x019 /* 25 */ 581541Srgrimes#define OPC_INB_SPC_GET_DEV_INFO 0x01a /* 26 V reserved */ 591541Srgrimes 601541Srgrimes#define OPC_INB_FW_FLASH_UPDATE 0x020 /* 32 */ 611541Srgrimes 621541Srgrimes#define OPC_INB_GPIO 0x022 /* 34 */ 631541Srgrimes#define OPC_INB_SAS_DIAG_MODE_START_END 0x023 /* 35 */ 6479263Sdillon#define OPC_INB_SAS_DIAG_EXECUTE 0x024 /* 36 */ 6579263Sdillon#define OPC_INB_SPC_SAS_HW_EVENT_ACK 0x025 /* 37 V reserved */ 66242941Salc#define OPC_INB_GET_TIME_STAMP 0x026 /* 38 */ 67254065Skib#define OPC_INB_PORT_CONTROL 0x027 /* 39 */ 6879263Sdillon#define OPC_INB_GET_NVMD_DATA 0x028 /* 40 */ 69242941Salc#define OPC_INB_SET_NVMD_DATA 0x029 /* 41 */ 70242941Salc#define OPC_INB_SET_DEVICE_STATE 0x02a /* 42 */ 71242941Salc#define OPC_INB_GET_DEVICE_STATE 0x02b /* 43 */ 72242941Salc#define OPC_INB_SET_DEV_INFO 0x02c /* 44 */ 73242941Salc#define OPC_INB_SAS_RE_INITIALIZE 0x02d /* 45 V reserved */ 74242941Salc#define OPC_INB_SGPIO 0x02e /* 46 */ 75248117Salc#define OPC_INB_PCIE_DIAG_EXECUTE 0x02f /* 47 */ 76225418Skib 7779263Sdillon#define OPC_INB_SET_CONTROLLER_CONFIG 0x030 /* 48 */ 7879263Sdillon#define OPC_INB_GET_CONTROLLER_CONFIG 0x031 /* 49 */ 7979263Sdillon 8079263Sdillon#define OPC_INB_REG_DEV 0x032 /* 50 SPCV */ 811541Srgrimes#define OPC_INB_SAS_HW_EVENT_ACK 0x033 /* 51 SPCV */ 821541Srgrimes#define OPC_INB_GET_DEV_INFO 0x034 /* 52 SPCV */ 831541Srgrimes#define OPC_INB_GET_PHY_PROFILE 0x035 /* 53 SPCV */ 84116226Sobrien#define OPC_INB_FLASH_OP_EXT 0x036 /* 54 SPCV */ 85116226Sobrien#define OPC_INB_SET_PHY_PROFILE 0x037 /* 55 SPCV */ 86116226Sobrien#define OPC_INB_GET_DFE_DATA 0x038 /* 56 SPCV */ 87174982Salc#define OPC_INB_GET_VHIST_CAP 0x039 /* 57 SPCV12g */ 88174982Salc 891541Srgrimes 901541Srgrimes#define OPC_INB_KEK_MANAGEMENT 0x100 /* 256 SPCV */ 9176166Smarkm#define OPC_INB_DEK_MANAGEMENT 0x101 /* 257 SPCV */ 92148985Sdes#define OPC_INB_SSP_DIF_ENC_OPSTART 0x102 /* 258 SPCV */ 93186719Skib#define OPC_INB_SATA_DIF_ENC_OPSTART 0x103 /* 259 SPCV */ 9476978Sjhb#define OPC_INB_OPR_MGMT 0x104 /* 260 SPCV */ 95251591Salc#define OPC_INB_ENC_TEST_EXECUTE 0x105 /* 261 SPCV */ 96208164Salc#define OPC_INB_SET_OPERATOR 0x106 /* 262 SPCV */ 9776827Salfred#define OPC_INB_GET_OPERATOR 0x107 /* 263 SPCV */ 981549Srgrimes#define OPC_INB_DIF_ENC_OFFLOAD_CMD 0x110 /* 272 SPCV */ 99248084Sattilio 100148985Sdes#define OPC_INB_FW_PROFILE 0x888 /* 2184 SPCV */ 10112662Sdg 10232071Sdyson/* for Response Opcode of IOMB */ 1031541Srgrimes#define OPC_OUB_ECHO 0x001 /* 1 */ 1041541Srgrimes 105207410Skmacy#define OPC_OUB_SPC_HW_EVENT 0x004 /* 4 V reserved Now OPC_OUB_HW_EVENT */ 10612662Sdg#define OPC_OUB_SSP_COMP 0x005 /* 5 */ 1077090Sbde#define OPC_OUB_SMP_COMP 0x006 /* 6 */ 10812662Sdg#define OPC_OUB_LOCAL_PHY_CNTRL 0x007 /* 7 */ 1091541Srgrimes 1101541Srgrimes#define OPC_OUB_SPC_DEV_REGIST 0x00a /* 10 V reserved Now OPC_OUB_DEV_REGIST */ 11142957Sdillon#define OPC_OUB_DEREG_DEV 0x00b /* 11 */ 112170816Salc#define OPC_OUB_GET_DEV_HANDLE 0x00c /* 12 */ 113248449Sattilio#define OPC_OUB_SATA_COMP 0x00d /* 13 */ 114174982Salc#define OPC_OUB_SATA_EVENT 0x00e /* 14 */ 11512662Sdg#define OPC_OUB_SSP_EVENT 0x00f /* 15 */ 11692654Sjeff 11792654Sjeff#define OPC_OUB_SPC_DEV_HANDLE_ARRIV 0x010 /* 16 V reserved Now OPC_OUB_DEV_HANDLE_ARRIV */ 1181541Srgrimes 119157908Speter#define OPC_OUB_SSP_RECV_EVENT 0x012 /* 18 */ 120157908Speter#define OPC_OUB_SPC_DEV_INFO 0x013 /* 19 V reserved Now OPC_OUB_DEV_INFO*/ 1211541Srgrimes#define OPC_OUB_FW_FLASH_UPDATE 0x014 /* 20 */ 1221541Srgrimes 1231541Srgrimes#define OPC_OUB_GPIO_RESPONSE 0x016 /* 22 */ 1241541Srgrimes#define OPC_OUB_GPIO_EVENT 0x017 /* 23 */ 1251541Srgrimes#define OPC_OUB_GENERAL_EVENT 0x018 /* 24 */ 126254065Skib 127242402Sattilio#define OPC_OUB_SSP_ABORT_RSP 0x01a /* 26 */ 12899416Salc#define OPC_OUB_SATA_ABORT_RSP 0x01b /* 27 */ 129242402Sattilio#define OPC_OUB_SAS_DIAG_MODE_START_END 0x01c /* 28 */ 130207410Skmacy#define OPC_OUB_SAS_DIAG_EXECUTE 0x01d /* 29 */ 131235356Skib#define OPC_OUB_GET_TIME_STAMP 0x01e /* 30 */ 132235356Skib#define OPC_OUB_SPC_SAS_HW_EVENT_ACK 0x01f /* 31 V reserved Now OPC_OUB_SAS_HW_EVENT_ACK*/ 133235356Skib#define OPC_OUB_PORT_CONTROL 0x020 /* 32 */ 134235356Skib#define OPC_OUB_SKIP_ENTRY 0x021 /* 33 */ 1351541Srgrimes#define OPC_OUB_SMP_ABORT_RSP 0x022 /* 34 */ 136148985Sdes#define OPC_OUB_GET_NVMD_DATA 0x023 /* 35 */ 137148985Sdes#define OPC_OUB_SET_NVMD_DATA 0x024 /* 36 */ 138148985Sdes#define OPC_OUB_DEVICE_HANDLE_REMOVAL 0x025 /* 37 */ 139148985Sdes#define OPC_OUB_SET_DEVICE_STATE 0x026 /* 38 */ 140148985Sdes#define OPC_OUB_GET_DEVICE_STATE 0x027 /* 39 */ 141235689Snwhitehorn#define OPC_OUB_SET_DEV_INFO 0x028 /* 40 */ 142217171Salc#define OPC_OUB_SAS_RE_INITIALIZE 0x029 /* 41 V reserved not replaced */ 143217171Salc 144217171Salc#define OPC_OUB_HW_EVENT 0x700 /* 1792 SPCV Was OPC_OUB_SPC_HW_EVENT*/ 145219476Salc#define OPC_OUB_DEV_HANDLE_ARRIV 0x720 /* 1824 SPCV Was OPC_OUB_SPC_DEV_HANDLE_ARRIV*/ 146219476Salc 147227568Salc#define OPC_OUB_PHY_START_RESPONSE 0x804 /* 2052 SPCV */ 148254141Sattilio#define OPC_OUB_PHY_STOP_RESPONSE 0x805 /* 2053 SPCV */ 149227102Skib#define OPC_OUB_SGPIO_RESPONSE 0x82E /* 2094 SPCV */ 150177342Salc#define OPC_OUB_PCIE_DIAG_EXECUTE 0x82F /* 2095 SPCV */ 151219476Salc 152254141Sattilio#define OPC_OUB_SET_CONTROLLER_CONFIG 0x830 /* 2096 SPCV */ 153250577Salc#define OPC_OUB_GET_CONTROLLER_CONFIG 0x831 /* 2097 SPCV */ 154254141Sattilio#define OPC_OUB_DEV_REGIST 0x832 /* 2098 SPCV */ 155254141Sattilio#define OPC_OUB_SAS_HW_EVENT_ACK 0x833 /* 2099 SPCV */ 156177342Salc#define OPC_OUB_DEV_INFO 0x834 /* 2100 SPCV */ 157219476Salc#define OPC_OUB_GET_PHY_PROFILE_RSP 0x835 /* 2101 SPCV */ 158219476Salc#define OPC_OUB_FLASH_OP_EXT_RSP 0x836 /* 2102 SPCV */ 159219476Salc#define OPC_OUB_SET_PHY_PROFILE_RSP 0x837 /* 2103 SPCV */ 160219476Salc#define OPC_OUB_GET_DFE_DATA_RSP 0x838 /* 2104 SPCV */ 161219476Salc#define OPC_OUB_GET_VIST_CAP_RSP 0x839 /* Can be 2104 for SPCV12g */ 162219476Salc 163219476Salc#define OPC_OUB_FW_PROFILE 0x888 /* 2184 */ 164219476Salc 165219476Salc#define OPC_OUB_KEK_MANAGEMENT 0x900 /* 2304 SPCV */ 166219476Salc#define OPC_OUB_DEK_MANAGEMENT 0x901 /* 2305 SPCV */ 167183389Semaste#define OPC_OUB_COMBINED_SSP_COMP 0x902 /* 2306 SPCV */ 168183389Semaste#define OPC_OUB_COMBINED_SATA_COMP 0x903 /* 2307 SPCV */ 169183389Semaste#define OPC_OUB_OPR_MGMT 0x904 /* 2308 SPCV */ 170183389Semaste#define OPC_OUB_ENC_TEST_EXECUTE 0x905 /* 2309 SPCV */ 171183389Semaste#define OPC_OUB_SET_OPERATOR 0x906 /* 2310 SPCV */ 172183389Semaste#define OPC_OUB_GET_OPERATOR 0x907 /* 2311 SPCV */ 173183389Semaste#define OPC_OUB_DIF_ENC_OFFLOAD_RSP 0x910 /* 2320 SPCV */ 1745455Sdg 175207410Skmacy/* Definitions for encryption key management */ 176207410Skmacy#define KEK_MGMT_SUBOP_INVALIDATE 0x1 177207410Skmacy#define KEK_MGMT_SUBOP_UPDATE 0x2 178207410Skmacy#define KEK_MGMT_SUBOP_KEYCARDINVALIDATE 0x3 179207410Skmacy#define KEK_MGMT_SUBOP_KEYCARDUPDATE 0x4 180207410Skmacy 181207410Skmacy#define DEK_MGMT_SUBOP_INVALIDATE 0x1 182207410Skmacy#define DEK_MGMT_SUBOP_UPDATE 0x2 183207410Skmacy 184207410Skmacy/*************************************************** 185207410Skmacy * typedef for IOMB structure 186207410Skmacy ***************************************************/ 187207410Skmacy/** \brief the data structure of Echo Command 188207410Skmacy * 189207410Skmacy * use to describe MPI Echo Command (64 bytes) 190207410Skmacy * 191207410Skmacy */ 192207410Skmacytypedef struct agsaEchoCmd_s { 193207410Skmacy bit32 tag; 194207410Skmacy bit32 payload[14]; 195207410Skmacy} agsaEchoCmd_t; 196217171Salc 197207410Skmacy/** \brief the data structure of PHY Start Command 198207410Skmacy * 199218773Salc * use to describe MPI PHY Start Command (64 bytes) 200207410Skmacy * 201207410Skmacy */ 202207410Skmacytypedef struct agsaPhyStartCmd_s { 2031541Srgrimes bit32 tag; 2041541Srgrimes bit32 SscdAseSHLmMlrPhyId; 2051541Srgrimes agsaSASIdentify_t sasIdentify; 2061541Srgrimes bit32 analogSetupIdx; 2071541Srgrimes bit32 SAWT_DAWT; 2081541Srgrimes bit32 reserved[5]; 2098876Srgrimes} agsaPhyStartCmd_t; 21079248Sdillon 2111541Srgrimes#define SPINHOLD_DISABLE (0x00 << 14) 212170170Sattilio#define SPINHOLD_ENABLE (0x01 << 14) 213170170Sattilio#define LINKMODE_SAS (0x01 << 12) 214170170Sattilio#define LINKMODE_DSATA (0x02 << 12) 2151541Srgrimes#define LINKMODE_AUTO (0x03 << 12) 2161541Srgrimes#define LINKRATE_15 (0x01 << 8) 2171541Srgrimes#define LINKRATE_30 (0x02 << 8) 2181541Srgrimes#define LINKRATE_60 (0x04 << 8) 219159880Sjhb#define LINKRATE_12 (0x08 << 8) 220159880Sjhb 221159880Sjhb/** \brief the data structure of PHY Stop Command 222159880Sjhb * 223159880Sjhb * use to describe MPI PHY Start Command (64 bytes) 224159880Sjhb * 225159880Sjhb */ 226159880Sjhbtypedef struct agsaPhyStopCmd_s { 227159880Sjhb bit32 tag; 228159880Sjhb bit32 phyId; 229159880Sjhb bit32 reserved[13]; 230159880Sjhb} agsaPhyStopCmd_t; 231159880Sjhb 232159880Sjhb/** \brief the data structure of SSP INI IO Start Command 233159880Sjhb * 234159880Sjhb * use to describe MPI SSP INI IO Start Command (64 bytes) 235159880Sjhb * 236159880Sjhb */ 237159880Sjhbtypedef struct agsaSSPIniIOStartCmd_s { 238159880Sjhb bit32 tag; 239159880Sjhb bit32 deviceId; 240159880Sjhb bit32 dataLen; 241159880Sjhb bit32 dirMTlr; 242159880Sjhb agsaSSPCmdInfoUnit_t SSPInfoUnit; 243159880Sjhb bit32 AddrLow0; 244159880Sjhb bit32 AddrHi0; 245159880Sjhb bit32 Len0; 246159880Sjhb bit32 E0; 247159880Sjhb} agsaSSPIniIOStartCmd_t; 248254065Skib 249254065Skib/** \brief the data structure of SSP INI TM Start Command 250254065Skib * 251254065Skib * use to describe MPI SSP INI TM Start Command (64 bytes) 252254065Skib * 253254065Skib */ 254254065Skibtypedef struct agsaSSPIniTMStartCmd_s { 255254065Skib bit32 tag; 256301833Sngie bit32 deviceId; 257254065Skib bit32 relatedTag; 258254065Skib bit32 TMfunction; 259254065Skib bit8 lun[8]; 260301833Sngie bit32 dsAdsMReport; 261254065Skib bit32 reserved[8]; 262254065Skib} agsaSSPIniTMStartCmd_t; 263254065Skib 264254065Skib/** \brief the data structure of SSP INI Extended IO Start Command 265254065Skib * 266254065Skib * use to describe MPI SSP INI Extended CDB Start Command (96 bytes to support 32 CDB) 267254065Skib * 268254065Skib */ 269254065Skibtypedef struct agsaSSPIniExtIOStartCmd_s { 270254065Skib bit32 tag; 271254065Skib bit32 deviceId; 272254065Skib bit32 dataLen; 273254065Skib bit32 SSPIuLendirMTlr; 274254065Skib bit8 SSPIu[1]; 275159880Sjhb /* variable lengh */ 2761541Srgrimes /* bit32 AddrLow0; */ 2771541Srgrimes /* bit32 AddrHi0; */ 278320190Sjhb /* bit32 Len0; */ 279320190Sjhb /* bit32 E0; */ 280320190Sjhb} agsaSSPIniExtIOStartCmd_t; 281320190Sjhb 2821541Srgrimestypedef struct agsaSSPIniEncryptIOStartCmd_s 2831549Srgrimes{ 284127868Salc bit32 tag; /* 1 */ 2851541Srgrimes bit32 deviceId; /* 2 */ 28679242Sdillon bit32 dataLen; /* 3 */ 287320190Sjhb bit32 dirMTlr; /* 4 */ 288112569Sjake bit32 sspiu_0_3_indcdbalL; /* 5 */ 2895455Sdg bit32 sspiu_4_7_indcdbalH; /* 6 */ 290112569Sjake bit32 sspiu_8_11; /* 7 */ 291112569Sjake bit32 sspiu_12_15; /* 8 */ 292159880Sjhb bit32 sspiu_16_19; /* 9 */ 2931549Srgrimes bit32 sspiu_19_23; /* 10 */ 2945455Sdg bit32 sspiu_24_27; /* 11 */ 295112569Sjake bit32 epl_descL; /* 12 */ 296112569Sjake bit32 dpl_descL; /* 13 */ 297112569Sjake bit32 edpl_descH; /* 14 */ 2981541Srgrimes bit32 DIF_flags; /* 15 */ 2991549Srgrimes bit32 udt; /* 16 0x10 */ 3001549Srgrimes bit32 udtReplacementLo; /* 17 */ 3011549Srgrimes bit32 udtReplacementHi; /* 18 */ 3021549Srgrimes bit32 DIF_seed; /* 19 */ 3031549Srgrimes bit32 encryptFlagsLo; /* 20 0x14 */ 3041549Srgrimes bit32 encryptFlagsHi; /* 21 */ 3055455Sdg bit32 keyTag_W0; /* 22 */ 3061549Srgrimes bit32 keyTag_W1; /* 23 */ 3075455Sdg bit32 tweakVal_W0; /* 24 0x18 */ 308276546Salc bit32 tweakVal_W1; /* 25 */ 309276546Salc bit32 tweakVal_W2; /* 26 */ 310276546Salc bit32 tweakVal_W3; /* 27 */ 311276546Salc bit32 AddrLow0; /* 28 0x1C */ 312276546Salc bit32 AddrHi0; /* 29 */ 313276546Salc bit32 Len0; /* 30 */ 314276546Salc bit32 E0; /* 31 */ 315276546Salc} agsaSSPIniEncryptIOStartCmd_t; 3161549Srgrimes 317320190Sjhb/** \brief the data structure of SSP Abort Command 3181549Srgrimes * 3191549Srgrimes * use to describe MPI SSP Abort Command (64 bytes) 3201549Srgrimes * 3211549Srgrimes */ 3221549Srgrimestypedef struct agsaSSPAbortCmd_s { 3231549Srgrimes bit32 tag; 32473282Sgallatin bit32 deviceId; 3251549Srgrimes bit32 HTagAbort; 3261541Srgrimes bit32 abortAll; 327237623Salc bit32 reserved[11]; 32899416Salc} agsaSSPAbortCmd_t; 329237623Salc 330207410Skmacy/** \brief the data structure of Register Device Command 331242402Sattilio * 332254065Skib * use to describe MPI DEVICE REGISTER Command (64 bytes) 333254065Skib * 3341541Srgrimes */ 3351541Srgrimestypedef struct agsaRegDevCmd_s { 336106387Salc bit32 tag; 337106387Salc bit32 phyIdportId; 33892654Sjeff bit32 dTypeLRateAwtHa; 339148985Sdes bit32 ITNexusTimeOut; 34092654Sjeff bit32 sasAddrHi; 34192654Sjeff bit32 sasAddrLo; 34292654Sjeff bit32 DeviceId; 343151104Sdes bit32 reserved[8]; 344151104Sdes} agsaRegDevCmd_t; 34592654Sjeff 346214903Sgonzo/** \brief the data structure of Deregister Device Handle Command 347214903Sgonzo * 34892654Sjeff * use to describe MPI DEREGISTER DEVIDE HANDLE Command (64 bytes) 349157908Speter * 350157908Speter */ 351157908Spetertypedef struct agsaDeregDevHandleCmd_s { 352157908Speter bit32 tag; 353157908Speter bit32 deviceId; 354157908Speter bit32 portId; 355157908Speter bit32 reserved[12]; 356157908Speter} agsaDeregDevHandleCmd_t; 357157908Speter 358157908Speter/** \brief the data structure of Get Device Handle Command 359216090Salc * 360216090Salc * use to describe MPI GET DEVIDE HANDLE Command (64 bytes) 361216090Salc * 362216090Salc */ 363216090Salctypedef struct agsaGetDevHandleCmd_s { 364157908Speter bit32 tag; 365157908Speter bit32 DevADevTMaxDIDportId; 366157908Speter bit32 skipCount; 367157908Speter bit32 reserved[12]; 368157908Speter} agsaGetDevHandleCmd_t; 369157908Speter 370320190Sjhb/** \brief the data structure of SMP Request Command 371320190Sjhb * 372320190Sjhb * use to describe MPI SMP REQUEST Command (64 bytes) 373320190Sjhb * 374320190Sjhb */ 375320190Sjhb 376320190Sjhbtypedef struct agsaSMPCmd_s { 377320190Sjhb bit32 tag; 378320190Sjhb bit32 deviceId; 379320190Sjhb bit32 IR_IP_OV_res_phyId_DPdLen_res; 380208164Salc /* Bits [0] - IR */ 381157908Speter /* Bits [1] - IP */ 382208164Salc /* Bits [15:2] - Reserved */ 383208164Salc /* Bits [23:16] - Len */ 384208164Salc /* Bits [31:24] - Reserved */ 385208164Salc bit32 SMPCmd[12]; 386208164Salc} agsaSMPCmd_t; 387217688Spluknet 388208164Salc 389208164Salctypedef struct agsaSMPCmd_V_s { 390208164Salc bit32 tag; /* 1 */ 391208164Salc bit32 deviceId; /* 2 */ 392208164Salc bit32 IR_IP_OV_res_phyId_DPdLen_res;/* 3 */ 393208164Salc /* Bits [0] - IR */ 3945455Sdg /* Bits [1] - IP */ 395320190Sjhb /* Bits [15:2] - Reserved */ 396320190Sjhb /* Bits [23:16] - Len */ 397320190Sjhb /* Bits [31:24] - Reserved */ 398320190Sjhb bit32 SMPHDR; /* 4 */ 399320190Sjhb bit32 SMP3_0; /* 5 */ 4001541Srgrimes bit32 SMP7_4; /* 6 */ 401320190Sjhb bit32 SMP11_8; /* 7 */ 402320190Sjhb bit32 IndirL_SMPRF15_12; /* 8 */ 403276546Salc bit32 IndirH_or_SMPRF19_16; /* 9 */ 404320190Sjhb bit32 IndirLen_or_SMPRF23_20; /* 10 */ 405320190Sjhb bit32 R_or_SMPRF27_24; /* 11 */ 406320190Sjhb bit32 ISRAL_or_SMPRF31_28; /* 12 */ 407320190Sjhb bit32 ISRAH_or_SMPRF35_32; /* 13 */ 408276546Salc bit32 ISRL_or_SMPRF39_36; /* 14 */ 409320190Sjhb bit32 R_or_SMPRF43_40; /* 15 */ 410320190Sjhb} agsaSMPCmd_V_t; 411320190Sjhb 412320190Sjhb/** \brief the data structure of SMP Abort Command 413320190Sjhb * 414320190Sjhb * use to describe MPI SMP Abort Command (64 bytes) 415320190Sjhb * 416320190Sjhb */ 417320190Sjhbtypedef struct agsaSMPAbortCmd_s { 418320190Sjhb bit32 tag; 419320190Sjhb bit32 deviceId; 420320190Sjhb bit32 HTagAbort; 421169291Salc bit32 Scp; 422320190Sjhb bit32 reserved[11]; 423169291Salc} agsaSMPAbortCmd_t; 424320190Sjhb 425169291Salc/** \brief the data structure of SATA Start Command 426169291Salc * 427169291Salc * use to describe MPI SATA Start Command (64 bytes) 428320190Sjhb * 429320190Sjhb */ 430320190Sjhbtypedef struct agsaSATAStartCmd_s { 431320190Sjhb bit32 tag; /* 1 */ 432320190Sjhb bit32 deviceId; /* 2 */ 433320190Sjhb bit32 dataLen; /* 3 */ 434320190Sjhb bit32 optNCQTagataProt; /* 4 */ 435320190Sjhb agsaFisRegHostToDevice_t sataFis; /* 5 6 7 8 9 */ 436320190Sjhb bit32 reserved1; /* 10 */ 437320190Sjhb bit32 reserved2; /* 11 */ 438320190Sjhb bit32 AddrLow0; /* 12 */ 439320190Sjhb bit32 AddrHi0; /* 13 */ 440320190Sjhb bit32 Len0; /* 14 */ 441320190Sjhb bit32 E0; /* 15 */ 442320190Sjhb bit32 ATAPICDB[4]; /* 16-19 */ 443320190Sjhb} agsaSATAStartCmd_t; 444320190Sjhb 445320190Sjhbtypedef struct agsaSATAEncryptStartCmd_s 446320190Sjhb{ 447320190Sjhb bit32 tag; /* 1 */ 448320190Sjhb bit32 IniDeviceId; /* 2 */ 449320190Sjhb bit32 dataLen; /* 3 */ 450320190Sjhb bit32 optNCQTagataProt; /* 4 */ 451320190Sjhb agsaFisRegHostToDevice_t sataFis; /* 5 6 7 8 9 */ 452320190Sjhb bit32 reserved1; /* 10 */ 453320190Sjhb bit32 Res_EPL_DESCL; /* 11 */ 454320190Sjhb bit32 resSKIPBYTES; /* 12 */ 455320190Sjhb bit32 Res_DPL_DESCL_NDPLR; /* 13 DIF per LA Address lo if DPLE is 1 */ 456320190Sjhb bit32 Res_EDPL_DESCH; /* 14 DIF per LA Address hi if DPLE is 1 */ 457320190Sjhb bit32 DIF_flags; /* 15 */ 45873282Sgallatin bit32 udt; /* 16 */ 45973936Sjhb bit32 udtReplacementLo; /* 17 */ 4601541Srgrimes bit32 udtReplacementHi; /* 18 */ 461123711Salc bit32 DIF_seed; /* 19 */ 462320190Sjhb bit32 encryptFlagsLo; /* 20 */ 463320190Sjhb bit32 encryptFlagsHi; /* 21 */ 464123711Salc bit32 keyTagLo; /* 22 */ 465123711Salc bit32 keyTagHi; /* 23 */ 466123711Salc bit32 tweakVal_W0; /* 24 */ 467123711Salc bit32 tweakVal_W1; /* 25 */ 468320190Sjhb bit32 tweakVal_W2; /* 26 */ 4691541Srgrimes bit32 tweakVal_W3; /* 27 */ 47073282Sgallatin bit32 AddrLow0; /* 28 */ 47173936Sjhb bit32 AddrHi0; /* 29 */ 4725455Sdg bit32 Len0; /* 30 */ 47373936Sjhb bit32 E0; /* 31 */ 474174982Salc} agsaSATAEncryptStartCmd_t; 475174982Salc 476320190Sjhb/** \brief the data structure of SATA Abort Command 477320190Sjhb * 478174982Salc * use to describe MPI SATA Abort Command (64 bytes) 479320190Sjhb * 480320190Sjhb */ 481320190Sjhbtypedef struct agsaSATAAbortCmd_s { 482174982Salc bit32 tag; 483216319Sjchandra bit32 deviceId; 484159121Sps bit32 HTagAbort; 485320190Sjhb bit32 abortAll; 486159121Sps bit32 reserved[11]; 487320190Sjhb} agsaSATAAbortCmd_t; 488159121Sps 489159121Sps/** \brief the data structure of Local PHY Control Command 490112329Sjake * 4911541Srgrimes * use to describe MPI LOCAL PHY CONTROL Command (64 bytes) 4921541Srgrimes * 493276546Salc */ 494276546Salctypedef struct agsaLocalPhyCntrlCmd_s { 495276546Salc bit32 tag; 496276546Salc bit32 phyOpPhyId; 497276546Salc bit32 reserved1[14]; 498276546Salc} agsaLocalPhyCntrlCmd_t; 499276546Salc 500164101Salc/** \brief the data structure of Get Device Info Command 501164101Salc * 502164101Salc * use to describe MPI GET DEVIDE INFO Command (64 bytes) 503170816Salc * 504170816Salc */ 505164101Salctypedef struct agsaGetDevInfoCmd_s { 506164101Salc bit32 tag; 507164101Salc bit32 DeviceId; 508170816Salc bit32 reserved[13]; 50944880Salc} agsaGetDevInfoCmd_t; 510170816Salc 511170816Salc/** \brief the data structure of HW Reset Command 512170816Salc * 513170816Salc * use to describe MPI HW Reset Command (64 bytes) 514170816Salc * 515170816Salc */ 516170170Sattiliotypedef struct agsaHWResetCmd_s { 517170170Sattilio bit32 option; 518159880Sjhb bit32 reserved[14]; 519164100Salc} agsaHWResetCmd_t; 52073282Sgallatin 521112329Sjake/** \brief the data structure of Firmware download 522164100Salc * 523159880Sjhb * use to describe MPI FW DOWNLOAD Command (64 bytes) 524159880Sjhb */ 525159880Sjhbtypedef struct agsaFwFlashUpdate_s { 526159880Sjhb bit32 tag; 527159880Sjhb bit32 curImageOffset; 528170816Salc bit32 curImageLen; 5291549Srgrimes bit32 totalImageLen; 5301541Srgrimes bit32 reserved0[7]; 5311541Srgrimes bit32 SGLAL; 532159880Sjhb bit32 SGLAH; 533174982Salc bit32 Len; 534174982Salc bit32 extReserved; 535174982Salc} agsaFwFlashUpdate_t; 536174982Salc 537174982Salc 538174982Salc/** \brief the data structure EXT Flash Op 53973936Sjhb * 5401541Srgrimes * use to describe Extented Flash Operation Command (128 bytes) 5411541Srgrimes */ 54279248Sdillontypedef struct agsaFwFlashOpExt_s { 543225418Skib bit32 tag; 544225418Skib bit32 Command; 545225418Skib bit32 PartOffset; 546225418Skib bit32 DataLength; 547225418Skib bit32 Reserved0[7]; 548225418Skib bit32 SGLAL; 549254138Sattilio bit32 SGLAH; 550254138Sattilio bit32 Len; 551254138Sattilio bit32 E_sgl; 552254138Sattilio bit32 Reserved[15]; 553254138Sattilio} agsaFwFlashOpExt_t; 554225418Skib 555254138Sattilio/** \brief the data structure EXT Flash Op 55679248Sdillon * 557254138Sattilio * use to describe Extented Flash Operation Command (64 bytes) 558307555Skib */ 559136931Salctypedef struct agsaFwFlashOpExtRsp_s { 560254138Sattilio bit32 tag; 561307555Skib bit32 Command; 562254138Sattilio bit32 Status; 563254138Sattilio bit32 Epart_Size; 564254138Sattilio bit32 EpartSectSize; 565254138Sattilio bit32 Reserved[10]; 566307555Skib} agsaFwFlashOpExtRsp_t; 567307555Skib 568254138Sattilio 569307555Skib#define FWFLASH_IOMB_RESERVED_LEN 0x07 570254138Sattilio 571307555Skib#ifdef SPC_ENABLE_PROFILE 572307555Skibtypedef struct agsaFwProfileIOMB_s { 573254138Sattilio bit32 tag; 574307555Skib bit32 tcid_processor_cmd; 575307555Skib bit32 codeStartAdd; 576307555Skib bit32 codeEndAdd; 577307555Skib bit32 reserved0[7]; 578307555Skib bit32 SGLAL; 57979248Sdillon bit32 SGLAH; 58079248Sdillon bit32 Len; 5811541Srgrimes bit32 extReserved; 582254138Sattilio} agsaFwProfileIOMB_t; 58379248Sdillon#define FWPROFILE_IOMB_RESERVED_LEN 0x07 584254138Sattilio#endif 58579248Sdillon/** \brief the data structure of GPIO Commannd 586254138Sattilio * 587254138Sattilio * use to describe MPI GPIO Command (64 bytes) 588254138Sattilio */ 589254138Sattiliotypedef struct agsaGPIOCmd_s { 590254138Sattilio bit32 tag; 591254138Sattilio bit32 eOBIDGeGsGrGw; 592254138Sattilio bit32 GpioWrMsk; 593254138Sattilio bit32 GpioWrVal; 594254138Sattilio bit32 GpioIe; 595254138Sattilio bit32 OT11_0; 596254138Sattilio bit32 OT19_12; /* reserved for SPCv controller */ 597254138Sattilio bit32 GPIEVChange; 598254138Sattilio bit32 GPIEVRise; 599254138Sattilio bit32 GPIEVFall; 60079248Sdillon bit32 reserved[5]; 601254138Sattilio} agsaGPIOCmd_t; 60279248Sdillon 603254138Sattilio 604136952Salc#define GPIO_GW_BIT 0x1 605254138Sattilio#define GPIO_GR_BIT 0x2 606254138Sattilio#define GPIO_GS_BIT 0x4 607254138Sattilio#define GPIO_GE_BIT 0x8 608254138Sattilio 609254138Sattilio/** \brief the data structure of SAS Diagnostic Start/End Command 610254138Sattilio * 611254138Sattilio * use to describe MPI SAS Diagnostic Start/End Command (64 bytes) 612254138Sattilio */ 613254138Sattiliotypedef struct agsaSASDiagStartEndCmd_s { 614254138Sattilio bit32 tag; 615254138Sattilio bit32 OperationPhyId; 616254138Sattilio bit32 reserved[13]; 617254138Sattilio} agsaSASDiagStartEndCmd_t; 618254138Sattilio 619254138Sattilio/** \brief the data structure of SAS Diagnostic Execute Command 620254138Sattilio * 621254138Sattilio * use to describe MPI SAS Diagnostic Execute Command for SPCv (128 bytes) 622254138Sattilio */ 623254138Sattiliotypedef struct agsaSASDiagExecuteCmd_s { 624254138Sattilio bit32 tag; /* 1 */ 625254138Sattilio bit32 CmdTypeDescPhyId;/* 2 */ 626254138Sattilio bit32 Pat1Pat2; /* 3 */ 627254138Sattilio bit32 Threshold; /* 4 */ 628254138Sattilio bit32 CodePatErrMsk; /* 5 */ 629254138Sattilio bit32 Pmon; /* 6 */ 630254138Sattilio bit32 PERF1CTL; /* 7 */ 63179248Sdillon bit32 THRSHLD1; /* 8 */ 632254138Sattilio bit32 reserved[23]; /* 9 31 */ 633254138Sattilio} agsaSASDiagExecuteCmd_t; 63479248Sdillon 63579248Sdillon 63679248Sdillon/** \brief the data structure of SAS Diagnostic Execute Command 63779248Sdillon * 638254138Sattilio * use to describe MPI SAS Diagnostic Execute Command for SPC (64 bytes) 63979248Sdillon */ 640254138Sattiliotypedef struct agsa_SPC_SASDiagExecuteCmd_s { 641254138Sattilio bit32 tag; /* 1 */ 64279248Sdillon bit32 CmdTypeDescPhyId;/* 2 */ 643254138Sattilio bit32 Pat1Pat2; /* 3 */ 644307672Skib bit32 Threshold; /* 4 */ 645307672Skib bit32 CodePatErrMsk; /* 5 */ 64679248Sdillon bit32 Pmon; /* 6 */ 64779248Sdillon bit32 PERF1CTL; /* 7 */ 648307672Skib bit32 reserved[8]; /* 8 15 */ 64979248Sdillon} agsa_SPC_SASDiagExecuteCmd_t; 650254138Sattilio#define SAS_DIAG_PARAM_BYTES 24 651136931Salc 652307672Skib 653254138Sattilio/** \brief the data structure of SSP TGT IO Start Command 654254138Sattilio * 655307672Skib * use to describe MPI SSP TGT IO Start Command (64 bytes) 656307672Skib * 657307672Skib */ 658254138Sattiliotypedef struct agsaSSPTgtIOStartCmd_s { 659254138Sattilio bit32 tag; /* 1 */ 660254138Sattilio bit32 deviceId; /* 2 */ 661254138Sattilio bit32 dataLen; /* 3 */ 66279248Sdillon bit32 dataOffset; /* 4 */ 66379248Sdillon bit32 INITagAgrDir; /* 5 */ 664254138Sattilio bit32 reserved; /* 6 */ 665254138Sattilio bit32 DIF_flags; /* 7 */ 666254138Sattilio bit32 udt; /* 8 */ 667254138Sattilio bit32 udtReplacementLo; /* 9 */ 668254138Sattilio bit32 udtReplacementHi; /* 10 */ 669254138Sattilio bit32 DIF_seed; /* 11 */ 670254138Sattilio bit32 AddrLow0; /* 12 */ 671254138Sattilio bit32 AddrHi0; /* 13 */ 672254138Sattilio bit32 Len0; /* 14 */ 673254138Sattilio bit32 E0; /* 15 */ 674254138Sattilio} agsaSSPTgtIOStartCmd_t; 675254138Sattilio 676255244Skib/** \brief the data structure of SSP TGT Response Start Command 677255244Skib * 678255244Skib * use to describe MPI SSP TGT Response Start Command (64 bytes) 679255244Skib * 680255244Skib */ 681255244Skibtypedef struct agsaSSPTgtRspStartCmd_s { 682255244Skib bit32 tag; 683254138Sattilio bit32 deviceId; 684254138Sattilio bit32 RspLen; 685254138Sattilio bit32 INITag_IP_AN; 686254138Sattilio bit32 reserved[7]; 687254138Sattilio bit32 AddrLow0; 688254138Sattilio bit32 AddrHi0; 689254138Sattilio bit32 Len0; 690254138Sattilio bit32 E0; 69179248Sdillon} agsaSSPTgtRspStartCmd_t; 692254138Sattilio 69379248Sdillon/** \brief the data structure of Device Handle Accept Command 694101019Salc * 695254138Sattilio * use to describe MPI Device Handle Accept Command (64 bytes) 696254138Sattilio * 697254138Sattilio */ 698254138Sattiliotypedef struct agsaDevHandleAcceptCmd_s { 699254138Sattilio bit32 tag; 700254138Sattilio bit32 Ctag; 70179248Sdillon bit32 deviceId; 70279248Sdillon bit32 DevA_MCN_R_R_HA_ITNT; 703254138Sattilio bit32 reserved[11]; 704254138Sattilio} agsaDevHandleAcceptCmd_t; 705254138Sattilio 706254138Sattilio/** \brief the data structure of SAS HW Event Ack Command 707254138Sattilio * 708254138Sattilio * use to describe MPI SAS HW Event Ack Command (64 bytes) 709254138Sattilio * 710254138Sattilio */ 71179248Sdillontypedef struct agsaSASHwEventAckCmd_s { 712254138Sattilio bit32 tag; 71379248Sdillon bit32 sEaPhyIdPortId; 714254138Sattilio bit32 Param0; 715101174Salc bit32 Param1; 716254138Sattilio bit32 reserved[11]; 717254138Sattilio} agsaSASHwEventAckCmd_t; 718254138Sattilio 719254138Sattilio/** \brief the data structure of Get Time Stamp Command 720254138Sattilio * 721254138Sattilio * use to describe MPI Get Time Stamp Command (64 bytes) 722254138Sattilio * 723254138Sattilio */ 724254138Sattiliotypedef struct agsaGetTimeStampCmd_s { 725254138Sattilio bit32 tag; 726254138Sattilio bit32 reserved[14]; 72779248Sdillon} agsaGetTimeStampCmd_t; 72879248Sdillon 72979248Sdillon/** \brief the data structure of Port Control Command 73079248Sdillon * 73179248Sdillon * use to describe MPI Port Control Command (64 bytes) 73279248Sdillon * 73379248Sdillon */ 73479248Sdillontypedef struct agsaPortControlCmd_s { 73579248Sdillon bit32 tag; 73679248Sdillon bit32 portOPPortId; 73779248Sdillon bit32 Param0; 738109554Salc bit32 Param1; 739207410Skmacy bit32 reserved[11]; 74079248Sdillon} agsaPortControlCmd_t; 74179248Sdillon 74279248Sdillon/** \brief the data structure of Set NVM Data Command 74379248Sdillon * 74479248Sdillon * use to describe MPI Set NVM Data Command (64 bytes) 74579248Sdillon * 746107887Salc */ 747207410Skmacytypedef struct agNVMIndirect_s { 748255608Skib bit32 signature; 74979248Sdillon bit32 reserved[7]; 750242300Salc bit32 ISglAL; 75190944Stegge bit32 ISglAH; 75279248Sdillon bit32 ILen; 75379248Sdillon bit32 reserved1; 75479248Sdillon} agNVMIndirect_t; 755216511Salc 756216511Salctypedef union agsaSetNVMData_s { 757216511Salc bit32 NVMData[12]; 758216511Salc agNVMIndirect_t indirectData; 759216511Salc} agsaSetNVMData_t; 760216511Salc 761216511Salctypedef struct agsaSetNVMDataCmd_s { 762216511Salc bit32 tag; 763216511Salc bit32 LEN_IR_VPDD; 764216511Salc bit32 VPDOffset; 765216511Salc agsaSetNVMData_t Data; 766216511Salc} agsaSetNVMDataCmd_t; 767216511Salc 768216511Salc/** \brief the data structure of Get NVM Data Command 769216511Salc * 770216511Salc * use to describe MPI Get NVM Data Command (64 bytes) 771216511Salc * 772216511Salc */ 773216511Salctypedef struct agsaGetNVMDataCmd_s { 774216511Salc bit32 tag; 775216511Salc bit32 LEN_IR_VPDD; 776216511Salc bit32 VPDOffset; 777216511Salc bit32 reserved[8]; 778216511Salc bit32 respAddrLo; 779216511Salc bit32 respAddrHi; 780216511Salc bit32 respLen; 781216511Salc bit32 reserved1; 782216511Salc} agsaGetNVMDataCmd_t; 783235372Skib 784235372Skib#define TWI_DEVICE 0x0 785235372Skib#define C_SEEPROM 0x1 786235372Skib#define VPD_FLASH 0x4 787235372Skib#define AAP1_RDUMP 0x5 788235372Skib#define IOP_RDUMP 0x6 789235372Skib#define EXPAN_ROM 0x7 790235372Skib 791235372Skib#define DIRECT_MODE 0x0 792235372Skib#define INDIRECT_MODE 0x1 793235372Skib 794235372Skib#define IRMode 0x80000000 795235372Skib#define IPMode 0x80000000 796235372Skib#define NVMD_TYPE 0x0000000F 797235776Sandrew#define NVMD_STAT 0x0000FFFF 798235372Skib#define NVMD_LEN 0xFF000000 799235372Skib 800235372Skib#define TWI_DEVICE 0x0 801235372Skib#define SEEPROM 0x1 802235372Skib 803235372Skib/** \brief the data structure of Set Device State Command 804235372Skib * 805235372Skib * use to describe MPI Set Device State Command (64 bytes) 806235372Skib * 807216511Salc */ 808219476Salctypedef struct agsaSetDeviceStateCmd_s { 809219476Salc bit32 tag; 810219476Salc bit32 deviceId; 811219476Salc bit32 NDS; 812219476Salc bit32 reserved[12]; 813219476Salc} agsaSetDeviceStateCmd_t; 814219476Salc 815219476Salc#define DS_OPERATIONAL 0x01 816219476Salc#define DS_IN_RECOVERY 0x03 817219476Salc#define DS_IN_ERROR 0x04 818219476Salc#define DS_NON_OPERATIONAL 0x07 819219476Salc 820235366Skib/** \brief the data structure of Get Device State Command 821235366Skib * 822235366Skib * use to describe MPI Get Device State Command (64 bytes) 823235366Skib * 824235366Skib */ 825235366Skibtypedef struct agsaGetDeviceStateCmd_s { 826235366Skib bit32 tag; 827235366Skib bit32 deviceId; 828235366Skib bit32 reserved[13]; 829235366Skib} agsaGetDeviceStateCmd_t; 830235366Skib 831235366Skib/** \brief the data structure of Set Device Info Command 832235366Skib * 833235366Skib * use to describe MPI OPC_INB_SET_DEV_INFO (0x02c) Command (64 bytes) 834235366Skib * 835235366Skib */ 836219476Salctypedef struct agsaSetDevInfoCmd_s { 837219476Salc bit32 tag; 838219476Salc bit32 deviceId; 839219476Salc bit32 SA_SR_SI; 840219476Salc bit32 DEVA_MCN_R_ITNT; 841254138Sattilio bit32 reserved[11]; 842254138Sattilio} agsaSetDevInfoCmd_t; 843219476Salc 844252653Sneel#define SET_DEV_INFO_V_DW3_MASK 0x0000003F 845235366Skib#define SET_DEV_INFO_V_DW4_MASK 0xFF07FFFF 846219476Salc#define SET_DEV_INFO_SPC_DW3_MASK 0x7 847219476Salc#define SET_DEV_INFO_SPC_DW4_MASK 0x003FFFF 848219476Salc 849219476Salc#define SET_DEV_INFO_V_DW3_SM_SHIFT 3 850219476Salc#define SET_DEV_INFO_V_DW3_SA_SHIFT 2 851219476Salc#define SET_DEV_INFO_V_DW3_SR_SHIFT 1 852219476Salc#define SET_DEV_INFO_V_DW3_SI_SHIFT 0 853219476Salc 854219476Salc#define SET_DEV_INFO_V_DW4_MCN_SHIFT 24 855219476Salc#define SET_DEV_INFO_V_DW4_AWT_SHIFT 17 856219476Salc#define SET_DEV_INFO_V_DW4_RETRY_SHIFT 16 857219476Salc#define SET_DEV_INFO_V_DW4_ITNEXUS_SHIFT 0 858235365Skib 859219476Salc/** \brief the data structure of SAS Re_Initialize Command 860219476Salc * 861219476Salc * use to describe MPI SAS RE_INITIALIZE Command (64 bytes) 862219476Salc * 863219476Salc */ 864219476Salctypedef struct agsaSasReInitializeCmd_s { 865219476Salc bit32 tag; 866219476Salc bit32 setFlags; 867219476Salc bit32 MaxPorts; 868219476Salc bit32 openRejReCmdData; 869219476Salc bit32 sataHOLTMO; 870219476Salc bit32 reserved[10]; 871219476Salc} agsaSasReInitializeCmd_t; 872219476Salc 873219476Salc 874219476Salc/** \brief the data structure of SGPIO Command 875219476Salc * 876219476Salc * use to describe MPI serial GPIO Command (64 bytes) 877219476Salc * 878219476Salc */ 879219476Salctypedef struct agsaSGpioCmd_s { 880219476Salc bit32 tag; 88179248Sdillon bit32 regIndexRegTypeFunctionFrameType; 88279248Sdillon bit32 regCount; 883166805Salc bit32 writeData[OSSA_SGPIO_MAX_WRITE_DATA_COUNT]; 88479248Sdillon} agsaSGpioCmd_t; 88579248Sdillon 88679248Sdillon/** \brief the data structure of PCIE Diagnostic Command 88779248Sdillon * 888166808Salc * use to describe MPI PCIE Diagnostic Command for SPCv (128 bytes) 889166808Salc * 89079248Sdillon */ 89179248Sdillontypedef struct agsaPCIeDiagExecuteCmd_s { 89279248Sdillon bit32 tag; /* 1 */ 89379248Sdillon bit32 CmdTypeDesc; /* 2 */ 89479248Sdillon bit32 UUM_EDA; /* 3 */ 89579248Sdillon bit32 UDTR1_UDT0; /* 4 */ 89679248Sdillon bit32 UDT5_UDT2; /* 5 */ 89779248Sdillon bit32 UDTR5_UDTR2; /* 6 */ 89879248Sdillon bit32 Res_IOS; /* 7 */ 89979248Sdillon bit32 rdAddrLower; /* 8 */ 90079248Sdillon bit32 rdAddrUpper; /* 9 */ 901166808Salc bit32 wrAddrLower; /* 10 */ 902166808Salc bit32 wrAddrUpper; /* 11 */ 90379248Sdillon bit32 len; /* 12 */ 90479248Sdillon bit32 pattern; /* 13 */ 90579248Sdillon bit32 reserved2[2]; /* 14 15 */ 90679248Sdillon bit32 reserved3[16]; /* 15 31 */ 907239040Skib} agsaPCIeDiagExecuteCmd_t; 908239040Skib 909239040Skib 910239040Skib/** \brief the data structure of PCI Diagnostic Command for SPC 911239246Skib * 912239040Skib * use to describe MPI PCI Diagnostic Command for SPC (64 bytes) 913239040Skib * 914239246Skib */ 915239040Skibtypedef struct agsa_SPC_PCIDiagExecuteCmd_s { 916239040Skib bit32 tag; 917239040Skib bit32 CmdTypeDesc; 918239040Skib bit32 reserved1[5]; 919239040Skib bit32 rdAddrLower; 920239040Skib bit32 rdAddrUpper; 921239040Skib bit32 wrAddrLower; 922254138Sattilio bit32 wrAddrUpper; 923254138Sattilio bit32 len; 924239040Skib bit32 pattern; 925254138Sattilio bit32 reserved2[2]; 926239040Skib} agsa_SPC_PCIDiagExecuteCmd_t; 927254138Sattilio 928254138Sattilio/** \brief the data structure of GET DFE Data Command 929239040Skib * 930239246Skib * use to describe GET DFE Data Command for SPCv (128 bytes) 931239246Skib * 932239246Skib */ 933239246Skibtypedef struct agsaGetDDEFDataCmd_s { 934239246Skib bit32 tag; /* 1 */ 935239246Skib bit32 reserved_In_Ln;/* 2 */ 936239040Skib bit32 MCNT; /* 3 */ 937239040Skib bit32 reserved1[3]; /* 4 - 6 */ 938239040Skib bit32 Buf_AddrL; /* 7 */ 939239040Skib bit32 Buf_AddrH; /* 8 */ 940239040Skib bit32 Buf_Len; /* 9 */ 941239040Skib bit32 E_reserved; /* 10 */ 942239040Skib bit32 reserved2[21]; /* 11 - 31 */ 943254138Sattilio} agsaGetDDEFDataCmd_t; 944100889Salc 945254138Sattilio 946254138Sattilio/*********************************************** 947161674Salc * outbound IOMBs 948254138Sattilio ***********************************************/ 949254138Sattilio/** \brief the data structure of Echo Response 950100889Salc * 951254138Sattilio * use to describe MPI Echo Response (64 bytes) 952254138Sattilio * 953100889Salc */ 954254138Sattiliotypedef struct agsaEchoRsp_s { 955100889Salc bit32 tag; 956254138Sattilio bit32 payload[14]; 957248084Sattilio} agsaEchoRsp_t; 958160960Salc 959254138Sattilio/** \brief the data structure of HW Event from Outbound 960254138Sattilio * 961254138Sattilio * use to describe MPI HW Event (64 bytes) 962254138Sattilio * 963254138Sattilio */ 964254138Sattiliotypedef struct agsaHWEvent_SPC_OUB_s { 965254138Sattilio bit32 LRStatusEventPhyIdPortId; 966254138Sattilio bit32 EVParam; 967254138Sattilio bit32 NpipPortState; 968254138Sattilio agsaSASIdentify_t sasIdentify; 969254138Sattilio agsaFisRegDeviceToHost_t sataFis; 970307672Skib} agsaHWEvent_SPC_OUB_t; 971254138Sattilio 972254138Sattilio#define PHY_ID_BITS 0x000000F0 973254138Sattilio#define LINK_RATE_MASK 0xF0000000 974254138Sattilio#define STATUS_BITS 0x0F000000 975100889Salc#define HW_EVENT_BITS 0x00FFFF00 976100889Salc 977100889Salctypedef struct agsaHWEvent_Phy_OUB_s { 978237346Salc bit32 tag; 97979248Sdillon bit32 Status; 980223307Salc bit32 ReservedPhyId; 981223307Salc} agsaHWEvent_Phy_OUB_t; 982225840Skib 983225840Skib/** \brief the data structure of HW Event from Outbound 984225840Skib * 985223307Salc * use to describe MPI HW Event (64 bytes) 986237346Salc * 987237346Salc */ 98879248Sdillontypedef struct agsaHWEvent_V_OUB_s { 98979248Sdillon bit32 LRStatEventPortId; 990237346Salc bit32 EVParam; 99179248Sdillon bit32 RsvPhyIdNpipRsvPortState; 992193124Salc agsaSASIdentify_t sasIdentify; 993237346Salc agsaFisRegDeviceToHost_t sataFis; 994172317Salc} agsaHWEvent_V_OUB_t; 99579248Sdillon 996170816Salc#define PHY_ID_V_BITS 0x00FF0000 997111434Salc#define NIPP_V_BITS 0x0000FF00 998193124Salc 999193124Salc 100079248Sdillon 100179248Sdillon/** \brief the data structure of SSP Completion Response 100279248Sdillon * 100379248Sdillon * use to describe MPI SSP Completion Response (1024 bytes) 10041541Srgrimes * 10051541Srgrimes */ 100642026Sdillontypedef struct agsaSSPCompletionRsp_s { 10071541Srgrimes bit32 tag; 1008241155Salc bit32 status; 10091541Srgrimes bit32 param; 1010254141Sattilio bit32 SSPTag; 101179248Sdillon agsaSSPResponseInfoUnit_t SSPrsp; 10121541Srgrimes bit32 respData; 1013250577Salc bit32 senseData[5]; 10141541Srgrimes bit32 respData1[239]; 1015248084Sattilio} agsaSSPCompletionRsp_t; 1016250577Salc 1017254141Sattilio 1018250577Salc/** \brief the data structure of SSP Completion DIF Response 10191541Srgrimes * 1020250577Salc * use to describe MPI SSP Completion DIF Response (1024 bytes) 1021250577Salc * 1022250577Salc */ 1023250577Salctypedef struct agsaSSPCompletionDifRsp_s { 1024250577Salc bit32 tag; 1025250577Salc bit32 status; 1026250577Salc bit32 param; 1027250577Salc bit32 SSPTag; 1028250577Salc bit32 Device_Id; 1029250577Salc bit32 UpperLBA; 1030254141Sattilio bit32 LowerLBA; 1031250577Salc bit32 sasAddressHi; 1032250577Salc bit32 sasAddressLo; 1033250577Salc bit32 ExpectedCRCUDT01; 1034250577Salc bit32 ExpectedUDT2345; 1035250577Salc bit32 ActualCRCUDT01; 1036250577Salc bit32 ActualUDT2345; 1037250577Salc bit32 DIFErrDevID; 1038250577Salc bit32 ErrBoffsetEDataLen; 1039250577Salc bit32 EDATA_FRM; 1040255626Skib 1041250577Salc} agsaSSPCompletionDifRsp_t; 1042250577Salc 1043250577Salc 1044250577Salc/* SSPTag bit fields Bits [31:16] */ 1045250577Salc#define SSP_RESCV_BIT 0x00010000 /* Bits [16] */ 1046250577Salc#define SSP_RESCV_PAD 0x00060000 /* Bits [18:17] */ 1047250577Salc#define SSP_RESCV_PAD_SHIFT 17 1048250577Salc#define SSP_AGR_S_BIT (1 << 19) /* Bits [19] */ 1049250577Salc 1050250577Salc/** \brief the data structure of SMP Completion Response 10511541Srgrimes * 10525455Sdg * use to describe MPI SMP Completion Response (1024 bytes) 10531541Srgrimes * 105413490Sdyson */ 105513490Sdysontypedef struct agsaSMPCompletionRsp_s { 10561541Srgrimes bit32 tag; 10571541Srgrimes bit32 status; 1058105407Sdillon bit32 param; 10591541Srgrimes bit32 SMPrsp[252]; 1060254141Sattilio} agsaSMPCompletionRsp_t; 1061302922Smarkj 1062302922Smarkj/** \brief the data structure of Deregister Device Response 1063254141Sattilio * 1064254141Sattilio * use to describe MPI Deregister Device Response (64 bytes) 1065254141Sattilio * 1066254141Sattilio */ 1067254141Sattiliotypedef struct agsaDeregDevHandleRsp_s { 1068254141Sattilio bit32 tag; 1069254141Sattilio bit32 status; 1070254141Sattilio bit32 deviceId; 1071254141Sattilio bit32 reserved[12]; 1072254141Sattilio} agsaDeregDevHandleRsp_t; 1073254141Sattilio 1074254141Sattilio/** \brief the data structure of Get Device Handle Response 1075254141Sattilio * 1076254141Sattilio * use to describe MPI Get Device Handle Response (64 bytes) 1077254141Sattilio * 1078254141Sattilio */ 1079254141Sattiliotypedef struct agsaGetDevHandleRsp_s { 1080254141Sattilio bit32 tag; 1081254141Sattilio bit32 DeviceIdcPortId; 1082254141Sattilio bit32 deviceId[13]; 1083254141Sattilio} agsaGetDevHandleRsp_t; 1084254141Sattilio 1085254141Sattilio#define DEVICE_IDC_BITS 0x00FFFF00 1086254141Sattilio#define DEVICE_ID_BITS 0x00000FFF 1087254141Sattilio 1088255626Skib/** \brief the data structure of Local Phy Control Response 1089254141Sattilio * 1090254141Sattilio * use to describe MPI Local Phy Control Response (64 bytes) 1091254141Sattilio * 1092254141Sattilio */ 1093254141Sattiliotypedef struct agsaLocalPhyCntrlRsp_s { 1094250577Salc bit32 tag; 1095250577Salc bit32 phyOpId; 1096250577Salc bit32 status; 1097250577Salc bit32 reserved[12]; 10981541Srgrimes} agsaLocalPhyCntrlRsp_t; 10991541Srgrimes 1100241155Salc#define LOCAL_PHY_OP_BITS 0x0000FF00 11011541Srgrimes#define LOCAL_PHY_PHYID 0x000000FF 11021541Srgrimes 1103241155Salc/** \brief the data structure of DEVICE_REGISTRATION Response 1104143646Sjeff * 1105143646Sjeff * use to describe device registration response (64 bytes) 1106143646Sjeff * 1107143646Sjeff */ 1108241155Salctypedef struct agsaDeviceRegistrationRsp_s { 110944245Sdillon bit32 tag; 111044245Sdillon bit32 status; 111144245Sdillon bit32 deviceId; 1112160540Salc bit32 reserved[12]; 111344245Sdillon} agsaDeviceRegistrationRsp_t; 1114237168Salc 111585517Sdillon 11161541Srgrimes#define FAILURE_OUT_OF_RESOURCE 0x01 /* The device registration failed because the SPC 8x6G is running out of device handle resources. The parameter DEVICE_ID is not used. */ 11171541Srgrimes#define FAILURE_DEVICE_ALREADY_REGISTERED 0x02 /* The device registration failed because the SPC 8x6G detected an existing device handle with a similar SAS address. The parameter DEVICE_ID contains the existing DEVICE _ID assigned to the SAS device. */ 11181541Srgrimes#define FAILURE_INVALID_PHY_ID 0x03 /* Only for directly-attached SATA registration. The device registration failed because the SPC 8x6G detected an invalid (out-of-range) PHY ID. */ 111942957Sdillon#define FAILURE_PHY_ID_ALREADY_REGISTERED 0x04 /* Only for directly-attached SATA registration. The device registration failed because the SPC 8x6G detected an already -registered PHY ID for a directly attached SATA drive. */ 11201541Srgrimes#define FAILURE_PORT_ID_OUT_OF_RANGE 0x05 /* PORT_ID specified in the REGISTER_DEVICE Command is out-of range (0-7). */ 11211541Srgrimes#define FAILURE_PORT_NOT_VALID_STATE 0x06 /* The PORT_ID specified in the REGISTER_DEVICE Command is not in PORT_VALID state. */ 112242957Sdillon#define FAILURE_DEVICE_TYPE_NOT_VALID 0x07 /* The device type, specified in the �S field in the REGISTER_DEVICE Command is not valid. */ 112342957Sdillon 11241541Srgrimes#define MPI_ERR_DEVICE_HANDLE_UNAVAILABLE 0x1020 /* The device registration failed because the SPCv controller is running out of device handle resources. The parameter DEVICE_ID is not used. */ 1125241155Salc#define MPI_ERR_DEVICE_ALREADY_REGISTERED 0x1021 /* The device registration failed because the SPCv controller detected an existing device handle with the same SAS address. The parameter DEVICE_ID contains the existing DEVICE _ID assigned to the SAS device. */ 11261541Srgrimes#define MPI_ERR_DEVICE_TYPE_NOT_VALID 0x1022 /* The device type, specified in the �S field in the REGISTER_DEVICE_HANDLE Command (page 274) is not valid. */ 112744051Sdillon#define MPI_ERR_PORT_INVALID_PORT_ID 0x1041 /* specified in the REGISTER_DEVICE_HANDLE Command (page 274) is invalid. i.e Out of supported range */ 112879248Sdillon#define MPI_ERR_PORT_STATE_NOT_VALID 0x1042 /* The PORT_ID specified in the REGISTER_DEVICE_HANDLE Command (page 274) is not in PORT_VALID state. */ 11291541Srgrimes#define MPI_ERR_PORT_STATE_NOT_IN_USE 0x1043 113033109Sdyson#define MPI_ERR_PORT_OP_NOT_SUPPORTED 0x1044 1131254138Sattilio#define MPI_ERR_PORT_SMP_PHY_WIDTH_EXCEED 0x1045 11321541Srgrimes#define MPI_ERR_PORT_NOT_IN_CORRECT_STATE 0x1047 /*MPI_ERR_DEVICE_ACCEPT_PENDING*/ 1133224746Skib 1134207669Salc 1135137168Salc#define MPI_ERR_PHY_ID_INVALID 0x1061 /* Only for directly-attached SATA registration. The device registration failed because the SPCv controller detected an invalid (out-of-range) PHY ID. */ 113644051Sdillon#define MPI_ERR_PHY_ID_ALREADY_REGISTERED 0x1062 /* Only for directly-attached SATA registration. The device registration failed because the SPCv controller detected an alreadyregistered PHY ID for a directly-attached SATA drive. */ 1137248084Sattilio 1138254138Sattilio 1139254138Sattilio 1140254138Sattilio 1141254138Sattilio/** \brief the data structure of SATA Completion Response 1142254138Sattilio * 1143254138Sattilio * use to describe MPI SATA Completion Response (64 bytes) 1144254138Sattilio * 1145137168Salc */ 1146254138Sattiliotypedef struct agsaSATACompletionRsp_s { 1147254138Sattilio bit32 tag; 1148254138Sattilio bit32 status; 114932937Sdyson bit32 param; 115032937Sdyson bit32 FSATArsp; 115142957Sdillon bit32 respData[11]; 1152105407Sdillon} agsaSATACompletionRsp_t; 11531541Srgrimes 1154248449Sattilio/** \brief the data structure of SATA Event Response 115533109Sdyson * 11561541Srgrimes * use to describe MPI SATA Event Response (64 bytes) 11571541Srgrimes * 11585455Sdg */ 11591541Srgrimestypedef struct agsaSATAEventRsp_s { 116033109Sdyson bit32 tag; 1161241155Salc bit32 event; 1162143646Sjeff bit32 portId; 1163143646Sjeff bit32 deviceId; 1164143646Sjeff bit32 reserved[11]; 1165143646Sjeff} agsaSATAEventRsp_t; 1166241155Salc 116740548Sdg/** \brief the data structure of SSP Event Response 116833109Sdyson * 11691541Srgrimes * use to describe MPI SSP Event Response (64 bytes) 11701541Srgrimes * 11711541Srgrimes */ 11721541Srgrimestypedef struct agsaSSPEventRsp_s { 11731541Srgrimes bit32 tag; 11741541Srgrimes bit32 event; 11751541Srgrimes bit32 portId; 11761541Srgrimes bit32 deviceId; 1177105407Sdillon bit32 SSPTag; 11781541Srgrimes bit32 EVT_PARAM0_or_LBAH; 11798876Srgrimes bit32 EVT_PARAM1_or_LBAL; 118079248Sdillon bit32 SAS_ADDRH; 11811541Srgrimes bit32 SAS_ADDRL; 11821541Srgrimes bit32 UDT1_E_UDT0_E_CRC_E; 1183250745Salc bit32 UDT5_E_UDT4_E_UDT3_E_UDT2_E; 1184248449Sattilio bit32 UDT1_A_UDT0_A_CRC_A; 11851541Srgrimes bit32 UDT5_A_UDT4_A_UDT3_A_UDT2_A; 11861541Srgrimes bit32 HW_DEVID_Reserved_DIF_ERR; 11871541Srgrimes bit32 EDATA_LEN_ERR_BOFF; 1188209685Skib bit32 EDATA_FRM; 1189209685Skib} agsaSSPEventRsp_t; 1190209685Skib 1191209685Skib#define SSPTAG_BITS 0x0000FFFF 1192209685Skib 1193209685Skib/** \brief the data structure of Get Device Info Response 1194209685Skib * 1195209685Skib * use to describe MPI Get Device Info Response (64 bytes) 1196209685Skib * 1197209685Skib */ 1198209685Skibtypedef struct agsaGetDevInfoRspSpc_s { 1199209685Skib bit32 tag; 1200250884Sattilio bit32 status; 1201248449Sattilio bit32 deviceId; 1202248449Sattilio bit32 dTypeSrateSMPTOArPortID; 1203209685Skib bit32 FirstBurstSizeITNexusTimeOut; 1204209685Skib bit8 sasAddrHi[4]; 1205209685Skib bit8 sasAddrLow[4]; 1206209685Skib bit32 reserved[8]; 1207209407Salc} agsaGetDevInfoRsp_t; 1208209407Salc 1209209407Salc#define SMPTO_BITS 0xFFFF 1210209407Salc#define NEXUSTO_BITS 0xFFFF 1211209407Salc#define FIRST_BURST 0xFFFF 1212209407Salc#define FLAG_BITS 0x3 1213209407Salc#define LINK_RATE_BITS 0xFF 1214209407Salc#define DEV_TYPE_BITS 0x30000000 1215209407Salc 1216209407Salc/** \brief the data structure of Get Device Info Response V 1217248084Sattilio * 1218311515Skib * use to describe MPI Get Device Info Response (64 bytes) 1219311515Skib * 1220311515Skib */ 1221311515Skibtypedef struct agsaGetDevInfoRspV_s { 1222311515Skib bit32 tag; 1223209407Salc bit32 status; 1224209407Salc bit32 deviceId; 1225209407Salc bit32 ARSrateSMPTimeOutPortID; 1226209407Salc bit32 IRMcnITNexusTimeOut; 1227209407Salc bit8 sasAddrHi[4]; 1228209407Salc bit8 sasAddrLow[4]; 1229209407Salc bit32 reserved[8]; 1230209407Salc} agsaGetDevInfoRspV_t; 1231209407Salc 1232209407Salc#define SMPTO_VBITS 0xFFFF 1233209407Salc#define NEXUSTO_VBITS 0xFFFF 1234209407Salc#define FIRST_BURST_MCN 0xF 1235209407Salc#define FLAG_VBITS 0x3 1236209407Salc#define LINK_RATE_VBITS 0xFF 1237248084Sattilio#define DEV_TYPE_VBITS 0x10000000 1238311515Skib 1239311515Skib 1240311515Skib/** \brief the data structure of Get Phy Profile Command IOMB V 1241311515Skib * 1242311515Skib */ 1243209407Salctypedef struct agsaGetPhyProfileCmd_V_s { 1244209407Salc bit32 tag; 1245209407Salc bit32 Reserved_Ppc_SOP_PHYID; 1246209407Salc bit32 reserved[29]; 1247254141Sattilio} agsaGetPhyProfileCmd_V_t; 1248254141Sattilio 1249254163Sjhb 1250254163Sjhb/** \brief the data structure of Get Phy Profile Response IOMB V 1251254141Sattilio * 1252254141Sattilio */ 1253254141Sattiliotypedef struct agsaGetPhyProfileRspV_s { 1254254141Sattilio bit32 tag; 1255254141Sattilio bit32 status; 1256254141Sattilio bit32 Reserved_Ppc_SOP_PHYID; 1257254141Sattilio bit32 PageSpecificArea[12]; 1258254141Sattilio} agsaGetPhyProfileRspV_t; 1259254141Sattilio 1260254141Sattilio/** \brief the data structure of Set Phy Profile Command IOMB V 1261254141Sattilio * 1262254141Sattilio */ 1263254141Sattiliotypedef struct agsaSetPhyProfileCmd_V_s { 1264254141Sattilio bit32 tag; 1265254141Sattilio bit32 Reserved_Ppc_SOP_PHYID; 1266254141Sattilio bit32 PageSpecificArea[29]; 1267254141Sattilio} agsaSetPhyProfileCmd_V_t; 1268254141Sattilio 1269254141Sattilio/** \brief the data structure of GetVis Command IOMB V 1270254141Sattilio * OPC_OUB_GET_VIST_CAP_RSP 1271254141Sattilio */ 1272254141Sattiliotypedef struct agsaGetVHistCap_V_s { 1273254141Sattilio bit32 tag; 1274266591Salc bit32 Channel; 1275254163Sjhb bit32 NumBitLo; 1276254163Sjhb bit32 NumBitHi; 1277254141Sattilio bit32 reserved0; 1278254141Sattilio bit32 reserved1; 1279254141Sattilio bit32 PcieAddrLo; 1280254163Sjhb bit32 PcieAddrHi; 1281254141Sattilio bit32 ByteCount; 1282254163Sjhb bit32 reserved2[22]; 1283254141Sattilio} agsaGetVHistCap_V_t; 1284254141Sattilio 1285254141Sattilio/** \brief the data structure of Set Phy Profile Response IOMB V 1286254141Sattilio * 1287254141Sattilio */ 1288254141Sattiliotypedef struct agsaSetPhyProfileRspV_s { 1289254141Sattilio bit32 tag; 1290254141Sattilio bit32 status; 1291254141Sattilio bit32 Reserved_Ppc_PHYID; 1292254141Sattilio bit32 PageSpecificArea[12]; 1293254141Sattilio} agsaSetPhyProfileRspV_t; 1294254141Sattilio 12951541Srgrimestypedef struct agsaGetPhyInfoV_s { 12961541Srgrimes bit32 tag; 12971541Srgrimes bit32 Reserved_SOP_PHYID; 12981541Srgrimes bit32 reserved[28]; 12991541Srgrimes} agsaGetPhyInfoV_t; 130042957Sdillon 130142957Sdillon 130242957Sdillon#define SPC_GET_SAS_PHY_ERR_COUNTERS 1 130342957Sdillon#define SPC_GET_SAS_PHY_ERR_COUNTERS_CLR 2 130442957Sdillon#define SPC_GET_SAS_PHY_BW_COUNTERS 3 130542957Sdillon 130642957Sdillon 130742957Sdillon/** \brief the data structure of FW_FLASH_UPDATE Response 130843136Sdillon * 130943136Sdillon * use to describe MPI FW_FLASH_UPDATE Response (64 bytes) 131043136Sdillon * 1311241155Salc */ 1312254141Sattiliotypedef struct agsaFwFlashUpdateRsp_s { 13131541Srgrimes bit32 tag; 1314254141Sattilio bit32 status; 131579248Sdillon bit32 reserved[13]; 13161541Srgrimes} agsaFwFlashUpdateRsp_t; 1317254141Sattilio 1318254141Sattilio#ifdef SPC_ENABLE_PROFILE 13195455Sdgtypedef struct agsaFwProfileRsp_s { 1320254141Sattilio bit32 tag; 1321254141Sattilio bit32 status; 1322254141Sattilio bit32 len; 1323254141Sattilio bit32 reserved[12]; 1324254141Sattilio} agsaFwProfileRsp_t; 1325254141Sattilio#endif 1326254141Sattilio/** \brief the data structure of GPIO Response 1327254141Sattilio * 1328254141Sattilio * use to describe MPI GPIO Response (64 bytes) 1329254141Sattilio */ 1330254141Sattiliotypedef struct agsaGPIORsp_s { 1331254141Sattilio bit32 tag; 1332254141Sattilio bit32 reserved[2]; 1333254141Sattilio bit32 GpioRdVal; 1334254141Sattilio bit32 GpioIe; 1335254141Sattilio bit32 OT11_0; 1336254141Sattilio bit32 OT19_12; 1337254141Sattilio bit32 GPIEVChange; 1338254141Sattilio bit32 GPIEVRise; 1339254141Sattilio bit32 GPIEVFall; 1340254141Sattilio bit32 reserved1[5]; 1341254141Sattilio} agsaGPIORsp_t; 1342254141Sattilio 1343254141Sattilio/** \brief the data structure of GPIO Event 134413490Sdyson * 1345254141Sattilio * use to describe MPI GPIO Event Response (64 bytes) 1346254141Sattilio */ 1347254141Sattiliotypedef struct agsaGPIOEvent_s { 1348254141Sattilio bit32 GpioEvent; 1349254141Sattilio bit32 reserved[14]; 1350254141Sattilio} agsaGPIOEvent_t; 135143136Sdillon 1352254141Sattilio/** \brief the data structure of GENERAL_EVENT Response 13531541Srgrimes * 13541541Srgrimes * use to describe MPI GENERNAL_EVENT Notification (64 bytes) 13556816Sdg * 1356172341Salc */ 1357172341Salctypedef struct agsaGenernalEventRsp_s { 1358172341Salc bit32 status; 1359172341Salc bit32 inboundIOMB[14]; 1360172341Salc} agsaGenernalEventRsp_t; 1361172341Salc 1362172317Salc/** \brief the data structure of SSP_ABORT Response 1363172317Salc * 1364172341Salc * use to describe MPI SSP_ABORT (64 bytes) 1365172317Salc * 1366248449Sattilio */ 1367172317Salctypedef struct agsaSSPAbortRsp_s { 1368172317Salc bit32 tag; 1369172317Salc bit32 status; 1370248449Sattilio bit32 scp; 1371172341Salc bit32 reserved[12]; 1372172341Salc} agsaSSPAbortRsp_t; 1373172341Salc 1374248449Sattilio/** \brief the data structure of SATA_ABORT Response 1375248449Sattilio * 1376248449Sattilio * use to describe MPI SATA_ABORT (64 bytes) 1377248449Sattilio * 1378254141Sattilio */ 1379172317Salctypedef struct agsaSATAAbortRsp_s { 1380248449Sattilio bit32 tag; 1381172317Salc bit32 status; 1382172341Salc bit32 scp; 1383172317Salc bit32 reserved[12]; 1384172317Salc} agsaSATAAbortRsp_t; 1385172317Salc 1386172317Salc/** \brief the data structure of SAS Diagnostic Start/End Response 1387172317Salc * 1388172317Salc * use to describe MPI SAS Diagnostic Start/End Response (64 bytes) 138942026Sdillon * 1390172317Salc */ 1391172317Salctypedef struct agsaSASDiagStartEndRsp_s { 1392172317Salc bit32 tag; 1393172317Salc bit32 Status; 1394172317Salc bit32 reserved[13]; 1395172317Salc} agsaSASDiagStartEndRsp_t; 1396172317Salc 1397248449Sattilio/** \brief the data structure of SAS Diagnostic Execute Response 1398172317Salc * 1399172317Salc * use to describe MPI SAS Diagnostic Execute Response (64 bytes) 1400172317Salc * 1401172317Salc */ 1402172317Salctypedef struct agsaSASDiagExecuteRsp_s { 140342026Sdillon bit32 tag; 1404172317Salc bit32 CmdTypeDescPhyId; 140534206Sdyson bit32 Status; 1406233960Sattilio bit32 ReportData; 1407172317Salc bit32 reserved[11]; 140834206Sdyson} agsaSASDiagExecuteRsp_t; 140934206Sdyson 1410172317Salc/** \brief the data structure of General Event Notification Response 1411172317Salc * 1412172317Salc * use to describe MPI General Event Notification Response (64 bytes) 1413248449Sattilio * 1414172317Salc */ 1415172317Salctypedef struct agsaGeneralEventRsp_s { 1416172317Salc bit32 status; 1417172317Salc bit32 inbIOMBpayload[14]; 1418172317Salc} agsaGeneralEventRsp_t; 1419172317Salc 1420172317Salc#define GENERAL_EVENT_PAYLOAD 14 1421173049Salc#define OPCODE_BITS 0x00000fff 1422173049Salc 1423173049Salc/* 1424172317SalcTable 171 GENERAL_EVENT Notification Status Field Codes 1425172317SalcValue Name Description 1426172317Salc*/ 1427172317Salc#define GEN_EVENT_IOMB_V_BIT_NOT_SET 0x01 /* INBOUND_ Inbound IOMB is received with the V bit in the IOMB header not set. */ 1428172317Salc#define GEN_EVENT_INBOUND_IOMB_OPC_NOT_SUPPORTED 0x02 /* Inbound IOMB is received with an unsupported OPC. */ 1429172317Salc#define GEN_EVENT_IOMB_INVALID_OBID 0x03 /* INBOUND Inbound IOMB is received with an invalid OBID. */ 1430172317Salc#define GEN_EVENT_DS_IN_NON_OPERATIONAL 0x39 /* DEVICE_HANDLE_ACCEPT command failed due to the device being in DS_NON_OPERATIONAL state. */ 1431172317Salc#define GEN_EVENT_DS_IN_RECOVERY 0x3A /* DEVICE_HANDLE_ACCEPT command failed due to device being in DS_IN_RECOVERY state. */ 1432172317Salc#define GEN_EVENT_DS_INVALID 0x49 /* DEVICE_HANDLE_ACCEPT command failed due to device being in DS_INVALID state. */ 1433248449Sattilio 1434172317Salc#define GEN_EVENT_IO_XFER_READ_COMPL_ERR 0x50 /* Indicates the PCIe Read Request to fetch one or more inbound IOMBs received 1435172317Salc a failed completion response. The first and second Dwords of the 1436172317Salc INBOUND IOMB field ( Dwords 2 and 3) contains information to identifying 1437172317Salc the location in the inbound queue where the error occurred. 1438172317Salc Dword 2 bits[15:0] contains the inbound queue number. 1439172317Salc Dword 2 bits[31:16] specifies how many consecutive IOMBs were affected 1440248084Sattilio by the failed DMA. 1441248449Sattilio Dword 3 specifies the Consumer Index [CI] of the inbound queue where 1442172317Salc the DMA operation failed.*/ 1443172317Salc 1444172317Salc/** \brief the data structure of SSP Request Received Notification 1445248449Sattilio * 1446248449Sattilio * use to describe MPI SSP Request Received Notification ( 1024 bytes) 1447172317Salc * 1448172317Salc */ 1449172317Salctypedef struct agsaSSPReqReceivedNotify_s { 1450172317Salc bit32 deviceId; 1451172317Salc bit32 iniTagSSPIul; 1452248449Sattilio bit32 frameTypeHssa; 1453248449Sattilio bit32 TlrHdsa; 1454248449Sattilio bit32 SSPIu[251]; 1455248449Sattilio} agsaSSPReqReceivedNotify_t; 1456248449Sattilio 1457248449Sattilio#define SSPIUL_BITS 0x0000FFFF 1458254141Sattilio#define INITTAG_BITS 0x0000FFFF 1459254141Sattilio#define FRAME_TYPE 0x000000FF 146034206Sdyson#define TLR_BITS 0x00000300 1461172317Salc 146234206Sdyson/** \brief the data structure of Device Handle Arrived Notification 146334206Sdyson * 146434206Sdyson * use to describe MPI Device Handle Arrived Notification ( 64 bytes) 1465234039Salc * 1466234039Salc */ 1467234039Salctypedef struct agsaDeviceHandleArrivedNotify_s { 1468234039Salc bit32 CTag; 1469234039Salc bit32 HostAssignedIdFwdDeviceId; 1470234039Salc bit32 ProtConrPortId; 1471234039Salc bit8 sasAddrHi[4]; 1472234039Salc bit8 sasAddrLow[4]; 1473234039Salc bit32 reserved[10]; 1474234039Salc 1475234039Salc} agsaDeviceHandleArrivedNotify_t; 1476234039Salc 1477234039Salc 1478234039Salc#define Conrate_V_MASK 0x0000F000 1479234039Salc#define Conrate_V_SHIFT 12 1480234039Salc#define Conrate_SPC_MASK 0x0000F000 1481234039Salc#define Conrate_SPC_SHIFT 4 1482248084Sattilio 1483248082Sattilio#define Protocol_SPC_MASK 0x00000700 1484234039Salc#define Protocol_SPC_SHIFT 8 1485234039Salc#define Protocol_SPC_MASK 0x00000700 1486234039Salc#define Protocol_SPC_SHIFT 8 1487234039Salc 1488234039Salc#define PortId_V_MASK 0xFF 1489234039Salc#define PortId_SPC_MASK 0x0F 1490234039Salc 1491234039Salc#define PROTOCOL_BITS 0x00000700 14921541Srgrimes#define PROTOCOL_SHIFT 8 14931541Srgrimes 1494226848Salc#define SHIFT_REG_64K_MASK 0xffff0000 1495254138Sattilio#define SHIFT_REG_BIT_SHIFT 8 14961541Srgrimes#define SPC_GSM_SM_OFFSET 0x400000 1497209669Salc#define SPCV_GSM_SM_OFFSET 0x0 1498209669Salc 1499209669Salc/** \brief the data structure of Get Time Stamp Response 15006816Sdg * 15016816Sdg * use to describe MPI Get TIme Stamp Response ( 64 bytes) 15026816Sdg * 1503209669Salc */ 1504209669Salctypedef struct agsaGetTimeStampRsp_s { 1505227127Salc bit32 tag; 1506227127Salc bit32 timeStampLower; 1507209669Salc bit32 timeStampUpper; 1508204415Skib bit32 reserved[12]; 1509204415Skib} agsaGetTimeStampRsp_t; 1510254138Sattilio 1511230623Skmacy/** \brief the data structure of SAS HW Event Ack Response 1512226848Salc * 1513254138Sattilio * use to describe SAS HW Event Ack Response ( 64 bytes) 1514254138Sattilio * 1515226848Salc */ 1516226848Salctypedef struct agsaSASHwEventAckRsp_s { 15175841Sdg bit32 tag; 1518204415Skib bit32 status; 15191541Srgrimes bit32 reserved[13]; 15201549Srgrimes} agsaSASHwEventAckRsp_t; 1521100276Salc 15221541Srgrimes/** \brief the data structure of Port Control Response 1523172317Salc * 1524172317Salc * use to describe Port Control Response ( 64 bytes) 1525250577Salc * 1526227127Salc */ 15271541Srgrimestypedef struct agsaPortControlRsp_s { 1528250594Speter bit32 tag; 1529254138Sattilio bit32 portOPPortId; 1530254138Sattilio bit32 status; 1531254138Sattilio bit32 rsvdPortState; 1532254138Sattilio bit32 reserved[11]; 1533254138Sattilio} agsaPortControlRsp_t; 1534254138Sattilio 1535227127Salc/** \brief the data structure of SMP Abort Response 1536248084Sattilio * 1537106276Sjeff * use to describe SMP Abort Response ( 64 bytes) 1538227127Salc * 1539217477Salc */ 154042957Sdillontypedef struct agsaSMPAbortRsp_s { 1541227127Salc bit32 tag; 154242957Sdillon bit32 status; 1543227127Salc bit32 scp; 1544227127Salc bit32 reserved[12]; 15458876Srgrimes} agsaSMPAbortRsp_t; 1546250577Salc 1547250577Salc/** \brief the data structure of Get NVMD Data Response 1548250577Salc * 1549250577Salc * use to describe MPI Get NVMD Data Response (64 bytes) 1550250577Salc * 1551254141Sattilio */ 1552254141Sattiliotypedef struct agsaGetNVMDataRsp_s { 1553254141Sattilio bit32 tag; 1554254141Sattilio bit32 iRTdaBnDpsAsNvm; 1555254141Sattilio bit32 DlenStatus; 1556254141Sattilio bit32 NVMData[12]; 1557254141Sattilio} agsaGetNVMDataRsp_t; 1558172317Salc 1559227606Salc/** \brief the data structure of Set NVMD Data Response 1560172317Salc * 1561227127Salc * use to describe MPI Set NVMD Data Response (64 bytes) 1562172317Salc * 156344051Sdillon */ 1564108963Salctypedef struct agsaSetNVMDataRsp_s { 1565108963Salc bit32 tag; 156644051Sdillon bit32 iPTdaBnDpsAsNvm; 1567172317Salc bit32 status; 1568172317Salc bit32 reserved[12]; 1569172317Salc} agsaSetNVMDataRsp_t; 1570166508Salc 1571155737Sups/** \brief the data structure of Device Handle Removal 1572155737Sups * 1573174821Salc * use to describe MPI Device Handle Removel Notification (64 bytes) 1574174821Salc * 1575174982Salc */ 1576174982Salctypedef struct agsaDeviceHandleRemoval_s { 1577174982Salc bit32 portId; 1578174821Salc bit32 deviceId; 1579174982Salc bit32 reserved[13]; 1580174821Salc} agsaDeviceHandleRemoval_t; 1581174821Salc 1582172317Salc/** \brief the data structure of Set Device State Response 1583172317Salc * 1584172317Salc * use to describe MPI Set Device State Response (64 bytes) 1585174982Salc * 1586244043Salc */ 1587250577Salctypedef struct agsaSetDeviceStateRsp_s { 1588250577Salc bit32 tag; 1589174982Salc bit32 status; 1590174982Salc bit32 deviceId; 1591174982Salc bit32 pds_nds; 1592171451Salc bit32 reserved[11]; 1593170816Salc} agsaSetDeviceStateRsp_t; 1594174982Salc 1595177956Salc#define NDS_BITS 0x0F 1596174982Salc#define PDS_BITS 0xF0 1597174982Salc 1598174982Salc/** \brief the data structure of Get Device State Response 1599174982Salc * 1600174982Salc * use to describe MPI Get Device State Response (64 bytes) 1601174982Salc * 160244051Sdillon */ 160344051Sdillontypedef struct agsaGetDeviceStateRsp_s { 1604172317Salc bit32 tag; 160544051Sdillon bit32 status; 1606166508Salc bit32 deviceId; 1607209861Salc bit32 ds; 1608227127Salc bit32 reserved[11]; 160944051Sdillon} agsaGetDeviceStateRsp_t; 161044051Sdillon 16111549Srgrimes/** \brief the data structure of Set Device Info Response 16121541Srgrimes * 161344051Sdillon * use to describe MPI Set Device Info Response (64 bytes) 161444051Sdillon * 161544051Sdillon */ 1616194562Salctypedef struct agsaSetDeviceInfoRsp_s { 1617195649Salc bit32 tag; 1618195649Salc bit32 status; 1619194562Salc bit32 deviceId; 1620194562Salc bit32 SA_SR_SI; 1621308349Smarkj bit32 A_R_ITNT; 1622194562Salc bit32 reserved[10]; 1623195649Salc} agsaSetDeviceInfoRsp_t; 1624195649Salc 1625195649Salc/** \brief the data structure of SAS Re_Initialize Response 1626172317Salc * 1627227127Salc * use to describe MPI SAS RE_INITIALIZE Response (64 bytes) 1628227127Salc * 1629172317Salc */ 1630172317Salctypedef struct agsaSasReInitializeRsp_s { 1631172317Salc bit32 tag; 1632172317Salc bit32 status; 1633172317Salc bit32 setFlags; 1634172317Salc bit32 MaxPorts; 1635172317Salc bit32 openRejReCmdData; 1636172317Salc bit32 sataHOLTMO; 1637248082Sattilio bit32 reserved[9]; 1638248082Sattilio} agsaSasReInitializeRsp_t; 1639172317Salc 1640172317Salc/** \brief the data structure of SGPIO Response 1641172317Salc * 1642172317Salc * use to describe MPI serial GPIO Response IOMB (64 bytes) 1643172317Salc * 1644172317Salc */ 1645254065Skibtypedef struct agsaSGpioRsp_s { 1646172317Salc bit32 tag; 164744051Sdillon bit32 resultFunctionFrameType; 164842957Sdillon bit32 readData[OSSA_SGPIO_MAX_READ_DATA_COUNT]; 1649218113Salc} agsaSGpioRsp_t; 1650218113Salc 165144051Sdillon 1652163604Salc/** \brief the data structure of PCIe diag response 165343752Sdillon * 165442957Sdillon * use to describe PCIe diag response IOMB (64 bytes) 1655109151Salc * 1656163604Salc */ 165713490Sdyson 1658243366Salctypedef struct agsaPCIeDiagExecuteRsp_s { 1659243366Salc bit32 tag; /* 1 */ 1660163604Salc bit32 CmdTypeDesc; /* 2 */ 1661218113Salc bit32 Status; /* 3 */ 1662225418Skib bit32 reservedDW4; /* 4 */ 1663244043Salc bit32 reservedDW5; /* 5 */ 1664244043Salc bit32 ERR_BLKH; /* 6 */ 1665254138Sattilio bit32 ERR_BLKL; /* 7 */ 1666254138Sattilio bit32 DWord8; /* 8 */ 1667254138Sattilio bit32 DWord9; /* 9 */ 1668254138Sattilio bit32 DWord10; /* 10 */ 1669254138Sattilio bit32 DWord11; /* 11 */ 1670100276Salc bit32 DIF_ERR; /* 12 */ 1671218113Salc bit32 reservedDW13; /* 13 */ 1672218113Salc bit32 reservedDW14; /* 14 */ 1673218113Salc bit32 reservedDW15; /* 15 */ 1674218113Salc} agsaPCIeDiagExecuteRsp_t; 1675170170Sattilio 1676100276Salc/** \brief the data structure of PCI diag response 1677194562Salc * 167816750Sdyson * use to describe PCI diag response IOMB for SPC (64 bytes) 16795465Sdg * 1680195649Salc */ 1681254141Sattilio 1682254141Sattiliotypedef struct agsa_SPC_PCIeDiagExecuteRsp_s { 1683254141Sattilio bit32 tag; /* 1 */ 1684254141Sattilio bit32 CmdTypeDesc; /* 2 */ 1685254141Sattilio bit32 Status; /* 3 */ 1686254362Sattilio bit32 reserved[12]; /* 4 15 */ 1687254362Sattilio} agsa_SPC_PCIeDiagExecuteRsp_t; 1688254362Sattilio 1689254362Sattilio/** \brief the data structure of GET DFE Data Response 1690254141Sattilio * 1691283598Skib * use to describe GET DFE Data Response for SPCv (64 bytes) 1692302923Smarkj * 1693254141Sattilio */ 1694254141Sattiliotypedef struct agsaGetDDEFDataRsp_s { 1695254141Sattilio bit32 tag; /* 1 */ 1696254141Sattilio bit32 status; /* 2 */ 1697195749Salc bit32 reserved_In_Ln;/* 3 */ 1698195749Salc bit32 MCNT; /* 4 */ 1699244043Salc bit32 NBT; /* 5 */ 1700195649Salc bit32 reserved[10]; /* 6 - 15 */ 1701195649Salc} agsaGetDDEFDataRsp_t; 1702120326Salc 17035465Sdg/** \brief the data structure of GET Vis Data Response 17046816Sdg * 1705172317Salc * use to describe GET Vis Data Response for SPCv (64 bytes) 1706172317Salc * 1707172317Salc */ 1708172317Salctypedef struct agsaGetVHistCapRsp_s { 1709172317Salc bit32 tag; /* 1 */ 1710172317Salc bit32 status; /* 2 */ 1711172317Salc bit32 channel; /* 3 */ 1712172317Salc bit32 BistLo; /* 4 */ 1713172317Salc bit32 BistHi; /* 5 */ 17146816Sdg bit32 BytesXfered; /* 6 */ 17156816Sdg bit32 PciLo; /* 7 */ 17166816Sdg bit32 PciHi; /* 8 */ 171768885Sdillon bit32 PciBytecount; /* 9 */ 17186816Sdg bit32 reserved[5]; /* 10 - 15 */ 17191541Srgrimes} agsaGetVHistCapRsp_t; 172013490Sdyson 17211541Srgrimestypedef struct agsaSetControllerConfigCmd_s { 17221541Srgrimes bit32 tag; 1723254182Skib bit32 pageCode; 1724254182Skib bit32 configPage[13]; /* Page code specific fields */ 1725254182Skib} agsaSetControllerConfigCmd_t; 1726254182Skib 1727254182Skib 1728254182Skibtypedef struct agsaSetControllerConfigRsp_s { 1729254182Skib bit32 tag; 1730254182Skib bit32 status; 1731254182Skib bit32 errorQualifierPage; 1732254182Skib bit32 reserved[12]; 173342026Sdillon} agsaSetControllerConfigRsp_t; 1734227568Salc 1735227568Salctypedef struct agsaGetControllerConfigCmd_s { 1736227568Salc bit32 tag; 1737227568Salc bit32 pageCode; 1738227568Salc bit32 INT_VEC_MSK0; 1739227568Salc bit32 INT_VEC_MSK1; 1740227568Salc bit32 reserved[11]; 1741227568Salc} agsaGetControllerConfigCmd_t; 1742227568Salc 1743227568Salctypedef struct agsaGetControllerConfigRsp_s { 1744227568Salc bit32 tag; 1745227568Salc bit32 status; 1746227568Salc bit32 errorQualifier; 1747227568Salc bit32 configPage[12]; /* Page code specific fields */ 1748227568Salc} agsaGetControllerConfigRsp_t; 1749227568Salc 1750227568Salctypedef struct agsaDekManagementCmd_s { 1751227568Salc bit32 tag; 1752227568Salc bit32 KEKIDX_Reserved_TBLS_DSOP; 1753227568Salc bit32 dekIndex; 1754227568Salc bit32 tableAddrLo; 1755227568Salc bit32 tableAddrHi; 1756227568Salc bit32 tableEntries; 1757227568Salc bit32 Reserved_DBF_TBL_SIZE; 1758227568Salc} agsaDekManagementCmd_t; 1759227568Salc 1760227568Salctypedef struct agsaDekManagementRsp_s { 1761227568Salc bit32 tag; 1762254138Sattilio bit32 status; 1763288300Salc bit32 flags; 1764227568Salc bit32 dekIndex; 1765254138Sattilio bit32 errorQualifier; 1766254138Sattilio bit32 reserved[12]; 1767227568Salc} agsaDekManagementRsp_t; 1768227568Salc 1769227568Salctypedef struct agsaKekManagementCmd_s { 1770227568Salc bit32 tag; 1771227568Salc bit32 NEWKIDX_CURKIDX_KBF_Reserved_SKNV_KSOP; 1772227568Salc bit32 reserved; 1773227568Salc bit32 kekBlob[12]; 1774227568Salc} agsaKekManagementCmd_t; 1775227568Salc 1776227568Salctypedef struct agsaKekManagementRsp_s { 1777227568Salc bit32 tag; 1778254182Skib bit32 status; 1779254182Skib bit32 flags; 1780227568Salc bit32 errorQualifier; 1781227568Salc bit32 reserved[12]; 1782227568Salc} agsaKekManagementRsp_t; 1783254138Sattilio 1784254138Sattilio 1785254138Sattiliotypedef struct agsaCoalSspComplCxt_s { 1786254138Sattilio bit32 tag; 1787254138Sattilio bit16 SSPTag; 1788254138Sattilio bit16 reserved; 1789227568Salc} agsaCoalSspComplCxt_t; 1790248084Sattilio 1791227568Salc/** \brief the data structure of SSP Completion Response 1792227568Salc * 1793227568Salc * use to describe MPI SSP Completion Response (1024 bytes) 1794227568Salc * 1795227568Salc */ 1796227568Salctypedef struct agsaSSPCoalescedCompletionRsp_s { 1797227568Salc bit32 coalescedCount; 1798227568Salc agsaCoalSspComplCxt_t sspComplCxt[1]; /* Open ended array */ 1799227568Salc} agsaSSPCoalescedCompletionRsp_t; 1800227568Salc 1801227568Salc 1802227568Salc/** \brief the data structure of SATA Completion Response 1803227568Salc * 1804254182Skib * use to describe MPI SATA Completion Response (1024 bytes) 1805227568Salc * 1806227568Salc */ 1807227568Salctypedef struct agsaCoalStpComplCxt_s { 1808227568Salc bit32 tag; 1809227568Salc bit16 reserved; 1810227568Salc} agsaCoalStpComplCxt_t; 1811227568Salc 1812227568Salctypedef struct agsaSATACoalescedCompletionRsp_s { 1813228287Salc bit32 coalescedCount; 1814228287Salc agsaCoalStpComplCxt_t stpComplCxt[1]; /* Open ended array */ 1815228287Salc} agsaSATACoalescedCompletionRsp_t; 1816227568Salc 1817228287Salc 1818228287Salc/** \brief the data structure of Operator Mangement Command 1819227568Salc * 1820227568Salc * use to describe OPR_MGMT Command (128 bytes) 1821227568Salc * 1822227568Salc */ 1823227568Salctypedef struct agsaOperatorMangmentCmd_s{ 1824227568Salc bit32 tag; /* 1 */ 1825227568Salc bit32 OPRIDX_AUTIDX_R_KBF_PKT_OMO;/* 2 */ 1826227568Salc bit8 IDString_Role[32]; /* 3 10 */ 1827227568Salc#ifndef HAILEAH_HOST_6G_COMPITIBILITY_FLAG 1828227568Salc agsaEncryptKekBlob_t Kblob; /* 11 22 */ 1829227568Salc#endif 1830227568Salc bit32 reserved[8]; /* 23 31 */ 1831227568Salc} agsaOperatorMangmentCmd_t; 1832254182Skib 1833254182Skib 1834254182Skib/* 1835227568Salc * 1836227568Salc * use to describe OPR_MGMT Response (64 bytes) 1837227568Salc * 1838227568Salc */ 1839228287Salctypedef struct agsaOperatorMangmentRsp_s { 1840228287Salc bit32 tag; /* 1 */ 1841227568Salc bit32 status; /* 2 */ 1842227568Salc bit32 OPRIDX_AUTIDX_R_OMO; /* 3 */ 1843227568Salc bit32 errorQualifier; /* 4 */ 1844227568Salc bit32 reserved[10]; /* 5 15 */ 1845227568Salc} agsaOperatorMangmenRsp_t; 1846227568Salc 1847227568Salc/** \brief the data structure of Set Operator Command 1848227568Salc * 1849227568Salc * use to describe Set Operator Command (64 bytes) 1850227568Salc * 1851227568Salc */ 1852227568Salctypedef struct agsaSetOperatorCmd_s{ 1853227568Salc bit32 tag; /* 1 */ 1854230623Skmacy bit32 OPRIDX_PIN_ACS; /* 2 */ 1855230623Skmacy bit32 cert[10]; /* 3 12 */ 1856227568Salc bit32 reserved[3]; /* 13 15 */ 1857227568Salc} agsaSetOperatorCmd_t; 1858227568Salc 1859227568Salc/* 1860227568Salc * 1861227568Salc * use to describe Set Operator Response (64 bytes) 1862227568Salc * 1863227568Salc */ 1864227568Salctypedef struct agsaSetOperatorRsp_s { 1865227568Salc bit32 tag; /* 1 */ 1866238543Salc bit32 status; /* 2 */ 1867254138Sattilio bit32 ERR_QLFR_OPRIDX_PIN_ACS;/* 3 */ 1868254138Sattilio bit32 reserved[12]; /* 4 15 */ 1869254138Sattilio} agsaSetOperatorRsp_t; 1870254138Sattilio 1871254138Sattilio/** \brief the data structure of Get Operator Command 1872254138Sattilio * 1873254138Sattilio * use to describe Get Operator Command (64 bytes) 1874227568Salc * 1875227568Salc */ 1876227568Salctypedef struct agsaGetOperatorCmd_s{ 1877227568Salc bit32 tag; /* 1 */ 1878254141Sattilio bit32 option; /* 2 */ 1879254141Sattilio bit32 OprBufAddrLo; /* 3 */ 1880254182Skib bit32 OprBufAddrHi; /* 4*/ 1881254182Skib bit32 reserved[11]; /*5 15*/ 1882254141Sattilio} agsaGetOperatorCmd_t; 1883254141Sattilio 1884254362Sattilio/* 1885254362Sattilio * 1886254362Sattilio * use to describe Get Operator Response (64 bytes) 1887254228Sattilio * 1888254141Sattilio */ 1889254362Sattiliotypedef struct agsaGetOperatorRsp_s { 1890254362Sattilio bit32 tag; /* 1 */ 1891301098Skib bit32 status; /* 2 */ 1892254141Sattilio bit32 Num_Option; /* 3 */ 1893301098Skib bit32 IDString[8]; /* 4 11*/ 1894301098Skib bit32 reserved[4]; /* 12 15*/ 1895302923Smarkj} agsaGetOperatorRsp_t; 1896254141Sattilio 1897254141Sattilio/* 1898254141Sattilio * 1899254141Sattilio * use to start Encryption BIST (128 bytes) 1900254141Sattilio * 0x105 1901254141Sattilio */ 1902227568Salctypedef struct agsaEncryptBist_s { 1903227568Salc bit32 tag; /* 1 */ 1904227568Salc bit32 r_subop; /* 2 */ 1905227568Salc bit32 testDiscption[28]; /* 3 31 */ 1906254182Skib} agsaEncryptBist_t; 1907227568Salc 1908227568Salc/* 1909227568Salc * 1910227568Salc * use to describe Encryption BIST Response (64 bytes) 1911227568Salc * 0x905 1912227568Salc */ 1913210327Sjchandra 1914210327Sjchandratypedef struct agsaEncryptBistRsp_s { 1915210327Sjchandra bit32 tag; /* 1 */ 1916227012Salc bit32 status; /* 2 */ 1917227012Salc bit32 subop; /* 3 */ 1918210327Sjchandra bit32 testResults[11]; /* 4 15 */ 1919210327Sjchandra} agsaEncryptBistRsp_t; 1920227568Salc 1921210327Sjchandra/** \brief the data structure of DifEncOffload Command 1922210327Sjchandra * 1923210327Sjchandra * use to describe Set DifEncOffload Command (128 bytes) 1924210327Sjchandra * 1925210327Sjchandra */ 1926210327Sjchandratypedef struct agsaDifEncOffloadCmd_s{ 1927210327Sjchandra bit32 tag; /* 1 */ 1928210327Sjchandra bit32 option; /* 2 */ 1929210327Sjchandra bit32 reserved[2]; /* 3-4 */ 1930210327Sjchandra bit32 Src_Data_Len; /* 5 */ 1931210327Sjchandra bit32 Dst_Data_Len; /* 6 */ 1932210327Sjchandra bit32 flags; /* 7 */ 1933308349Smarkj bit32 UDTR01UDT01; /* 8 */ 1934210327Sjchandra bit32 UDT2345; /* 9 */ 1935210327Sjchandra bit32 UDTR2345; /* 10 */ 1936210327Sjchandra bit32 DPLR0SecCnt_IOSeed; /* 11 */ 1937210327Sjchandra bit32 DPL_Addr_Lo; /* 12 */ 1938210327Sjchandra bit32 DPL_Addr_Hi; /* 13 */ 1939210327Sjchandra bit32 KeyIndex_CMode_KTS_ENT_R; /* 14 */ 1940210327Sjchandra bit32 EPLR0SecCnt_KS_ENSS; /* 15 */ 1941210327Sjchandra bit32 keyTag_W0; /* 16 */ 1942210327Sjchandra bit32 keyTag_W1; /* 17 */ 1943227012Salc bit32 tweakVal_W0; /* 18 */ 1944227012Salc bit32 tweakVal_W1; /* 19 */ 1945210327Sjchandra bit32 tweakVal_W2; /* 20 */ 1946210327Sjchandra bit32 tweakVal_W3; /* 21 */ 1947210327Sjchandra bit32 EPL_Addr_Lo; /* 22 */ 1948248082Sattilio bit32 EPL_Addr_Hi; /* 23 */ 1949248082Sattilio agsaSgl_t SrcSgl; /* 24-27 */ 1950210327Sjchandra agsaSgl_t DstSgl; /* 28-31 */ 1951210327Sjchandra} agsaDifEncOffloadCmd_t; 1952210327Sjchandra 1953210327Sjchandra/* 1954210327Sjchandra * 1955210327Sjchandra * use to describe DIF/Encryption Offload Response (32 bytes) 1956254065Skib * 0x910 1957227012Salc */ 1958227012Salctypedef struct agsaDifEncOffloadRspV_s { 1959210327Sjchandra bit32 tag; 1960210327Sjchandra bit32 status; 1961224746Skib bit32 ExpectedCRCUDT01; 1962210327Sjchandra bit32 ExpectedUDT2345; 1963210327Sjchandra bit32 ActualCRCUDT01; 1964210327Sjchandra bit32 ActualUDT2345; 1965210327Sjchandra bit32 DIFErr; 1966210327Sjchandra bit32 ErrBoffset; 1967227012Salc} agsaDifEncOffloadRspV_t; 1968227012Salc 1969227012Salc#endif /*__SAMPIDEFS_H__ */ 1970227012Salc