ixv_vf.c revision 315333
1/****************************************************************************** 2 3 Copyright (c) 2001-2017, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32******************************************************************************/ 33/*$FreeBSD: stable/10/sys/dev/ixgbe/ixv_vf.c 315333 2017-03-15 21:20:17Z erj $*/ 34 35 36#include "ixv_vf.h" 37 38#ifndef IXGBE_VFWRITE_REG 39#define IXGBE_VFWRITE_REG IXGBE_WRITE_REG 40#endif 41#ifndef IXGBE_VFREAD_REG 42#define IXGBE_VFREAD_REG IXGBE_READ_REG 43#endif 44 45/** 46 * ixgbe_init_ops_vf - Initialize the pointers for vf 47 * @hw: pointer to hardware structure 48 * 49 * This will assign function pointers, adapter-specific functions can 50 * override the assignment of generic function pointers by assigning 51 * their own adapter-specific function pointers. 52 * Does not touch the hardware. 53 **/ 54s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw) 55{ 56 /* MAC */ 57 hw->mac.ops.init_hw = ixgbe_init_hw_vf; 58 hw->mac.ops.reset_hw = ixgbe_reset_hw_vf; 59 hw->mac.ops.start_hw = ixgbe_start_hw_vf; 60 /* Cannot clear stats on VF */ 61 hw->mac.ops.clear_hw_cntrs = NULL; 62 hw->mac.ops.get_media_type = NULL; 63 hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf; 64 hw->mac.ops.stop_adapter = ixgbe_stop_adapter_vf; 65 hw->mac.ops.get_bus_info = NULL; 66 hw->mac.ops.negotiate_api_version = ixgbevf_negotiate_api_version; 67 68 /* Link */ 69 hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf; 70 hw->mac.ops.check_link = ixgbe_check_mac_link_vf; 71 hw->mac.ops.get_link_capabilities = NULL; 72 73 /* RAR, Multicast, VLAN */ 74 hw->mac.ops.set_rar = ixgbe_set_rar_vf; 75 hw->mac.ops.set_uc_addr = ixgbevf_set_uc_addr_vf; 76 hw->mac.ops.init_rx_addrs = NULL; 77 hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf; 78 hw->mac.ops.update_xcast_mode = ixgbevf_update_xcast_mode; 79 hw->mac.ops.enable_mc = NULL; 80 hw->mac.ops.disable_mc = NULL; 81 hw->mac.ops.clear_vfta = NULL; 82 hw->mac.ops.set_vfta = ixgbe_set_vfta_vf; 83 hw->mac.ops.set_rlpml = ixgbevf_rlpml_set_vf; 84 85 hw->mac.max_tx_queues = 1; 86 hw->mac.max_rx_queues = 1; 87 88 hw->mbx.ops.init_params = ixv_init_mbx_params_vf; 89 90 return IXGBE_SUCCESS; 91} 92 93/* ixgbe_virt_clr_reg - Set register to default (power on) state. 94 * @hw: pointer to hardware structure 95 */ 96static void ixgbe_virt_clr_reg(struct ixgbe_hw *hw) 97{ 98 int i; 99 u32 vfsrrctl; 100 u32 vfdca_rxctrl; 101 u32 vfdca_txctrl; 102 103 /* VRSRRCTL default values (BSIZEPACKET = 2048, BSIZEHEADER = 256) */ 104 vfsrrctl = 0x100 << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT; 105 vfsrrctl |= 0x800 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; 106 107 /* DCA_RXCTRL default value */ 108 vfdca_rxctrl = IXGBE_DCA_RXCTRL_DESC_RRO_EN | 109 IXGBE_DCA_RXCTRL_DATA_WRO_EN | 110 IXGBE_DCA_RXCTRL_HEAD_WRO_EN; 111 112 /* DCA_TXCTRL default value */ 113 vfdca_txctrl = IXGBE_DCA_TXCTRL_DESC_RRO_EN | 114 IXGBE_DCA_TXCTRL_DESC_WRO_EN | 115 IXGBE_DCA_TXCTRL_DATA_RRO_EN; 116 117 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0); 118 119 for (i = 0; i < 7; i++) { 120 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(i), 0); 121 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(i), 0); 122 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), 0); 123 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(i), vfsrrctl); 124 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(i), 0); 125 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(i), 0); 126 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), 0); 127 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(i), 0); 128 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(i), 0); 129 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(i), vfdca_rxctrl); 130 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(i), vfdca_txctrl); 131 } 132 133 IXGBE_WRITE_FLUSH(hw); 134} 135 136/** 137 * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx 138 * @hw: pointer to hardware structure 139 * 140 * Starts the hardware by filling the bus info structure and media type, clears 141 * all on chip counters, initializes receive address registers, multicast 142 * table, VLAN filter table, calls routine to set up link and flow control 143 * settings, and leaves transmit and receive units disabled and uninitialized 144 **/ 145s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw) 146{ 147 /* Clear adapter stopped flag */ 148 hw->adapter_stopped = FALSE; 149 150 return IXGBE_SUCCESS; 151} 152 153/** 154 * ixgbe_init_hw_vf - virtual function hardware initialization 155 * @hw: pointer to hardware structure 156 * 157 * Initialize the hardware by resetting the hardware and then starting 158 * the hardware 159 **/ 160s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw) 161{ 162 s32 status = hw->mac.ops.start_hw(hw); 163 164 hw->mac.ops.get_mac_addr(hw, hw->mac.addr); 165 166 return status; 167} 168 169/** 170 * ixgbe_reset_hw_vf - Performs hardware reset 171 * @hw: pointer to hardware structure 172 * 173 * Resets the hardware by reseting the transmit and receive units, masks and 174 * clears all interrupts. 175 **/ 176s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw) 177{ 178 struct ixgbe_mbx_info *mbx = &hw->mbx; 179 u32 timeout = IXGBE_VF_INIT_TIMEOUT; 180 s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR; 181 u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN]; 182 u8 *addr = (u8 *)(&msgbuf[1]); 183 184 DEBUGFUNC("ixgbevf_reset_hw_vf"); 185 186 /* Call adapter stop to disable tx/rx and clear interrupts */ 187 hw->mac.ops.stop_adapter(hw); 188 189 /* reset the api version */ 190 hw->api_version = ixgbe_mbox_api_10; 191 192 DEBUGOUT("Issuing a function level reset to MAC\n"); 193 194 IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST); 195 IXGBE_WRITE_FLUSH(hw); 196 197 msec_delay(50); 198 199 /* we cannot reset while the RSTI / RSTD bits are asserted */ 200 while (!mbx->ops.check_for_rst(hw, 0) && timeout) { 201 timeout--; 202 usec_delay(5); 203 } 204 205 if (!timeout) 206 return IXGBE_ERR_RESET_FAILED; 207 208 /* Reset VF registers to initial values */ 209 ixgbe_virt_clr_reg(hw); 210 211 /* mailbox timeout can now become active */ 212 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT; 213 214 msgbuf[0] = IXGBE_VF_RESET; 215 mbx->ops.write_posted(hw, msgbuf, 1, 0); 216 217 msec_delay(10); 218 219 /* 220 * set our "perm_addr" based on info provided by PF 221 * also set up the mc_filter_type which is piggy backed 222 * on the mac address in word 3 223 */ 224 ret_val = mbx->ops.read_posted(hw, msgbuf, 225 IXGBE_VF_PERMADDR_MSG_LEN, 0); 226 if (ret_val) 227 return ret_val; 228 229 if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK) && 230 msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_NACK)) 231 return IXGBE_ERR_INVALID_MAC_ADDR; 232 233 if (msgbuf[0] == (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK)) 234 memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 235 236 hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD]; 237 238 return ret_val; 239} 240 241/** 242 * ixgbe_stop_adapter_vf - Generic stop Tx/Rx units 243 * @hw: pointer to hardware structure 244 * 245 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, 246 * disables transmit and receive units. The adapter_stopped flag is used by 247 * the shared code and drivers to determine if the adapter is in a stopped 248 * state and should not touch the hardware. 249 **/ 250s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw) 251{ 252 u32 reg_val; 253 u16 i; 254 255 /* 256 * Set the adapter_stopped flag so other driver functions stop touching 257 * the hardware 258 */ 259 hw->adapter_stopped = TRUE; 260 261 /* Clear interrupt mask to stop from interrupts being generated */ 262 IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK); 263 264 /* Clear any pending interrupts, flush previous writes */ 265 IXGBE_VFREAD_REG(hw, IXGBE_VTEICR); 266 267 /* Disable the transmit unit. Each queue must be disabled. */ 268 for (i = 0; i < hw->mac.max_tx_queues; i++) 269 IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), IXGBE_TXDCTL_SWFLSH); 270 271 /* Disable the receive unit by stopping each queue */ 272 for (i = 0; i < hw->mac.max_rx_queues; i++) { 273 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i)); 274 reg_val &= ~IXGBE_RXDCTL_ENABLE; 275 IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val); 276 } 277 /* Clear packet split and pool config */ 278 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0); 279 280 /* flush all queues disables */ 281 IXGBE_WRITE_FLUSH(hw); 282 msec_delay(2); 283 284 return IXGBE_SUCCESS; 285} 286 287/** 288 * ixgbe_mta_vector - Determines bit-vector in multicast table to set 289 * @hw: pointer to hardware structure 290 * @mc_addr: the multicast address 291 * 292 * Extracts the 12 bits, from a multicast address, to determine which 293 * bit-vector to set in the multicast table. The hardware uses 12 bits, from 294 * incoming rx multicast addresses, to determine the bit-vector to check in 295 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set 296 * by the MO field of the MCSTCTRL. The MO field is set during initialization 297 * to mc_filter_type. 298 **/ 299static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr) 300{ 301 u32 vector = 0; 302 303 switch (hw->mac.mc_filter_type) { 304 case 0: /* use bits [47:36] of the address */ 305 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4)); 306 break; 307 case 1: /* use bits [46:35] of the address */ 308 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5)); 309 break; 310 case 2: /* use bits [45:34] of the address */ 311 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6)); 312 break; 313 case 3: /* use bits [43:32] of the address */ 314 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8)); 315 break; 316 default: /* Invalid mc_filter_type */ 317 DEBUGOUT("MC filter type param set incorrectly\n"); 318 ASSERT(0); 319 break; 320 } 321 322 /* vector can only be 12-bits or boundary will be exceeded */ 323 vector &= 0xFFF; 324 return vector; 325} 326 327static s32 ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw, u32 *msg, 328 u32 *retmsg, u16 size) 329{ 330 struct ixgbe_mbx_info *mbx = &hw->mbx; 331 s32 retval = mbx->ops.write_posted(hw, msg, size, 0); 332 333 if (retval) 334 return retval; 335 336 return mbx->ops.read_posted(hw, retmsg, size, 0); 337} 338 339/** 340 * ixgbe_set_rar_vf - set device MAC address 341 * @hw: pointer to hardware structure 342 * @index: Receive address register to write 343 * @addr: Address to put into receive address register 344 * @vmdq: VMDq "set" or "pool" index 345 * @enable_addr: set flag that address is active 346 **/ 347s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 348 u32 enable_addr) 349{ 350 u32 msgbuf[3]; 351 u8 *msg_addr = (u8 *)(&msgbuf[1]); 352 s32 ret_val; 353 UNREFERENCED_3PARAMETER(vmdq, enable_addr, index); 354 355 memset(msgbuf, 0, 12); 356 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR; 357 memcpy(msg_addr, addr, 6); 358 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3); 359 360 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 361 362 /* if nacked the address was rejected, use "perm_addr" */ 363 if (!ret_val && 364 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK))) { 365 ixgbe_get_mac_addr_vf(hw, hw->mac.addr); 366 return IXGBE_ERR_MBX; 367 } 368 369 return ret_val; 370} 371 372/** 373 * ixgbe_update_mc_addr_list_vf - Update Multicast addresses 374 * @hw: pointer to the HW structure 375 * @mc_addr_list: array of multicast addresses to program 376 * @mc_addr_count: number of multicast addresses to program 377 * @next: caller supplied function to return next address in list 378 * 379 * Updates the Multicast Table Array. 380 **/ 381s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list, 382 u32 mc_addr_count, ixgbe_mc_addr_itr next, 383 bool clear) 384{ 385 struct ixgbe_mbx_info *mbx = &hw->mbx; 386 u32 msgbuf[IXGBE_VFMAILBOX_SIZE]; 387 u16 *vector_list = (u16 *)&msgbuf[1]; 388 u32 vector; 389 u32 cnt, i; 390 u32 vmdq; 391 392 UNREFERENCED_1PARAMETER(clear); 393 394 DEBUGFUNC("ixgbe_update_mc_addr_list_vf"); 395 396 /* Each entry in the list uses 1 16 bit word. We have 30 397 * 16 bit words available in our HW msg buffer (minus 1 for the 398 * msg type). That's 30 hash values if we pack 'em right. If 399 * there are more than 30 MC addresses to add then punt the 400 * extras for now and then add code to handle more than 30 later. 401 * It would be unusual for a server to request that many multi-cast 402 * addresses except for in large enterprise network environments. 403 */ 404 405 DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count); 406 407 cnt = (mc_addr_count > 30) ? 30 : mc_addr_count; 408 msgbuf[0] = IXGBE_VF_SET_MULTICAST; 409 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT; 410 411 for (i = 0; i < cnt; i++) { 412 vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq)); 413 DEBUGOUT1("Hash value = 0x%03X\n", vector); 414 vector_list[i] = (u16)vector; 415 } 416 417 return mbx->ops.write_posted(hw, msgbuf, IXGBE_VFMAILBOX_SIZE, 0); 418} 419 420/** 421 * ixgbevf_update_xcast_mode - Update Multicast mode 422 * @hw: pointer to the HW structure 423 * @xcast_mode: new multicast mode 424 * 425 * Updates the Multicast Mode of VF. 426 **/ 427s32 ixgbevf_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode) 428{ 429 u32 msgbuf[2]; 430 s32 err; 431 432 switch (hw->api_version) { 433 case ixgbe_mbox_api_12: 434 case ixgbe_mbox_api_13: 435 break; 436 default: 437 return IXGBE_ERR_FEATURE_NOT_SUPPORTED; 438 } 439 440 msgbuf[0] = IXGBE_VF_UPDATE_XCAST_MODE; 441 msgbuf[1] = xcast_mode; 442 443 err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2); 444 if (err) 445 return err; 446 447 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 448 if (msgbuf[0] == (IXGBE_VF_UPDATE_XCAST_MODE | IXGBE_VT_MSGTYPE_NACK)) 449 return IXGBE_ERR_FEATURE_NOT_SUPPORTED; 450 return IXGBE_SUCCESS; 451} 452 453/** 454 * ixgbe_set_vfta_vf - Set/Unset vlan filter table address 455 * @hw: pointer to the HW structure 456 * @vlan: 12 bit VLAN ID 457 * @vind: unused by VF drivers 458 * @vlan_on: if TRUE then set bit, else clear bit 459 * @vlvf_bypass: boolean flag indicating updating default pool is okay 460 * 461 * Turn on/off specified VLAN in the VLAN filter table. 462 **/ 463s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, 464 bool vlan_on, bool vlvf_bypass) 465{ 466 u32 msgbuf[2]; 467 s32 ret_val; 468 UNREFERENCED_2PARAMETER(vind, vlvf_bypass); 469 470 msgbuf[0] = IXGBE_VF_SET_VLAN; 471 msgbuf[1] = vlan; 472 /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */ 473 msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT; 474 475 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2); 476 if (!ret_val && (msgbuf[0] & IXGBE_VT_MSGTYPE_ACK)) 477 return IXGBE_SUCCESS; 478 479 return ret_val | (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK); 480} 481 482/** 483 * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues 484 * @hw: pointer to hardware structure 485 * 486 * Returns the number of transmit queues for the given adapter. 487 **/ 488u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw) 489{ 490 UNREFERENCED_1PARAMETER(hw); 491 return IXGBE_VF_MAX_TX_QUEUES; 492} 493 494/** 495 * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues 496 * @hw: pointer to hardware structure 497 * 498 * Returns the number of receive queues for the given adapter. 499 **/ 500u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw) 501{ 502 UNREFERENCED_1PARAMETER(hw); 503 return IXGBE_VF_MAX_RX_QUEUES; 504} 505 506/** 507 * ixgbe_get_mac_addr_vf - Read device MAC address 508 * @hw: pointer to the HW structure 509 **/ 510s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr) 511{ 512 int i; 513 514 for (i = 0; i < IXGBE_ETH_LENGTH_OF_ADDRESS; i++) 515 mac_addr[i] = hw->mac.perm_addr[i]; 516 517 return IXGBE_SUCCESS; 518} 519 520s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr) 521{ 522 u32 msgbuf[3], msgbuf_chk; 523 u8 *msg_addr = (u8 *)(&msgbuf[1]); 524 s32 ret_val; 525 526 memset(msgbuf, 0, sizeof(msgbuf)); 527 /* 528 * If index is one then this is the start of a new list and needs 529 * indication to the PF so it can do it's own list management. 530 * If it is zero then that tells the PF to just clear all of 531 * this VF's macvlans and there is no new list. 532 */ 533 msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT; 534 msgbuf[0] |= IXGBE_VF_SET_MACVLAN; 535 msgbuf_chk = msgbuf[0]; 536 if (addr) 537 memcpy(msg_addr, addr, 6); 538 539 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3); 540 if (!ret_val) { 541 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 542 543 if (msgbuf[0] == (msgbuf_chk | IXGBE_VT_MSGTYPE_NACK)) 544 return IXGBE_ERR_OUT_OF_MEM; 545 } 546 547 return ret_val; 548} 549 550/** 551 * ixgbe_setup_mac_link_vf - Setup MAC link settings 552 * @hw: pointer to hardware structure 553 * @speed: new link speed 554 * @autoneg: TRUE if autonegotiation enabled 555 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed 556 * 557 * Set the link speed in the AUTOC register and restarts link. 558 **/ 559s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed, 560 bool autoneg_wait_to_complete) 561{ 562 UNREFERENCED_3PARAMETER(hw, speed, autoneg_wait_to_complete); 563 return IXGBE_SUCCESS; 564} 565 566/** 567 * ixgbe_check_mac_link_vf - Get link/speed status 568 * @hw: pointer to hardware structure 569 * @speed: pointer to link speed 570 * @link_up: TRUE is link is up, FALSE otherwise 571 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed 572 * 573 * Reads the links register to determine if link is up and the current speed 574 **/ 575s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 576 bool *link_up, bool autoneg_wait_to_complete) 577{ 578 struct ixgbe_mbx_info *mbx = &hw->mbx; 579 struct ixgbe_mac_info *mac = &hw->mac; 580 s32 ret_val = IXGBE_SUCCESS; 581 u32 links_reg; 582 u32 in_msg = 0; 583 UNREFERENCED_1PARAMETER(autoneg_wait_to_complete); 584 585 /* If we were hit with a reset drop the link */ 586 if (!mbx->ops.check_for_rst(hw, 0) || !mbx->timeout) 587 mac->get_link_status = TRUE; 588 589 if (!mac->get_link_status) 590 goto out; 591 592 /* if link status is down no point in checking to see if pf is up */ 593 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); 594 if (!(links_reg & IXGBE_LINKS_UP)) 595 goto out; 596 597 /* for SFP+ modules and DA cables on 82599 it can take up to 500usecs 598 * before the link status is correct 599 */ 600 if (mac->type == ixgbe_mac_82599_vf) { 601 int i; 602 603 for (i = 0; i < 5; i++) { 604 usec_delay(100); 605 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); 606 607 if (!(links_reg & IXGBE_LINKS_UP)) 608 goto out; 609 } 610 } 611 612 switch (links_reg & IXGBE_LINKS_SPEED_82599) { 613 case IXGBE_LINKS_SPEED_10G_82599: 614 *speed = IXGBE_LINK_SPEED_10GB_FULL; 615 if (hw->mac.type >= ixgbe_mac_X550) { 616 if (links_reg & IXGBE_LINKS_SPEED_NON_STD) 617 *speed = IXGBE_LINK_SPEED_2_5GB_FULL; 618 } 619 break; 620 case IXGBE_LINKS_SPEED_1G_82599: 621 *speed = IXGBE_LINK_SPEED_1GB_FULL; 622 break; 623 case IXGBE_LINKS_SPEED_100_82599: 624 *speed = IXGBE_LINK_SPEED_100_FULL; 625 if (hw->mac.type == ixgbe_mac_X550) { 626 if (links_reg & IXGBE_LINKS_SPEED_NON_STD) 627 *speed = IXGBE_LINK_SPEED_5GB_FULL; 628 } 629 break; 630 case IXGBE_LINKS_SPEED_10_X550EM_A: 631 *speed = IXGBE_LINK_SPEED_UNKNOWN; 632 /* Since Reserved in older MAC's */ 633 if (hw->mac.type >= ixgbe_mac_X550) 634 *speed = IXGBE_LINK_SPEED_10_FULL; 635 break; 636 default: 637 *speed = IXGBE_LINK_SPEED_UNKNOWN; 638 } 639 640 /* if the read failed it could just be a mailbox collision, best wait 641 * until we are called again and don't report an error 642 */ 643 if (mbx->ops.read(hw, &in_msg, 1, 0)) 644 goto out; 645 646 if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) { 647 /* msg is not CTS and is NACK we must have lost CTS status */ 648 if (in_msg & IXGBE_VT_MSGTYPE_NACK) 649 ret_val = -1; 650 goto out; 651 } 652 653 /* the pf is talking, if we timed out in the past we reinit */ 654 if (!mbx->timeout) { 655 ret_val = -1; 656 goto out; 657 } 658 659 /* if we passed all the tests above then the link is up and we no 660 * longer need to check for link 661 */ 662 mac->get_link_status = FALSE; 663 664out: 665 *link_up = !mac->get_link_status; 666 return ret_val; 667} 668 669/** 670 * ixgbevf_rlpml_set_vf - Set the maximum receive packet length 671 * @hw: pointer to the HW structure 672 * @max_size: value to assign to max frame size 673 **/ 674s32 ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size) 675{ 676 u32 msgbuf[2]; 677 s32 retval; 678 679 msgbuf[0] = IXGBE_VF_SET_LPE; 680 msgbuf[1] = max_size; 681 682 retval = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2); 683 if (retval) 684 return retval; 685 if ((msgbuf[0] & IXGBE_VF_SET_LPE) && 686 (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK)) 687 return IXGBE_ERR_MBX; 688 689 return 0; 690} 691 692/** 693 * ixgbevf_negotiate_api_version - Negotiate supported API version 694 * @hw: pointer to the HW structure 695 * @api: integer containing requested API version 696 **/ 697int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api) 698{ 699 int err; 700 u32 msg[3]; 701 702 /* Negotiate the mailbox API version */ 703 msg[0] = IXGBE_VF_API_NEGOTIATE; 704 msg[1] = api; 705 msg[2] = 0; 706 707 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 3); 708 if (!err) { 709 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS; 710 711 /* Store value and return 0 on success */ 712 if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_ACK)) { 713 hw->api_version = api; 714 return 0; 715 } 716 717 err = IXGBE_ERR_INVALID_ARGUMENT; 718 } 719 720 return err; 721} 722 723int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs, 724 unsigned int *default_tc) 725{ 726 int err; 727 u32 msg[5]; 728 729 /* do nothing if API doesn't support ixgbevf_get_queues */ 730 switch (hw->api_version) { 731 case ixgbe_mbox_api_11: 732 case ixgbe_mbox_api_12: 733 case ixgbe_mbox_api_13: 734 break; 735 default: 736 return 0; 737 } 738 739 /* Fetch queue configuration from the PF */ 740 msg[0] = IXGBE_VF_GET_QUEUES; 741 msg[1] = msg[2] = msg[3] = msg[4] = 0; 742 743 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 5); 744 if (!err) { 745 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS; 746 747 /* 748 * if we we didn't get an ACK there must have been 749 * some sort of mailbox error so we should treat it 750 * as such 751 */ 752 if (msg[0] != (IXGBE_VF_GET_QUEUES | IXGBE_VT_MSGTYPE_ACK)) 753 return IXGBE_ERR_MBX; 754 755 /* record and validate values from message */ 756 hw->mac.max_tx_queues = msg[IXGBE_VF_TX_QUEUES]; 757 if (hw->mac.max_tx_queues == 0 || 758 hw->mac.max_tx_queues > IXGBE_VF_MAX_TX_QUEUES) 759 hw->mac.max_tx_queues = IXGBE_VF_MAX_TX_QUEUES; 760 761 hw->mac.max_rx_queues = msg[IXGBE_VF_RX_QUEUES]; 762 if (hw->mac.max_rx_queues == 0 || 763 hw->mac.max_rx_queues > IXGBE_VF_MAX_RX_QUEUES) 764 hw->mac.max_rx_queues = IXGBE_VF_MAX_RX_QUEUES; 765 766 *num_tcs = msg[IXGBE_VF_TRANS_VLAN]; 767 /* in case of unknown state assume we cannot tag frames */ 768 if (*num_tcs > hw->mac.max_rx_queues) 769 *num_tcs = 1; 770 771 *default_tc = msg[IXGBE_VF_DEF_QUEUE]; 772 /* default to queue 0 on out-of-bounds queue number */ 773 if (*default_tc >= hw->mac.max_tx_queues) 774 *default_tc = 0; 775 } 776 777 return err; 778} 779