ispmbox.h revision 316399
1251881Speter/* $FreeBSD: stable/10/sys/dev/isp/ispmbox.h 316399 2017-04-02 10:52:00Z mav $ */ 2251881Speter/*- 3251881Speter * Copyright (c) 1997-2009 by Matthew Jacob 4251881Speter * All rights reserved. 5251881Speter * 6251881Speter * Redistribution and use in source and binary forms, with or without 7251881Speter * modification, are permitted provided that the following conditions 8251881Speter * are met: 9251881Speter * 10251881Speter * 1. Redistributions of source code must retain the above copyright 11251881Speter * notice, this list of conditions and the following disclaimer. 12251881Speter * 2. Redistributions in binary form must reproduce the above copyright 13251881Speter * notice, this list of conditions and the following disclaimer in the 14251881Speter * documentation and/or other materials provided with the distribution. 15251881Speter * 16251881Speter * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17251881Speter * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18251881Speter * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19251881Speter * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 20251881Speter * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21251881Speter * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22251881Speter * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23251881Speter * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24251881Speter * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25251881Speter * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26251881Speter * SUCH DAMAGE. 27251881Speter * 28251881Speter */ 29251881Speter 30251881Speter/* 31251881Speter * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters. 32251881Speter */ 33251881Speter#ifndef _ISPMBOX_H 34251881Speter#define _ISPMBOX_H 35251881Speter 36251881Speter/* 37251881Speter * Mailbox Command Opcodes 38251881Speter */ 39251881Speter#define MBOX_NO_OP 0x0000 40251881Speter#define MBOX_LOAD_RAM 0x0001 41251881Speter#define MBOX_EXEC_FIRMWARE 0x0002 42251881Speter#define MBOX_DUMP_RAM 0x0003 43251881Speter#define MBOX_WRITE_RAM_WORD 0x0004 44251881Speter#define MBOX_READ_RAM_WORD 0x0005 45251881Speter#define MBOX_MAILBOX_REG_TEST 0x0006 46251881Speter#define MBOX_VERIFY_CHECKSUM 0x0007 47251881Speter#define MBOX_ABOUT_FIRMWARE 0x0008 48251881Speter#define MBOX_LOAD_RISC_RAM_2100 0x0009 49251881Speter /* a */ 50251881Speter#define MBOX_LOAD_RISC_RAM 0x000b 51299742Sdim#define MBOX_DUMP_RISC_RAM 0x000c 52251881Speter#define MBOX_WRITE_RAM_WORD_EXTENDED 0x000d 53251881Speter#define MBOX_CHECK_FIRMWARE 0x000e 54251881Speter#define MBOX_READ_RAM_WORD_EXTENDED 0x000f 55251881Speter#define MBOX_INIT_REQ_QUEUE 0x0010 56251881Speter#define MBOX_INIT_RES_QUEUE 0x0011 57251881Speter#define MBOX_EXECUTE_IOCB 0x0012 58251881Speter#define MBOX_WAKE_UP 0x0013 59251881Speter#define MBOX_STOP_FIRMWARE 0x0014 60251881Speter#define MBOX_ABORT 0x0015 61251881Speter#define MBOX_ABORT_DEVICE 0x0016 62251881Speter#define MBOX_ABORT_TARGET 0x0017 63251881Speter#define MBOX_BUS_RESET 0x0018 64251881Speter#define MBOX_STOP_QUEUE 0x0019 65251881Speter#define MBOX_START_QUEUE 0x001a 66251881Speter#define MBOX_SINGLE_STEP_QUEUE 0x001b 67251881Speter#define MBOX_ABORT_QUEUE 0x001c 68251881Speter#define MBOX_GET_DEV_QUEUE_STATUS 0x001d 69251881Speter /* 1e */ 70251881Speter#define MBOX_GET_FIRMWARE_STATUS 0x001f 71251881Speter#define MBOX_GET_INIT_SCSI_ID 0x0020 72251881Speter#define MBOX_GET_SELECT_TIMEOUT 0x0021 73251881Speter#define MBOX_GET_RETRY_COUNT 0x0022 74251881Speter#define MBOX_GET_TAG_AGE_LIMIT 0x0023 75251881Speter#define MBOX_GET_CLOCK_RATE 0x0024 76251881Speter#define MBOX_GET_ACT_NEG_STATE 0x0025 77251881Speter#define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 78251881Speter#define MBOX_GET_SBUS_PARAMS 0x0027 79251881Speter#define MBOX_GET_PCI_PARAMS MBOX_GET_SBUS_PARAMS 80251881Speter#define MBOX_GET_TARGET_PARAMS 0x0028 81251881Speter#define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 82251881Speter#define MBOX_GET_RESET_DELAY_PARAMS 0x002a 83251881Speter /* 2b */ 84251881Speter /* 2c */ 85251881Speter /* 2d */ 86251881Speter /* 2e */ 87251881Speter /* 2f */ 88251881Speter#define MBOX_SET_INIT_SCSI_ID 0x0030 89251881Speter#define MBOX_SET_SELECT_TIMEOUT 0x0031 90251881Speter#define MBOX_SET_RETRY_COUNT 0x0032 91299742Sdim#define MBOX_SET_TAG_AGE_LIMIT 0x0033 92299742Sdim#define MBOX_SET_CLOCK_RATE 0x0034 93299742Sdim#define MBOX_SET_ACT_NEG_STATE 0x0035 94251881Speter#define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 95251881Speter#define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 96251881Speter#define MBOX_SET_PCI_PARAMETERS 0x0037 97251881Speter#define MBOX_SET_TARGET_PARAMS 0x0038 98251881Speter#define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 99251881Speter#define MBOX_SET_RESET_DELAY_PARAMS 0x003a 100251881Speter /* 3b */ 101251881Speter /* 3c */ 102251881Speter /* 3d */ 103251881Speter /* 3e */ 104251881Speter /* 3f */ 105251881Speter#define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 106251881Speter#define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 107251881Speter#define MBOX_EXEC_BIOS_IOCB 0x0042 108251881Speter#define MBOX_SET_FW_FEATURES 0x004a 109251881Speter#define MBOX_GET_FW_FEATURES 0x004b 110251881Speter#define FW_FEATURE_FAST_POST 0x1 111251881Speter#define FW_FEATURE_LVD_NOTIFY 0x2 112251881Speter#define FW_FEATURE_RIO_32BIT 0x4 113251881Speter#define FW_FEATURE_RIO_16BIT 0x8 114251881Speter 115262253Speter#define MBOX_INIT_REQ_QUEUE_A64 0x0052 116251881Speter#define MBOX_INIT_RES_QUEUE_A64 0x0053 117251881Speter 118251881Speter#define MBOX_ENABLE_TARGET_MODE 0x0055 119251881Speter#define ENABLE_TARGET_FLAG 0x8000 120251881Speter#define ENABLE_TQING_FLAG 0x0004 121251881Speter#define ENABLE_MANDATORY_DISC 0x0002 122251881Speter#define MBOX_GET_TARGET_STATUS 0x0056 123251881Speter 124251881Speter/* These are for the ISP2X00 FC cards */ 125251881Speter#define MBOX_LOAD_FLASH_FIRMWARE 0x0003 126251881Speter#define MBOX_WRITE_FC_SERDES_REG 0x0003 /* FC only */ 127251881Speter#define MBOX_READ_FC_SERDES_REG 0x0004 /* FC only */ 128251881Speter#define MBOX_GET_IO_STATUS 0x0012 129251881Speter#define MBOX_SET_TRANSMIT_PARAMS 0x0019 130251881Speter#define MBOX_SET_PORT_PARAMS 0x001a 131251881Speter#define MBOX_LOAD_OP_FW_PARAMS 0x001b 132251881Speter#define MBOX_INIT_MULTIPLE_QUEUE 0x001f 133251881Speter#define MBOX_GET_LOOP_ID 0x0020 134251881Speter/* for 24XX cards, outgoing mailbox 7 has these values for F or FL topologies */ 135251881Speter#define ISP24XX_INORDER 0x0100 136251881Speter#define ISP24XX_NPIV_SAN 0x0400 137251881Speter#define ISP24XX_VSAN_SAN 0x1000 138251881Speter#define ISP24XX_FC_SP_SAN 0x2000 139299742Sdim#define MBOX_GET_TIMEOUT_PARAMS 0x0022 140299742Sdim#define MBOX_GET_FIRMWARE_OPTIONS 0x0028 141299742Sdim#define MBOX_GENERATE_SYSTEM_ERROR 0x002a 142251881Speter#define MBOX_WRITE_SFP 0x0030 143251881Speter#define MBOX_READ_SFP 0x0031 144251881Speter#define MBOX_SET_TIMEOUT_PARAMS 0x0032 145251881Speter#define MBOX_SET_FIRMWARE_OPTIONS 0x0038 146251881Speter#define MBOX_GET_SET_FC_LED_CONF 0x003b 147251881Speter#define MBOX_RESTART_NIC_FIRMWARE 0x003d /* FCoE only */ 148251881Speter#define MBOX_ACCESS_CONTROL 0x003e 149251881Speter#define MBOX_LOOP_PORT_BYPASS 0x0040 /* FC only */ 150251881Speter#define MBOX_LOOP_PORT_ENABLE 0x0041 /* FC only */ 151251881Speter#define MBOX_GET_RESOURCE_COUNT 0x0042 152251881Speter#define MBOX_REQUEST_OFFLINE_MODE 0x0043 153251881Speter#define MBOX_DIAGNOSTIC_ECHO_TEST 0x0044 154251881Speter#define MBOX_DIAGNOSTIC_LOOPBACK 0x0045 155251881Speter#define MBOX_ENHANCED_GET_PDB 0x0047 156251881Speter#define MBOX_INIT_FIRMWARE_MULTI_ID 0x0048 /* 2400 only */ 157251881Speter#define MBOX_GET_VP_DATABASE 0x0049 /* 2400 only */ 158251881Speter#define MBOX_GET_VP_DATABASE_ENTRY 0x004a /* 2400 only */ 159251881Speter#define MBOX_GET_FCF_LIST 0x0050 /* FCoE only */ 160251881Speter#define MBOX_GET_DCBX_PARAMETERS 0x0051 /* FCoE only */ 161251881Speter#define MBOX_HOST_MEMORY_COPY 0x0053 162251881Speter#define MBOX_EXEC_COMMAND_IOCB_A64 0x0054 163251881Speter#define MBOX_SEND_RNID 0x0057 164251881Speter#define MBOX_SET_PARAMETERS 0x0059 165251881Speter#define MBOX_GET_PARAMETERS 0x005a 166251881Speter#define MBOX_DRIVER_HEARTBEAT 0x005B /* FC only */ 167251881Speter#define MBOX_FW_HEARTBEAT 0x005C 168251881Speter#define MBOX_GET_SET_DATA_RATE 0x005D /* >=23XX only */ 169251881Speter#define MBGSD_GET_RATE 0 170251881Speter#define MBGSD_SET_RATE 1 171251881Speter#define MBGSD_SET_RATE_NOW 2 /* 24XX only */ 172251881Speter#define MBGSD_1GB 0x00 173251881Speter#define MBGSD_2GB 0x01 174251881Speter#define MBGSD_AUTO 0x02 175299742Sdim#define MBGSD_4GB 0x03 /* 24XX only */ 176251881Speter#define MBGSD_8GB 0x04 /* 25XX only */ 177299742Sdim#define MBGSD_16GB 0x05 /* 26XX only */ 178251881Speter#define MBGSD_10GB 0x13 /* 26XX only */ 179299742Sdim#define MBOX_SEND_RNFT 0x005e 180251881Speter#define MBOX_INIT_FIRMWARE 0x0060 181299742Sdim#define MBOX_GET_INIT_CONTROL_BLOCK 0x0061 182251881Speter#define MBOX_INIT_LIP 0x0062 183251881Speter#define MBOX_GET_FC_AL_POSITION_MAP 0x0063 184251881Speter#define MBOX_GET_PORT_DB 0x0064 185251881Speter#define MBOX_CLEAR_ACA 0x0065 186251881Speter#define MBOX_TARGET_RESET 0x0066 187251881Speter#define MBOX_CLEAR_TASK_SET 0x0067 188251881Speter#define MBOX_ABORT_TASK_SET 0x0068 189262253Speter#define MBOX_GET_FW_STATE 0x0069 190251881Speter#define MBOX_GET_PORT_NAME 0x006A 191251881Speter#define MBOX_GET_LINK_STATUS 0x006B 192299742Sdim#define MBOX_INIT_LIP_RESET 0x006C 193251881Speter#define MBOX_GET_LINK_STAT_PR_DATA_CNT 0x006D 194299742Sdim#define MBOX_SEND_SNS 0x006E 195251881Speter#define MBOX_FABRIC_LOGIN 0x006F 196251881Speter#define MBOX_SEND_CHANGE_REQUEST 0x0070 197299742Sdim#define MBOX_FABRIC_LOGOUT 0x0071 198251881Speter#define MBOX_INIT_LIP_LOGIN 0x0072 199251881Speter#define MBOX_GET_PORT_NODE_NAME_LIST 0x0075 200251881Speter#define MBOX_SET_VENDOR_ID 0x0076 201251881Speter#define MBOX_GET_XGMAC_STATS 0x007a 202251881Speter#define MBOX_GET_ID_LIST 0x007C 203251881Speter#define MBOX_SEND_LFA 0x007d 204251881Speter#define MBOX_LUN_RESET 0x007E 205251881Speter 206251881Speter#define ISP2100_SET_PCI_PARAM 0x00ff 207251881Speter 208251881Speter#define MBOX_BUSY 0x04 209251881Speter 210251881Speter/* 211251881Speter * Mailbox Command Complete Status Codes 212251881Speter */ 213299742Sdim#define MBOX_COMMAND_COMPLETE 0x4000 214251881Speter#define MBOX_INVALID_COMMAND 0x4001 215299742Sdim#define MBOX_HOST_INTERFACE_ERROR 0x4002 216299742Sdim#define MBOX_TEST_FAILED 0x4003 217299742Sdim#define MBOX_COMMAND_ERROR 0x4005 218299742Sdim#define MBOX_COMMAND_PARAM_ERROR 0x4006 219262253Speter#define MBOX_PORT_ID_USED 0x4007 220262253Speter#define MBOX_LOOP_ID_USED 0x4008 221262253Speter#define MBOX_ALL_IDS_USED 0x4009 222262253Speter#define MBOX_NOT_LOGGED_IN 0x400A 223262253Speter#define MBOX_LINK_DOWN_ERROR 0x400B 224262253Speter#define MBOX_LOOPBACK_ERROR 0x400C 225262253Speter#define MBOX_CHECKSUM_ERROR 0x4010 226262253Speter#define MBOX_INVALID_PRODUCT_KEY 0x4020 227262253Speter/* pseudo mailbox completion codes */ 228262253Speter#define MBOX_REGS_BUSY 0x6000 /* registers in use */ 229262253Speter#define MBOX_TIMEOUT 0x6001 /* command timed out */ 230299742Sdim 231299742Sdim#define MBLOGALL 0xffffffff 232299742Sdim#define MBLOGNONE 0x00000000 233299742Sdim#define MBLOGMASK(x) (1 << (((x) - 1) & 0x1f)) 234299742Sdim 235299742Sdim/* 236299742Sdim * Asynchronous event status codes 237299742Sdim */ 238299742Sdim#define ASYNC_BUS_RESET 0x8001 239299742Sdim#define ASYNC_SYSTEM_ERROR 0x8002 240299742Sdim#define ASYNC_RQS_XFER_ERR 0x8003 241299742Sdim#define ASYNC_RSP_XFER_ERR 0x8004 242299742Sdim#define ASYNC_QWAKEUP 0x8005 243299742Sdim#define ASYNC_TIMEOUT_RESET 0x8006 244299742Sdim#define ASYNC_DEVICE_RESET 0x8007 245299742Sdim#define ASYNC_EXTMSG_UNDERRUN 0x800A 246299742Sdim#define ASYNC_SCAM_INT 0x800B 247299742Sdim#define ASYNC_HUNG_SCSI 0x800C 248299742Sdim#define ASYNC_KILLED_BUS 0x800D 249299742Sdim#define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */ 250299742Sdim#define ASYNC_LIP_OCCURRED 0x8010 /* FC only */ 251299742Sdim#define ASYNC_LOOP_UP 0x8011 252262253Speter#define ASYNC_LOOP_DOWN 0x8012 253251881Speter#define ASYNC_LOOP_RESET 0x8013 /* FC only */ 254299742Sdim#define ASYNC_PDB_CHANGED 0x8014 255299742Sdim#define ASYNC_CHANGE_NOTIFY 0x8015 256299742Sdim#define ASYNC_LIP_NOS_OLS_RECV 0x8016 /* FC only */ 257251881Speter#define ASYNC_LIP_ERROR 0x8017 /* FC only */ 258251881Speter#define ASYNC_AUTO_PLOGI_RJT 0x8018 259251881Speter#define ASYNC_SECURITY_UPDATE 0x801B 260251881Speter#define ASYNC_CMD_CMPLT 0x8020 261251881Speter#define ASYNC_CTIO_DONE 0x8021 262251881Speter#define ASYNC_RIO32_1 0x8021 263251881Speter#define ASYNC_RIO32_2 0x8022 264251881Speter#define ASYNC_IP_XMIT_DONE 0x8022 265251881Speter#define ASYNC_IP_RECV_DONE 0x8023 266251881Speter#define ASYNC_IP_BROADCAST 0x8024 267251881Speter#define ASYNC_IP_RCVQ_LOW 0x8025 268251881Speter#define ASYNC_IP_RCVQ_EMPTY 0x8026 269251881Speter#define ASYNC_IP_RECV_DONE_ALIGNED 0x8027 270251881Speter#define ASYNC_ERR_LOGGING_DISABLED 0x8029 271251881Speter#define ASYNC_PTPMODE 0x8030 /* FC only */ 272251881Speter#define ASYNC_RIO16_1 0x8031 273251881Speter#define ASYNC_RIO16_2 0x8032 274251881Speter#define ASYNC_RIO16_3 0x8033 275251881Speter#define ASYNC_RIO16_4 0x8034 276251881Speter#define ASYNC_RIO16_5 0x8035 277251881Speter#define ASYNC_CONNMODE 0x8036 278251881Speter#define ISP_CONN_LOOP 1 279251881Speter#define ISP_CONN_PTP 2 280251881Speter#define ISP_CONN_BADLIP 3 281251881Speter#define ISP_CONN_FATAL 4 282251881Speter#define ISP_CONN_LOOPBACK 5 283251881Speter#define ASYNC_P2P_INIT_ERR 0x8037 284251881Speter#define ASYNC_RIOZIO_STALL 0x8040 /* there's a RIO/ZIO entry that hasn't been serviced */ 285251881Speter#define ASYNC_RIO32_2_2200 0x8042 /* same as ASYNC_RIO32_2, but for 2100/2200 */ 286251881Speter#define ASYNC_RCV_ERR 0x8048 287251881Speter/* 288251881Speter * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options 289251881Speter * mailbox command to enable this. 290251881Speter */ 291251881Speter#define ASYNC_QFULL_SENT 0x8049 292251881Speter#define ASYNC_RJT_SENT 0x8049 /* 24XX only */ 293251881Speter#define ASYNC_SEL_CLASS2_P_RJT_SENT 0x804f 294251881Speter#define ASYNC_FW_RESTART_COMPLETE 0x8060 295251881Speter#define ASYNC_TEMPERATURE_ALERT 0x8070 296251881Speter#define ASYNC_INTER_DRIVER_COMP 0x8100 /* FCoE only */ 297251881Speter#define ASYNC_INTER_DRIVER_NOTIFY 0x8101 /* FCoE only */ 298251881Speter#define ASYNC_INTER_DRIVER_TIME_EXT 0x8102 /* FCoE only */ 299251881Speter#define ASYNC_NIC_FW_STATE_CHANGE 0x8200 /* FCoE only */ 300251881Speter#define ASYNC_AUTOLOAD_FW_COMPLETE 0x8400 301251881Speter#define ASYNC_AUTOLOAD_FW_FAILURE 0x8401 302251881Speter 303251881Speter/* 304251881Speter * Firmware Options. There are a lot of them. 305251881Speter * 306251881Speter * IFCOPTN - ISP Fibre Channel Option Word N 307251881Speter */ 308251881Speter#define IFCOPT1_EQFQASYNC (1 << 13) /* enable QFULL notification */ 309251881Speter#define IFCOPT1_EAABSRCVD (1 << 12) 310251881Speter#define IFCOPT1_RJTASYNC (1 << 11) /* enable 8018 notification */ 311251881Speter#define IFCOPT1_ENAPURE (1 << 10) 312251881Speter#define IFCOPT1_ENA8017 (1 << 7) 313251881Speter#define IFCOPT1_DISGPIO67 (1 << 6) 314251881Speter#define IFCOPT1_LIPLOSSIMM (1 << 5) 315251881Speter#define IFCOPT1_DISF7SWTCH (1 << 4) 316251881Speter#define IFCOPT1_CTIO_RETRY (1 << 3) 317251881Speter#define IFCOPT1_LIPASYNC (1 << 1) 318251881Speter#define IFCOPT1_LIPF8 (1 << 0) 319251881Speter 320251881Speter#define IFCOPT2_LOOPBACK (1 << 1) 321251881Speter#define IFCOPT2_ATIO3_ONLY (1 << 0) 322251881Speter 323251881Speter#define IFCOPT3_NOPRLI (1 << 4) /* disable automatic sending of PRLI on local loops */ 324251881Speter#define IFCOPT3_RNDASYNC (1 << 1) 325251881Speter 326251881Speter/* 327251881Speter * All IOCB Queue entries are this size 328251881Speter */ 329251881Speter#define QENTRY_LEN 64 330251881Speter 331251881Speter/* 332251881Speter * Command Structure Definitions 333251881Speter */ 334251881Speter 335251881Spetertypedef struct { 336251881Speter uint32_t ds_base; 337251881Speter uint32_t ds_count; 338251881Speter} ispds_t; 339251881Speter 340251881Spetertypedef struct { 341251881Speter uint32_t ds_base; 342251881Speter uint32_t ds_basehi; 343251881Speter uint32_t ds_count; 344251881Speter} ispds64_t; 345251881Speter 346251881Speter#define DSTYPE_32BIT 0 347251881Speter#define DSTYPE_64BIT 1 348251881Spetertypedef struct { 349251881Speter uint16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */ 350251881Speter uint32_t ds_segment; /* unused */ 351251881Speter uint32_t ds_base; /* 32 bit address of DSD list */ 352251881Speter} ispdslist_t; 353251881Speter 354251881Speter 355251881Spetertypedef struct { 356251881Speter uint8_t rqs_entry_type; 357251881Speter uint8_t rqs_entry_count; 358251881Speter uint8_t rqs_seqno; 359251881Speter uint8_t rqs_flags; 360251881Speter} isphdr_t; 361251881Speter 362251881Speter/* RQS Flag definitions */ 363251881Speter#define RQSFLAG_CONTINUATION 0x01 364251881Speter#define RQSFLAG_FULL 0x02 365251881Speter#define RQSFLAG_BADHEADER 0x04 366251881Speter#define RQSFLAG_BADPACKET 0x08 367251881Speter#define RQSFLAG_BADCOUNT 0x10 368251881Speter#define RQSFLAG_BADORDER 0x20 369251881Speter#define RQSFLAG_MASK 0x3f 370251881Speter 371251881Speter/* RQS entry_type definitions */ 372262253Speter#define RQSTYPE_REQUEST 0x01 373289166Speter#define RQSTYPE_DATASEG 0x02 374262253Speter#define RQSTYPE_RESPONSE 0x03 375251881Speter#define RQSTYPE_MARKER 0x04 376251881Speter#define RQSTYPE_CMDONLY 0x05 377251881Speter#define RQSTYPE_ATIO 0x06 /* Target Mode */ 378251881Speter#define RQSTYPE_CTIO 0x07 /* Target Mode */ 379251881Speter#define RQSTYPE_SCAM 0x08 380251881Speter#define RQSTYPE_A64 0x09 381251881Speter#define RQSTYPE_A64_CONT 0x0a 382251881Speter#define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */ 383299742Sdim#define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */ 384251881Speter#define RQSTYPE_NOTIFY 0x0d /* Target Mode */ 385251881Speter#define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */ 386251881Speter#define RQSTYPE_CTIO1 0x0f /* Target Mode */ 387251881Speter#define RQSTYPE_STATUS_CONT 0x10 388251881Speter#define RQSTYPE_T2RQS 0x11 389251881Speter#define RQSTYPE_CTIO7 0x12 390251881Speter#define RQSTYPE_IP_XMIT 0x13 391251881Speter#define RQSTYPE_TSK_MGMT 0x14 392251881Speter#define RQSTYPE_T4RQS 0x15 393251881Speter#define RQSTYPE_ATIO2 0x16 /* Target Mode */ 394251881Speter#define RQSTYPE_CTIO2 0x17 /* Target Mode */ 395251881Speter#define RQSTYPE_T7RQS 0x18 396251881Speter#define RQSTYPE_T3RQS 0x19 397251881Speter#define RQSTYPE_IP_XMIT_64 0x1b 398251881Speter#define RQSTYPE_CTIO4 0x1e /* Target Mode */ 399251881Speter#define RQSTYPE_CTIO3 0x1f /* Target Mode */ 400251881Speter#define RQSTYPE_RIO1 0x21 401251881Speter#define RQSTYPE_RIO2 0x22 402251881Speter#define RQSTYPE_IP_RECV 0x23 403251881Speter#define RQSTYPE_IP_RECV_CONT 0x24 404251881Speter#define RQSTYPE_CT_PASSTHRU 0x29 405251881Speter#define RQSTYPE_MS_PASSTHRU 0x29 406251881Speter#define RQSTYPE_VP_CTRL 0x30 /* 24XX only */ 407251881Speter#define RQSTYPE_VP_MODIFY 0x31 /* 24XX only */ 408251881Speter#define RQSTYPE_RPT_ID_ACQ 0x32 /* 24XX only */ 409251881Speter#define RQSTYPE_ABORT_IO 0x33 410251881Speter#define RQSTYPE_T6RQS 0x48 411251881Speter#define RQSTYPE_LOGIN 0x52 412251881Speter#define RQSTYPE_ABTS_RCVD 0x54 /* 24XX only */ 413251881Speter#define RQSTYPE_ABTS_RSP 0x55 /* 24XX only */ 414251881Speter 415251881Speter 416251881Speter#define ISP_RQDSEG 4 417251881Spetertypedef struct { 418251881Speter isphdr_t req_header; 419251881Speter uint32_t req_handle; 420251881Speter uint8_t req_lun_trn; 421251881Speter uint8_t req_target; 422251881Speter uint16_t req_cdblen; 423251881Speter uint16_t req_flags; 424251881Speter uint16_t req_reserved; 425251881Speter uint16_t req_time; 426251881Speter uint16_t req_seg_count; 427251881Speter uint8_t req_cdb[12]; 428251881Speter ispds_t req_dataseg[ISP_RQDSEG]; 429251881Speter} ispreq_t; 430251881Speter#define ISP_RQDSEG_A64 2 431251881Speter 432251881Spetertypedef struct { 433251881Speter isphdr_t mrk_header; 434251881Speter uint32_t mrk_handle; 435251881Speter uint8_t mrk_reserved0; 436251881Speter uint8_t mrk_target; 437251881Speter uint16_t mrk_modifier; 438251881Speter uint16_t mrk_flags; 439251881Speter uint16_t mrk_lun; 440251881Speter uint8_t mrk_reserved1[48]; 441251881Speter} isp_marker_t; 442251881Speter 443251881Spetertypedef struct { 444251881Speter isphdr_t mrk_header; 445251881Speter uint32_t mrk_handle; 446251881Speter uint16_t mrk_nphdl; 447299742Sdim uint8_t mrk_modifier; 448251881Speter uint8_t mrk_reserved0; 449251881Speter uint8_t mrk_reserved1; 450251881Speter uint8_t mrk_vphdl; 451251881Speter uint16_t mrk_reserved2; 452251881Speter uint8_t mrk_lun[8]; 453251881Speter uint8_t mrk_reserved3[40]; 454251881Speter} isp_marker_24xx_t; 455251881Speter 456251881Speter 457251881Speter#define SYNC_DEVICE 0 458251881Speter#define SYNC_TARGET 1 459251881Speter#define SYNC_ALL 2 460251881Speter#define SYNC_LIP 3 461251881Speter 462251881Speter#define ISP_RQDSEG_T2 3 463251881Spetertypedef struct { 464251881Speter isphdr_t req_header; 465251881Speter uint32_t req_handle; 466251881Speter uint8_t req_lun_trn; 467251881Speter uint8_t req_target; 468251881Speter uint16_t req_scclun; 469251881Speter uint16_t req_flags; 470251881Speter uint8_t req_crn; 471251881Speter uint8_t req_reserved; 472251881Speter uint16_t req_time; 473251881Speter uint16_t req_seg_count; 474251881Speter uint8_t req_cdb[16]; 475251881Speter uint32_t req_totalcnt; 476251881Speter ispds_t req_dataseg[ISP_RQDSEG_T2]; 477251881Speter} ispreqt2_t; 478251881Speter 479251881Spetertypedef struct { 480251881Speter isphdr_t req_header; 481251881Speter uint32_t req_handle; 482251881Speter uint16_t req_target; 483251881Speter uint16_t req_scclun; 484251881Speter uint16_t req_flags; 485299742Sdim uint8_t req_crn; 486251881Speter uint8_t req_reserved; 487251881Speter uint16_t req_time; 488251881Speter uint16_t req_seg_count; 489251881Speter uint8_t req_cdb[16]; 490299742Sdim uint32_t req_totalcnt; 491299742Sdim ispds_t req_dataseg[ISP_RQDSEG_T2]; 492299742Sdim} ispreqt2e_t; 493251881Speter 494251881Speter#define ISP_RQDSEG_T3 2 495251881Spetertypedef struct { 496251881Speter isphdr_t req_header; 497251881Speter uint32_t req_handle; 498251881Speter uint8_t req_lun_trn; 499251881Speter uint8_t req_target; 500262253Speter uint16_t req_scclun; 501299742Sdim uint16_t req_flags; 502251881Speter uint8_t req_crn; 503251881Speter uint8_t req_reserved; 504251881Speter uint16_t req_time; 505262253Speter uint16_t req_seg_count; 506299742Sdim uint8_t req_cdb[16]; 507251881Speter uint32_t req_totalcnt; 508299742Sdim ispds64_t req_dataseg[ISP_RQDSEG_T3]; 509299742Sdim} ispreqt3_t; 510299742Sdim#define ispreq64_t ispreqt3_t /* same as.... */ 511299742Sdim 512299742Sdimtypedef struct { 513251881Speter isphdr_t req_header; 514251881Speter uint32_t req_handle; 515299742Sdim uint16_t req_target; 516251881Speter uint16_t req_scclun; 517251881Speter uint16_t req_flags; 518251881Speter uint8_t req_crn; 519251881Speter uint8_t req_reserved; 520251881Speter uint16_t req_time; 521251881Speter uint16_t req_seg_count; 522251881Speter uint8_t req_cdb[16]; 523251881Speter uint32_t req_totalcnt; 524251881Speter ispds64_t req_dataseg[ISP_RQDSEG_T3]; 525251881Speter} ispreqt3e_t; 526251881Speter 527251881Speter/* req_flag values */ 528299742Sdim#define REQFLAG_NODISCON 0x0001 529299742Sdim#define REQFLAG_HTAG 0x0002 530299742Sdim#define REQFLAG_OTAG 0x0004 531299742Sdim#define REQFLAG_STAG 0x0008 532299742Sdim#define REQFLAG_TARGET_RTN 0x0010 533299742Sdim 534251881Speter#define REQFLAG_NODATA 0x0000 535251881Speter#define REQFLAG_DATA_IN 0x0020 536251881Speter#define REQFLAG_DATA_OUT 0x0040 537251881Speter#define REQFLAG_DATA_UNKNOWN 0x0060 538251881Speter 539251881Speter#define REQFLAG_DISARQ 0x0100 540299742Sdim#define REQFLAG_FRC_ASYNC 0x0200 541299742Sdim#define REQFLAG_FRC_SYNC 0x0400 542289166Speter#define REQFLAG_FRC_WIDE 0x0800 543251881Speter#define REQFLAG_NOPARITY 0x1000 544251881Speter#define REQFLAG_STOPQ 0x2000 545251881Speter#define REQFLAG_XTRASNS 0x4000 546251881Speter#define REQFLAG_PRIORITY 0x8000 547251881Speter 548251881Spetertypedef struct { 549251881Speter isphdr_t req_header; 550251881Speter uint32_t req_handle; 551251881Speter uint8_t req_lun_trn; 552251881Speter uint8_t req_target; 553251881Speter uint16_t req_cdblen; 554251881Speter uint16_t req_flags; 555251881Speter uint16_t req_reserved; 556299742Sdim uint16_t req_time; 557251881Speter uint16_t req_seg_count; 558251881Speter uint8_t req_cdb[44]; 559251881Speter} ispextreq_t; 560251881Speter 561251881Speter 562251881Speter/* 563251881Speter * ISP24XX structures 564251881Speter */ 565251881Spetertypedef struct { 566251881Speter isphdr_t req_header; 567251881Speter uint32_t req_handle; 568251881Speter uint16_t req_nphdl; 569251881Speter uint16_t req_time; 570251881Speter uint16_t req_seg_count; 571251881Speter uint16_t req_reserved; 572251881Speter uint8_t req_lun[8]; 573251881Speter uint8_t req_alen_datadir; 574299742Sdim uint8_t req_task_management; 575299742Sdim uint8_t req_task_attribute; 576299742Sdim uint8_t req_crn; 577299742Sdim uint8_t req_cdb[16]; 578299742Sdim uint32_t req_dl; 579299742Sdim uint16_t req_tidlo; 580251881Speter uint8_t req_tidhi; 581251881Speter uint8_t req_vpidx; 582251881Speter ispds64_t req_dataseg; 583251881Speter} ispreqt7_t; 584251881Speter 585251881Speter/* Task Management Request Function */ 586299742Sdimtypedef struct { 587251881Speter isphdr_t tmf_header; 588251881Speter uint32_t tmf_handle; 589251881Speter uint16_t tmf_nphdl; 590251881Speter uint8_t tmf_reserved0[2]; 591251881Speter uint16_t tmf_delay; 592251881Speter uint16_t tmf_timeout; 593251881Speter uint8_t tmf_lun[8]; 594251881Speter uint32_t tmf_flags; 595251881Speter uint8_t tmf_reserved1[20]; 596251881Speter uint16_t tmf_tidlo; 597251881Speter uint8_t tmf_tidhi; 598251881Speter uint8_t tmf_vpidx; 599251881Speter uint8_t tmf_reserved2[12]; 600299742Sdim} isp24xx_tmf_t; 601251881Speter 602251881Speter#define ISP24XX_TMF_NOSEND 0x80000000 603251881Speter 604251881Speter#define ISP24XX_TMF_LUN_RESET 0x00000010 605251881Speter#define ISP24XX_TMF_ABORT_TASK_SET 0x00000008 606251881Speter#define ISP24XX_TMF_CLEAR_TASK_SET 0x00000004 607251881Speter#define ISP24XX_TMF_TARGET_RESET 0x00000002 608251881Speter#define ISP24XX_TMF_CLEAR_ACA 0x00000001 609299742Sdim 610299742Sdim/* I/O Abort Structure */ 611251881Spetertypedef struct { 612251881Speter isphdr_t abrt_header; 613251881Speter uint32_t abrt_handle; 614251881Speter uint16_t abrt_nphdl; 615251881Speter uint16_t abrt_options; 616251881Speter uint32_t abrt_cmd_handle; 617251881Speter uint16_t abrt_queue_number; 618251881Speter uint8_t abrt_reserved[30]; 619251881Speter uint16_t abrt_tidlo; 620251881Speter uint8_t abrt_tidhi; 621251881Speter uint8_t abrt_vpidx; 622251881Speter uint8_t abrt_reserved1[12]; 623251881Speter} isp24xx_abrt_t; 624251881Speter 625251881Speter#define ISP24XX_ABRT_NOSEND 0x01 /* don't actually send ABTS */ 626251881Speter#define ISP24XX_ABRT_OKAY 0x00 /* in nphdl on return */ 627299742Sdim#define ISP24XX_ABRT_ENXIO 0x31 /* in nphdl on return */ 628299742Sdim 629299742Sdim#define ISP_CDSEG 7 630299742Sdimtypedef struct { 631299742Sdim isphdr_t req_header; 632299742Sdim uint32_t req_reserved; 633299742Sdim ispds_t req_dataseg[ISP_CDSEG]; 634299742Sdim} ispcontreq_t; 635299742Sdim 636251881Speter#define ISP_CDSEG64 5 637251881Spetertypedef struct { 638251881Speter isphdr_t req_header; 639251881Speter ispds64_t req_dataseg[ISP_CDSEG64]; 640251881Speter} ispcontreq64_t; 641251881Speter 642251881Spetertypedef struct { 643251881Speter isphdr_t req_header; 644251881Speter uint32_t req_handle; 645251881Speter uint16_t req_scsi_status; 646251881Speter uint16_t req_completion_status; 647251881Speter uint16_t req_state_flags; 648251881Speter uint16_t req_status_flags; 649251881Speter uint16_t req_time; 650299742Sdim#define req_response_len req_time /* FC only */ 651251881Speter uint16_t req_sense_len; 652251881Speter uint32_t req_resid; 653251881Speter uint8_t req_response[8]; /* FC only */ 654299742Sdim uint8_t req_sense_data[32]; 655251881Speter} ispstatusreq_t; 656251881Speter 657251881Speter/* 658251881Speter * Status Continuation 659251881Speter */ 660251881Spetertypedef struct { 661251881Speter isphdr_t req_header; 662251881Speter uint8_t req_sense_data[60]; 663251881Speter} ispstatus_cont_t; 664251881Speter 665251881Speter/* 666251881Speter * 24XX Type 0 status 667251881Speter */ 668251881Spetertypedef struct { 669251881Speter isphdr_t req_header; 670251881Speter uint32_t req_handle; 671251881Speter uint16_t req_completion_status; 672251881Speter uint16_t req_oxid; 673251881Speter uint32_t req_resid; 674251881Speter uint16_t req_reserved0; 675251881Speter uint16_t req_state_flags; 676251881Speter uint16_t req_retry_delay; /* aka Status Qualifier */ 677251881Speter uint16_t req_scsi_status; 678251881Speter uint32_t req_fcp_residual; 679251881Speter uint32_t req_sense_len; 680251881Speter uint32_t req_response_len; 681251881Speter uint8_t req_rsp_sense[28]; 682251881Speter} isp24xx_statusreq_t; 683251881Speter 684251881Speter/* 685251881Speter * For Qlogic 2X00, the high order byte of SCSI status has 686251881Speter * additional meaning. 687251881Speter */ 688251881Speter#define RQCS_CR 0x1000 /* Confirmation Request */ 689251881Speter#define RQCS_RU 0x0800 /* Residual Under */ 690251881Speter#define RQCS_RO 0x0400 /* Residual Over */ 691251881Speter#define RQCS_RESID (RQCS_RU|RQCS_RO) 692251881Speter#define RQCS_SV 0x0200 /* Sense Length Valid */ 693251881Speter#define RQCS_RV 0x0100 /* FCP Response Length Valid */ 694251881Speter 695251881Speter/* 696251881Speter * CT Passthru IOCB 697251881Speter */ 698299742Sdimtypedef struct { 699299742Sdim isphdr_t ctp_header; 700299742Sdim uint32_t ctp_handle; 701299742Sdim uint16_t ctp_status; 702299742Sdim uint16_t ctp_nphdl; /* n-port handle */ 703251881Speter uint16_t ctp_cmd_cnt; /* Command DSD count */ 704251881Speter uint8_t ctp_vpidx; 705299742Sdim uint8_t ctp_reserved0; 706299742Sdim uint16_t ctp_time; 707251881Speter uint16_t ctp_reserved1; 708299742Sdim uint16_t ctp_rsp_cnt; /* Response DSD count */ 709299742Sdim uint16_t ctp_reserved2[5]; 710299742Sdim uint32_t ctp_rsp_bcnt; /* Response byte count */ 711299742Sdim uint32_t ctp_cmd_bcnt; /* Command byte count */ 712299742Sdim ispds64_t ctp_dataseg[2]; 713299742Sdim} isp_ct_pt_t; 714299742Sdim 715299742Sdim/* 716251881Speter * MS Passthru IOCB 717299742Sdim */ 718299742Sdimtypedef struct { 719299742Sdim isphdr_t ms_header; 720299742Sdim uint32_t ms_handle; 721299742Sdim uint16_t ms_nphdl; /* handle in high byte for !2k f/w */ 722299742Sdim uint16_t ms_status; 723299742Sdim uint16_t ms_flags; 724251881Speter uint16_t ms_reserved1; /* low 8 bits */ 725299742Sdim uint16_t ms_time; 726299742Sdim uint16_t ms_cmd_cnt; /* Command DSD count */ 727299742Sdim uint16_t ms_tot_cnt; /* Total DSD Count */ 728299742Sdim uint8_t ms_type; /* MS type */ 729299742Sdim uint8_t ms_r_ctl; /* R_CTL */ 730299742Sdim uint16_t ms_rxid; /* RX_ID */ 731299742Sdim uint16_t ms_reserved2; 732251881Speter uint32_t ms_handle2; 733299742Sdim uint32_t ms_rsp_bcnt; /* Response byte count */ 734251881Speter uint32_t ms_cmd_bcnt; /* Command byte count */ 735251881Speter ispds64_t ms_dataseg[2]; 736251881Speter} isp_ms_t; 737251881Speter 738251881Speter/* 739251881Speter * Completion Status Codes. 740251881Speter */ 741251881Speter#define RQCS_COMPLETE 0x0000 742251881Speter#define RQCS_DMA_ERROR 0x0002 743251881Speter#define RQCS_RESET_OCCURRED 0x0004 744251881Speter#define RQCS_ABORTED 0x0005 745251881Speter#define RQCS_TIMEOUT 0x0006 746251881Speter#define RQCS_DATA_OVERRUN 0x0007 747251881Speter#define RQCS_DATA_UNDERRUN 0x0015 748251881Speter#define RQCS_QUEUE_FULL 0x001C 749251881Speter 750251881Speter/* 1X00 Only Completion Codes */ 751251881Speter#define RQCS_INCOMPLETE 0x0001 752251881Speter#define RQCS_TRANSPORT_ERROR 0x0003 753251881Speter#define RQCS_COMMAND_OVERRUN 0x0008 754251881Speter#define RQCS_STATUS_OVERRUN 0x0009 755251881Speter#define RQCS_BAD_MESSAGE 0x000a 756251881Speter#define RQCS_NO_MESSAGE_OUT 0x000b 757251881Speter#define RQCS_EXT_ID_FAILED 0x000c 758251881Speter#define RQCS_IDE_MSG_FAILED 0x000d 759251881Speter#define RQCS_ABORT_MSG_FAILED 0x000e 760251881Speter#define RQCS_REJECT_MSG_FAILED 0x000f 761251881Speter#define RQCS_NOP_MSG_FAILED 0x0010 762251881Speter#define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 763251881Speter#define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 764251881Speter#define RQCS_ID_MSG_FAILED 0x0013 765251881Speter#define RQCS_UNEXP_BUS_FREE 0x0014 766251881Speter#define RQCS_XACT_ERR1 0x0018 767251881Speter#define RQCS_XACT_ERR2 0x0019 768251881Speter#define RQCS_XACT_ERR3 0x001A 769251881Speter#define RQCS_BAD_ENTRY 0x001B 770251881Speter#define RQCS_PHASE_SKIPPED 0x001D 771251881Speter#define RQCS_ARQS_FAILED 0x001E 772251881Speter#define RQCS_WIDE_FAILED 0x001F 773251881Speter#define RQCS_SYNCXFER_FAILED 0x0020 774251881Speter#define RQCS_LVD_BUSERR 0x0021 775251881Speter 776251881Speter/* 2X00 Only Completion Codes */ 777251881Speter#define RQCS_PORT_UNAVAILABLE 0x0028 778251881Speter#define RQCS_PORT_LOGGED_OUT 0x0029 779251881Speter#define RQCS_PORT_CHANGED 0x002A 780251881Speter#define RQCS_PORT_BUSY 0x002B 781251881Speter 782251881Speter/* 24XX Only Completion Codes */ 783251881Speter#define RQCS_24XX_DRE 0x0011 /* data reassembly error */ 784251881Speter#define RQCS_24XX_TABORT 0x0013 /* aborted by target */ 785251881Speter#define RQCS_24XX_ENOMEM 0x002C /* f/w resource unavailable */ 786251881Speter#define RQCS_24XX_TMO 0x0030 /* task management overrun */ 787251881Speter 788251881Speter 789251881Speter/* 790251881Speter * 1X00 specific State Flags 791251881Speter */ 792251881Speter#define RQSF_GOT_BUS 0x0100 793251881Speter#define RQSF_GOT_TARGET 0x0200 794251881Speter#define RQSF_SENT_CDB 0x0400 795251881Speter#define RQSF_XFRD_DATA 0x0800 796251881Speter#define RQSF_GOT_STATUS 0x1000 797251881Speter#define RQSF_GOT_SENSE 0x2000 798251881Speter#define RQSF_XFER_COMPLETE 0x4000 799251881Speter 800251881Speter/* 801251881Speter * 2X00 specific State Flags 802251881Speter * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available) 803251881Speter */ 804251881Speter#define RQSF_DATA_IN 0x0020 805251881Speter#define RQSF_DATA_OUT 0x0040 806251881Speter#define RQSF_STAG 0x0008 807251881Speter#define RQSF_OTAG 0x0004 808251881Speter#define RQSF_HTAG 0x0002 809251881Speter/* 810251881Speter * 1X00 Status Flags 811251881Speter */ 812251881Speter#define RQSTF_DISCONNECT 0x0001 813251881Speter#define RQSTF_SYNCHRONOUS 0x0002 814251881Speter#define RQSTF_PARITY_ERROR 0x0004 815251881Speter#define RQSTF_BUS_RESET 0x0008 816251881Speter#define RQSTF_DEVICE_RESET 0x0010 817251881Speter#define RQSTF_ABORTED 0x0020 818251881Speter#define RQSTF_TIMEOUT 0x0040 819251881Speter#define RQSTF_NEGOTIATION 0x0080 820251881Speter 821251881Speter/* 822251881Speter * 2X00 specific state flags 823251881Speter */ 824251881Speter/* RQSF_SENT_CDB */ 825251881Speter/* RQSF_XFRD_DATA */ 826251881Speter/* RQSF_GOT_STATUS */ 827251881Speter/* RQSF_XFER_COMPLETE */ 828251881Speter 829251881Speter/* 830251881Speter * 2X00 specific status flags 831251881Speter */ 832251881Speter/* RQSTF_ABORTED */ 833251881Speter/* RQSTF_TIMEOUT */ 834251881Speter#define RQSTF_DMA_ERROR 0x0080 835251881Speter#define RQSTF_LOGOUT 0x2000 836251881Speter 837251881Speter/* 838251881Speter * Miscellaneous 839299742Sdim */ 840251881Speter#ifndef ISP_EXEC_THROTTLE 841251881Speter#define ISP_EXEC_THROTTLE 16 842251881Speter#endif 843251881Speter 844251881Speter/* 845251881Speter * About Firmware returns an 'attribute' word in mailbox 6. 846251881Speter * These attributes are for 2200 and 2300. 847251881Speter */ 848251881Speter#define ISP_FW_ATTR_TMODE 0x0001 849251881Speter#define ISP_FW_ATTR_SCCLUN 0x0002 850251881Speter#define ISP_FW_ATTR_FABRIC 0x0004 851251881Speter#define ISP_FW_ATTR_CLASS2 0x0008 852251881Speter#define ISP_FW_ATTR_FCTAPE 0x0010 853251881Speter#define ISP_FW_ATTR_IP 0x0020 854251881Speter#define ISP_FW_ATTR_VI 0x0040 855251881Speter#define ISP_FW_ATTR_VI_SOLARIS 0x0080 856251881Speter#define ISP_FW_ATTR_2KLOGINS 0x0100 /* just a guess... */ 857251881Speter 858251881Speter/* and these are for the 2400 */ 859251881Speter#define ISP2400_FW_ATTR_CLASS2 0x0001 860251881Speter#define ISP2400_FW_ATTR_IP 0x0002 861251881Speter#define ISP2400_FW_ATTR_MULTIID 0x0004 862251881Speter#define ISP2400_FW_ATTR_SB2 0x0008 863251881Speter#define ISP2400_FW_ATTR_T10CRC 0x0010 864251881Speter#define ISP2400_FW_ATTR_VI 0x0020 865251881Speter#define ISP2400_FW_ATTR_MQ 0x0040 866251881Speter#define ISP2400_FW_ATTR_MSIX 0x0080 867251881Speter#define ISP2400_FW_ATTR_FCOE 0x0800 868251881Speter#define ISP2400_FW_ATTR_VP0 0x1000 869251881Speter#define ISP2400_FW_ATTR_EXPFW 0x2000 870251881Speter#define ISP2400_FW_ATTR_HOTFW 0x4000 871251881Speter#define ISP2400_FW_ATTR_EXTNDED 0x8000 872251881Speter#define ISP2400_FW_ATTR_EXTVP 0x00010000 873251881Speter#define ISP2400_FW_ATTR_VN2VN 0x00040000 874251881Speter#define ISP2400_FW_ATTR_EXMOFF 0x00080000 875251881Speter#define ISP2400_FW_ATTR_NPMOFF 0x00100000 876251881Speter#define ISP2400_FW_ATTR_DIFCHOP 0x00400000 877251881Speter#define ISP2400_FW_ATTR_SRIOV 0x02000000 878251881Speter#define ISP2400_FW_ATTR_ASICTMP 0x0200000000 879251881Speter#define ISP2400_FW_ATTR_ATIOMQ 0x0400000000 880251881Speter 881251881Speter/* 882251881Speter * These are either manifestly true or are dependent on f/w attributes 883251881Speter */ 884251881Speter#define ISP_CAP_TMODE(isp) \ 885251881Speter (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_TMODE)) 886251881Speter#define ISP_CAP_SCCFW(isp) \ 887251881Speter (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_SCCLUN)) 888251881Speter#define ISP_CAP_2KLOGIN(isp) \ 889251881Speter (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_2KLOGINS)) 890251881Speter 891251881Speter/* 892251881Speter * This is only true for 24XX cards with this f/w attribute 893251881Speter */ 894251881Speter#define ISP_CAP_MULTI_ID(isp) \ 895251881Speter (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_MULTIID) : 0) 896251881Speter#define ISP_GET_VPIDX(isp, tag) \ 897251881Speter (ISP_CAP_MULTI_ID(isp) ? tag : 0) 898251881Speter#define ISP_CAP_MSIX(isp) \ 899251881Speter (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_MSIX) : 0) 900251881Speter#define ISP_CAP_VP0(isp) \ 901251881Speter (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_VP0) : 0) 902251881Speter 903251881Speter/* 904251881Speter * This is true manifestly or is dependent on a f/w attribute 905251881Speter * but may or may not actually be *enabled*. In any case, it 906251881Speter * is enabled on a per-channel basis. 907251881Speter */ 908251881Speter#define ISP_CAP_FCTAPE(isp) \ 909251881Speter (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_FCTAPE)) 910251881Speter 911251881Speter#define ISP_FCTAPE_ENABLED(isp, chan) \ 912251881Speter (IS_24XX(isp)? (FCPARAM(isp, chan)->isp_xfwoptions & ICB2400_OPT2_FCTAPE) != 0 : (FCPARAM(isp, chan)->isp_xfwoptions & ICBXOPT_FCTAPE) != 0) 913251881Speter 914251881Speter/* 915251881Speter * Reduced Interrupt Operation Response Queue Entries 916251881Speter */ 917251881Speter 918251881Spetertypedef struct { 919251881Speter isphdr_t req_header; 920299742Sdim uint32_t req_handles[15]; 921299742Sdim} isp_rio1_t; 922299742Sdim 923299742Sdimtypedef struct { 924299742Sdim isphdr_t req_header; 925299742Sdim uint16_t req_handles[30]; 926299742Sdim} isp_rio2_t; 927299742Sdim 928299742Sdim/* 929251881Speter * FC (ISP2100/ISP2200/ISP2300/ISP2400) specific data structures 930251881Speter */ 931251881Speter 932251881Speter/* 933251881Speter * Initialization Control Block 934251881Speter * 935251881Speter * Version One (prime) format. 936251881Speter */ 937251881Spetertypedef struct { 938251881Speter uint8_t icb_version; 939251881Speter uint8_t icb_reserved0; 940251881Speter uint16_t icb_fwoptions; 941251881Speter uint16_t icb_maxfrmlen; 942251881Speter uint16_t icb_maxalloc; 943251881Speter uint16_t icb_execthrottle; 944251881Speter uint8_t icb_retry_count; 945251881Speter uint8_t icb_retry_delay; 946251881Speter uint8_t icb_portname[8]; 947251881Speter uint16_t icb_hardaddr; 948251881Speter uint8_t icb_iqdevtype; 949251881Speter uint8_t icb_logintime; 950251881Speter uint8_t icb_nodename[8]; 951251881Speter uint16_t icb_rqstout; 952262253Speter uint16_t icb_rspnsin; 953251881Speter uint16_t icb_rqstqlen; 954251881Speter uint16_t icb_rsltqlen; 955251881Speter uint16_t icb_rqstaddr[4]; 956251881Speter uint16_t icb_respaddr[4]; 957251881Speter uint16_t icb_lunenables; 958251881Speter uint8_t icb_ccnt; 959251881Speter uint8_t icb_icnt; 960251881Speter uint16_t icb_lunetimeout; 961251881Speter uint16_t icb_reserved1; 962251881Speter uint16_t icb_xfwoptions; 963251881Speter uint8_t icb_racctimer; 964251881Speter uint8_t icb_idelaytimer; 965251881Speter uint16_t icb_zfwoptions; 966251881Speter uint16_t icb_reserved2[13]; 967251881Speter} isp_icb_t; 968251881Speter 969251881Speter#define ICB_VERSION1 1 970251881Speter 971251881Speter#define ICBOPT_EXTENDED 0x8000 972251881Speter#define ICBOPT_BOTH_WWNS 0x4000 973251881Speter#define ICBOPT_FULL_LOGIN 0x2000 974251881Speter#define ICBOPT_STOP_ON_QFULL 0x1000 /* 2200/2100 only */ 975251881Speter#define ICBOPT_PREV_ADDRESS 0x0800 976251881Speter#define ICBOPT_SRCHDOWN 0x0400 977251881Speter#define ICBOPT_NOLIP 0x0200 978251881Speter#define ICBOPT_PDBCHANGE_AE 0x0100 979251881Speter#define ICBOPT_TGT_TYPE 0x0080 980251881Speter#define ICBOPT_INI_ADISC 0x0040 981251881Speter#define ICBOPT_INI_DISABLE 0x0020 982251881Speter#define ICBOPT_TGT_ENABLE 0x0010 983251881Speter#define ICBOPT_FAST_POST 0x0008 984253734Speter#define ICBOPT_FULL_DUPLEX 0x0004 985299742Sdim#define ICBOPT_FAIRNESS 0x0002 986251881Speter#define ICBOPT_HARD_ADDRESS 0x0001 987 988#define ICBXOPT_NO_LOGOUT 0x8000 /* no logout on link failure */ 989#define ICBXOPT_FCTAPE_CCQ 0x4000 /* FC-Tape Command Queueing */ 990#define ICBXOPT_FCTAPE_CONFIRM 0x2000 991#define ICBXOPT_FCTAPE 0x1000 992#define ICBXOPT_CLASS2_ACK0 0x0200 993#define ICBXOPT_CLASS2 0x0100 994#define ICBXOPT_NO_PLAY 0x0080 /* don't play if can't get hard addr */ 995#define ICBXOPT_TOPO_MASK 0x0070 996#define ICBXOPT_LOOP_ONLY 0x0000 997#define ICBXOPT_PTP_ONLY 0x0010 998#define ICBXOPT_LOOP_2_PTP 0x0020 999#define ICBXOPT_PTP_2_LOOP 0x0030 1000/* 1001 * The lower 4 bits of the xfwoptions field are the OPERATION MODE bits. 1002 * RIO is not defined for the 23XX cards (just 2200) 1003 */ 1004#define ICBXOPT_RIO_OFF 0 1005#define ICBXOPT_RIO_16BIT 1 1006#define ICBXOPT_RIO_32BIT 2 1007#define ICBXOPT_RIO_16BIT_IOCB 3 1008#define ICBXOPT_RIO_32BIT_IOCB 4 1009#define ICBXOPT_ZIO 5 1010#define ICBXOPT_TIMER_MASK 0x7 1011 1012#define ICBZOPT_RATE_MASK 0xC000 1013#define ICBZOPT_RATE_1GB 0x0000 1014#define ICBZOPT_RATE_AUTO 0x8000 1015#define ICBZOPT_RATE_2GB 0x4000 1016#define ICBZOPT_50_OHM 0x2000 1017#define ICBZOPT_NO_LOCAL_PLOGI 0x0080 1018#define ICBZOPT_ENA_OOF 0x0040 /* out of order frame handling */ 1019#define ICBZOPT_RSPSZ_MASK 0x0030 1020#define ICBZOPT_RSPSZ_24 0x0000 1021#define ICBZOPT_RSPSZ_12 0x0010 1022#define ICBZOPT_RSPSZ_24A 0x0020 1023#define ICBZOPT_RSPSZ_32 0x0030 1024#define ICBZOPT_SOFTID 0x0002 1025#define ICBZOPT_ENA_RDXFR_RDY 0x0001 1026 1027/* 2400 F/W options */ 1028#define ICB2400_OPT1_BOTH_WWNS 0x00004000 1029#define ICB2400_OPT1_FULL_LOGIN 0x00002000 1030#define ICB2400_OPT1_PREV_ADDRESS 0x00000800 1031#define ICB2400_OPT1_SRCHDOWN 0x00000400 1032#define ICB2400_OPT1_NOLIP 0x00000200 1033#define ICB2400_OPT1_INI_DISABLE 0x00000020 1034#define ICB2400_OPT1_TGT_ENABLE 0x00000010 1035#define ICB2400_OPT1_FULL_DUPLEX 0x00000004 1036#define ICB2400_OPT1_FAIRNESS 0x00000002 1037#define ICB2400_OPT1_HARD_ADDRESS 0x00000001 1038 1039#define ICB2400_OPT2_ENA_ATIOMQ 0x08000000 1040#define ICB2400_OPT2_ENA_IHA 0x04000000 1041#define ICB2400_OPT2_QOS 0x02000000 1042#define ICB2400_OPT2_IOCBS 0x01000000 1043#define ICB2400_OPT2_ENA_IHR 0x00400000 1044#define ICB2400_OPT2_ENA_VMS 0x00200000 1045#define ICB2400_OPT2_ENA_TA 0x00100000 1046#define ICB2400_OPT2_TPRLIC 0x00004000 1047#define ICB2400_OPT2_FCTAPE 0x00001000 1048#define ICB2400_OPT2_FCSP 0x00000800 1049#define ICB2400_OPT2_CLASS2_ACK0 0x00000200 1050#define ICB2400_OPT2_CLASS2 0x00000100 1051#define ICB2400_OPT2_NO_PLAY 0x00000080 1052#define ICB2400_OPT2_TOPO_MASK 0x00000070 1053#define ICB2400_OPT2_LOOP_ONLY 0x00000000 1054#define ICB2400_OPT2_PTP_ONLY 0x00000010 1055#define ICB2400_OPT2_LOOP_2_PTP 0x00000020 1056#define ICB2400_OPT2_TIMER_MASK 0x0000000f 1057#define ICB2400_OPT2_ZIO 0x00000005 1058#define ICB2400_OPT2_ZIO1 0x00000006 1059 1060#define ICB2400_OPT3_NO_CTXDIS 0x40000000 1061#define ICB2400_OPT3_ENA_ETH_RESP 0x08000000 1062#define ICB2400_OPT3_ENA_ETH_ATIO 0x04000000 1063#define ICB2400_OPT3_ENA_MFCF 0x00020000 1064#define ICB2400_OPT3_SKIP_4GB 0x00010000 1065#define ICB2400_OPT3_RATE_MASK 0x0000E000 1066#define ICB2400_OPT3_RATE_1GB 0x00000000 1067#define ICB2400_OPT3_RATE_2GB 0x00002000 1068#define ICB2400_OPT3_RATE_AUTO 0x00004000 1069#define ICB2400_OPT3_RATE_4GB 0x00006000 1070#define ICB2400_OPT3_RATE_8GB 0x00008000 1071#define ICB2400_OPT3_RATE_16GB 0x0000A000 1072#define ICB2400_OPT3_ENA_OOF_XFRDY 0x00000200 1073#define ICB2400_OPT3_NO_N2N_LOGI 0x00000100 1074#define ICB2400_OPT3_NO_LOCAL_PLOGI 0x00000080 1075#define ICB2400_OPT3_ENA_OOF 0x00000040 1076/* note that a response size flag of zero is reserved! */ 1077#define ICB2400_OPT3_RSPSZ_MASK 0x00000030 1078#define ICB2400_OPT3_RSPSZ_12 0x00000010 1079#define ICB2400_OPT3_RSPSZ_24 0x00000020 1080#define ICB2400_OPT3_RSPSZ_32 0x00000030 1081#define ICB2400_OPT3_SOFTID 0x00000002 1082 1083#define ICB_MIN_FRMLEN 256 1084#define ICB_MAX_FRMLEN 2112 1085#define ICB_DFLT_FRMLEN 1024 1086#define ICB_DFLT_ALLOC 256 1087#define ICB_DFLT_THROTTLE 16 1088#define ICB_DFLT_RDELAY 5 1089#define ICB_DFLT_RCOUNT 3 1090 1091#define ICB_LOGIN_TOV 10 1092#define ICB_LUN_ENABLE_TOV 15 1093 1094 1095/* 1096 * And somebody at QLogic had a great idea that you could just change 1097 * the structure *and* keep the version number the same as the other cards. 1098 */ 1099typedef struct { 1100 uint16_t icb_version; 1101 uint16_t icb_reserved0; 1102 uint16_t icb_maxfrmlen; 1103 uint16_t icb_execthrottle; 1104 uint16_t icb_xchgcnt; 1105 uint16_t icb_hardaddr; 1106 uint8_t icb_portname[8]; 1107 uint8_t icb_nodename[8]; 1108 uint16_t icb_rspnsin; 1109 uint16_t icb_rqstout; 1110 uint16_t icb_retry_count; 1111 uint16_t icb_priout; 1112 uint16_t icb_rsltqlen; 1113 uint16_t icb_rqstqlen; 1114 uint16_t icb_ldn_nols; 1115 uint16_t icb_prqstqlen; 1116 uint16_t icb_rqstaddr[4]; 1117 uint16_t icb_respaddr[4]; 1118 uint16_t icb_priaddr[4]; 1119 uint16_t icb_msixresp; 1120 uint16_t icb_msixatio; 1121 uint16_t icb_reserved1[2]; 1122 uint16_t icb_atio_in; 1123 uint16_t icb_atioqlen; 1124 uint16_t icb_atioqaddr[4]; 1125 uint16_t icb_idelaytimer; 1126 uint16_t icb_logintime; 1127 uint32_t icb_fwoptions1; 1128 uint32_t icb_fwoptions2; 1129 uint32_t icb_fwoptions3; 1130 uint16_t icb_qos; 1131 uint16_t icb_reserved2[3]; 1132 uint16_t icb_enodemac[3]; 1133 uint16_t icb_disctime; 1134 uint16_t icb_reserved3[4]; 1135} isp_icb_2400_t; 1136 1137#define RQRSP_ADDR0015 0 1138#define RQRSP_ADDR1631 1 1139#define RQRSP_ADDR3247 2 1140#define RQRSP_ADDR4863 3 1141 1142 1143#define ICB_NNM0 7 1144#define ICB_NNM1 6 1145#define ICB_NNM2 5 1146#define ICB_NNM3 4 1147#define ICB_NNM4 3 1148#define ICB_NNM5 2 1149#define ICB_NNM6 1 1150#define ICB_NNM7 0 1151 1152#define MAKE_NODE_NAME_FROM_WWN(array, wwn) \ 1153 array[ICB_NNM0] = (uint8_t) ((wwn >> 0) & 0xff), \ 1154 array[ICB_NNM1] = (uint8_t) ((wwn >> 8) & 0xff), \ 1155 array[ICB_NNM2] = (uint8_t) ((wwn >> 16) & 0xff), \ 1156 array[ICB_NNM3] = (uint8_t) ((wwn >> 24) & 0xff), \ 1157 array[ICB_NNM4] = (uint8_t) ((wwn >> 32) & 0xff), \ 1158 array[ICB_NNM5] = (uint8_t) ((wwn >> 40) & 0xff), \ 1159 array[ICB_NNM6] = (uint8_t) ((wwn >> 48) & 0xff), \ 1160 array[ICB_NNM7] = (uint8_t) ((wwn >> 56) & 0xff) 1161 1162#define MAKE_WWN_FROM_NODE_NAME(wwn, array) \ 1163 wwn = ((uint64_t) array[ICB_NNM0]) | \ 1164 ((uint64_t) array[ICB_NNM1] << 8) | \ 1165 ((uint64_t) array[ICB_NNM2] << 16) | \ 1166 ((uint64_t) array[ICB_NNM3] << 24) | \ 1167 ((uint64_t) array[ICB_NNM4] << 32) | \ 1168 ((uint64_t) array[ICB_NNM5] << 40) | \ 1169 ((uint64_t) array[ICB_NNM6] << 48) | \ 1170 ((uint64_t) array[ICB_NNM7] << 56) 1171 1172 1173/* 1174 * For MULTI_ID firmware, this describes a 1175 * virtual port entity for getting status. 1176 */ 1177typedef struct { 1178 uint16_t vp_port_status; 1179 uint8_t vp_port_options; 1180 uint8_t vp_port_loopid; 1181 uint8_t vp_port_portname[8]; 1182 uint8_t vp_port_nodename[8]; 1183 uint16_t vp_port_portid_lo; /* not present when trailing icb */ 1184 uint16_t vp_port_portid_hi; /* not present when trailing icb */ 1185} vp_port_info_t; 1186 1187#define ICB2400_VPOPT_ENA_SNSLOGIN 0x00000040 /* Enable SNS Login and SCR for Virtual Ports */ 1188#define ICB2400_VPOPT_TGT_DISABLE 0x00000020 /* Target Mode Disabled */ 1189#define ICB2400_VPOPT_INI_ENABLE 0x00000010 /* Initiator Mode Enabled */ 1190#define ICB2400_VPOPT_ENABLED 0x00000008 /* VP Enabled */ 1191#define ICB2400_VPOPT_NOPLAY 0x00000004 /* ID Not Acquired */ 1192#define ICB2400_VPOPT_PREV_ADDRESS 0x00000002 /* Previously Assigned ID */ 1193#define ICB2400_VPOPT_HARD_ADDRESS 0x00000001 /* Hard Assigned ID */ 1194 1195#define ICB2400_VPOPT_WRITE_SIZE 20 1196 1197/* 1198 * For MULTI_ID firmware, we append this structure 1199 * to the isp_icb_2400_t above, followed by a list 1200 * structures that are *most* of the vp_port_info_t. 1201 */ 1202typedef struct { 1203 uint16_t vp_count; 1204 uint16_t vp_global_options; 1205} isp_icb_2400_vpinfo_t; 1206 1207#define ICB2400_VPINFO_OFF 0x80 /* offset from start of ICB */ 1208#define ICB2400_VPINFO_PORT_OFF(chan) \ 1209 (ICB2400_VPINFO_OFF + \ 1210 sizeof (isp_icb_2400_vpinfo_t) + (chan * ICB2400_VPOPT_WRITE_SIZE)) 1211 1212#define ICB2400_VPGOPT_FCA 0x01 /* Assume Clean Address bit in FLOGI ACC set (works only in static configurations) */ 1213#define ICB2400_VPGOPT_MID_DISABLE 0x02 /* when set, connection mode2 will work with NPIV-capable switched */ 1214#define ICB2400_VPGOPT_VP0_DECOUPLE 0x04 /* Allow VP0 decoupling if firmware supports it */ 1215#define ICB2400_VPGOPT_SUSP_FDISK 0x10 /* Suspend FDISC for Enabled VPs */ 1216#define ICB2400_VPGOPT_GEN_RIDA 0x20 /* Generate RIDA if FLOGI Fails */ 1217 1218typedef struct { 1219 isphdr_t vp_ctrl_hdr; 1220 uint32_t vp_ctrl_handle; 1221 uint16_t vp_ctrl_index_fail; 1222 uint16_t vp_ctrl_status; 1223 uint16_t vp_ctrl_command; 1224 uint16_t vp_ctrl_vp_count; 1225 uint16_t vp_ctrl_idmap[16]; 1226 uint16_t vp_ctrl_reserved[7]; 1227 uint16_t vp_ctrl_fcf_index; 1228} vp_ctrl_info_t; 1229 1230#define VP_CTRL_CMD_ENABLE_VP 0x00 1231#define VP_CTRL_CMD_DISABLE_VP 0x08 1232#define VP_CTRL_CMD_DISABLE_VP_REINIT_LINK 0x09 1233#define VP_CTRL_CMD_DISABLE_VP_LOGO 0x0A 1234#define VP_CTRL_CMD_DISABLE_VP_LOGO_ALL 0x0B 1235 1236/* 1237 * We can use this structure for modifying either one or two VP ports after initialization 1238 */ 1239typedef struct { 1240 isphdr_t vp_mod_hdr; 1241 uint32_t vp_mod_hdl; 1242 uint16_t vp_mod_reserved0; 1243 uint16_t vp_mod_status; 1244 uint8_t vp_mod_cmd; 1245 uint8_t vp_mod_cnt; 1246 uint8_t vp_mod_idx0; 1247 uint8_t vp_mod_idx1; 1248 struct { 1249 uint8_t options; 1250 uint8_t loopid; 1251 uint16_t reserved1; 1252 uint8_t wwpn[8]; 1253 uint8_t wwnn[8]; 1254 } vp_mod_ports[2]; 1255 uint8_t vp_mod_reserved2[8]; 1256} vp_modify_t; 1257 1258#define VP_STS_OK 0x00 1259#define VP_STS_ERR 0x01 1260#define VP_CNT_ERR 0x02 1261#define VP_GEN_ERR 0x03 1262#define VP_IDX_ERR 0x04 1263#define VP_STS_BSY 0x05 1264 1265#define VP_MODIFY 0x00 1266#define VP_MODIFY_ENA 0x01 1267#define VP_MODIFY_OPT 0x02 1268#define VP_RESUME 0x03 1269 1270/* 1271 * Port Data Base Element 1272 */ 1273 1274typedef struct { 1275 uint16_t pdb_options; 1276 uint8_t pdb_mstate; 1277 uint8_t pdb_sstate; 1278 uint8_t pdb_hardaddr_bits[4]; 1279 uint8_t pdb_portid_bits[4]; 1280 uint8_t pdb_nodename[8]; 1281 uint8_t pdb_portname[8]; 1282 uint16_t pdb_execthrottle; 1283 uint16_t pdb_exec_count; 1284 uint8_t pdb_retry_count; 1285 uint8_t pdb_retry_delay; 1286 uint16_t pdb_resalloc; 1287 uint16_t pdb_curalloc; 1288 uint16_t pdb_qhead; 1289 uint16_t pdb_qtail; 1290 uint16_t pdb_tl_next; 1291 uint16_t pdb_tl_last; 1292 uint16_t pdb_features; /* PLOGI, Common Service */ 1293 uint16_t pdb_pconcurrnt; /* PLOGI, Common Service */ 1294 uint16_t pdb_roi; /* PLOGI, Common Service */ 1295 uint8_t pdb_target; 1296 uint8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 1297 uint16_t pdb_rdsiz; /* PLOGI, Class 3 */ 1298 uint16_t pdb_ncseq; /* PLOGI, Class 3 */ 1299 uint16_t pdb_noseq; /* PLOGI, Class 3 */ 1300 uint16_t pdb_labrtflg; 1301 uint16_t pdb_lstopflg; 1302 uint16_t pdb_sqhead; 1303 uint16_t pdb_sqtail; 1304 uint16_t pdb_ptimer; 1305 uint16_t pdb_nxt_seqid; 1306 uint16_t pdb_fcount; 1307 uint16_t pdb_prli_len; 1308 uint16_t pdb_prli_svc0; 1309 uint16_t pdb_prli_svc3; 1310 uint16_t pdb_loopid; 1311 uint16_t pdb_il_ptr; 1312 uint16_t pdb_sl_ptr; 1313} isp_pdb_21xx_t; 1314 1315#define PDB_OPTIONS_XMITTING (1<<11) 1316#define PDB_OPTIONS_LNKXMIT (1<<10) 1317#define PDB_OPTIONS_ABORTED (1<<9) 1318#define PDB_OPTIONS_ADISC (1<<1) 1319 1320#define PDB_STATE_DISCOVERY 0 1321#define PDB_STATE_WDISC_ACK 1 1322#define PDB_STATE_PLOGI 2 1323#define PDB_STATE_PLOGI_ACK 3 1324#define PDB_STATE_PRLI 4 1325#define PDB_STATE_PRLI_ACK 5 1326#define PDB_STATE_LOGGED_IN 6 1327#define PDB_STATE_PORT_UNAVAIL 7 1328#define PDB_STATE_PRLO 8 1329#define PDB_STATE_PRLO_ACK 9 1330#define PDB_STATE_PLOGO 10 1331#define PDB_STATE_PLOG_ACK 11 1332 1333#define SVC3_ROLE_MASK 0x30 1334#define SVC3_ROLE_SHIFT 4 1335 1336#define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2]) 1337#define BITS2WORD_24XX(x) ((x)[0] << 16 | (x)[1] << 8 | (x)[2]) 1338 1339/* 1340 * Port Data Base Element- 24XX cards 1341 */ 1342typedef struct { 1343 uint16_t pdb_flags; 1344 uint8_t pdb_curstate; 1345 uint8_t pdb_laststate; 1346 uint8_t pdb_hardaddr_bits[4]; 1347 uint8_t pdb_portid_bits[4]; 1348#define pdb_nxt_seqid_2400 pdb_portid_bits[3] 1349 uint16_t pdb_retry_timer; 1350 uint16_t pdb_handle; 1351 uint16_t pdb_rcv_dsize; 1352 uint16_t pdb_reserved0; 1353 uint16_t pdb_prli_svc0; 1354 uint16_t pdb_prli_svc3; 1355 uint8_t pdb_portname[8]; 1356 uint8_t pdb_nodename[8]; 1357 uint8_t pdb_reserved1[24]; 1358} isp_pdb_24xx_t; 1359 1360#define PDB2400_TID_SUPPORTED 0x4000 1361#define PDB2400_FC_TAPE 0x0080 1362#define PDB2400_CLASS2_ACK0 0x0040 1363#define PDB2400_FCP_CONF 0x0020 1364#define PDB2400_CLASS2 0x0010 1365#define PDB2400_ADDR_VALID 0x0002 1366 1367#define PDB2400_STATE_PLOGI_PEND 0x03 1368#define PDB2400_STATE_PLOGI_DONE 0x04 1369#define PDB2400_STATE_PRLI_PEND 0x05 1370#define PDB2400_STATE_LOGGED_IN 0x06 1371#define PDB2400_STATE_PORT_UNAVAIL 0x07 1372#define PDB2400_STATE_PRLO_PEND 0x09 1373#define PDB2400_STATE_LOGO_PEND 0x0B 1374 1375/* 1376 * Common elements from the above two structures that are actually useful to us. 1377 */ 1378typedef struct { 1379 uint16_t handle; 1380 uint16_t prli_word3; 1381 uint32_t : 8, 1382 portid : 24; 1383 uint8_t portname[8]; 1384 uint8_t nodename[8]; 1385} isp_pdb_t; 1386 1387/* 1388 * Port/Node Name List Element 1389 */ 1390typedef struct { 1391 uint8_t pnnle_name[8]; 1392 uint16_t pnnle_handle; 1393 uint16_t pnnle_reserved; 1394} isp_pnnle_t; 1395 1396#define PNNL_OPTIONS_NODE_NAMES (1<<0) 1397#define PNNL_OPTIONS_PORT_DATA (1<<2) 1398#define PNNL_OPTIONS_INITIATORS (1<<3) 1399 1400/* 1401 * Port and N-Port Handle List Element 1402 */ 1403typedef struct { 1404 uint16_t pnhle_port_id_lo; 1405 uint16_t pnhle_port_id_hi_handle; 1406} isp_pnhle_21xx_t; 1407 1408typedef struct { 1409 uint16_t pnhle_port_id_lo; 1410 uint16_t pnhle_port_id_hi; 1411 uint16_t pnhle_handle; 1412} isp_pnhle_23xx_t; 1413 1414typedef struct { 1415 uint16_t pnhle_port_id_lo; 1416 uint16_t pnhle_port_id_hi; 1417 uint16_t pnhle_handle; 1418 uint16_t pnhle_reserved; 1419} isp_pnhle_24xx_t; 1420 1421/* 1422 * Port Database Changed Async Event information for 24XX cards 1423 */ 1424#define PDB24XX_AE_OK 0x00 1425#define PDB24XX_AE_IMPL_LOGO_1 0x01 1426#define PDB24XX_AE_IMPL_LOGO_2 0x02 1427#define PDB24XX_AE_IMPL_LOGO_3 0x03 1428#define PDB24XX_AE_PLOGI_RCVD 0x04 1429#define PDB24XX_AE_PLOGI_RJT 0x05 1430#define PDB24XX_AE_PRLI_RCVD 0x06 1431#define PDB24XX_AE_PRLI_RJT 0x07 1432#define PDB24XX_AE_TPRLO 0x08 1433#define PDB24XX_AE_TPRLO_RJT 0x09 1434#define PDB24XX_AE_PRLO_RCVD 0x0a 1435#define PDB24XX_AE_LOGO_RCVD 0x0b 1436#define PDB24XX_AE_TOPO_CHG 0x0c 1437#define PDB24XX_AE_NPORT_CHG 0x0d 1438#define PDB24XX_AE_FLOGI_RJT 0x0e 1439#define PDB24XX_AE_BAD_FANN 0x0f 1440#define PDB24XX_AE_FLOGI_TIMO 0x10 1441#define PDB24XX_AE_ABX_LOGO 0x11 1442#define PDB24XX_AE_PLOGI_DONE 0x12 1443#define PDB24XX_AE_PRLI_DONJE 0x13 1444#define PDB24XX_AE_OPN_1 0x14 1445#define PDB24XX_AE_OPN_2 0x15 1446#define PDB24XX_AE_TXERR 0x16 1447#define PDB24XX_AE_FORCED_LOGO 0x17 1448#define PDB24XX_AE_DISC_TIMO 0x18 1449 1450/* 1451 * Genericized Port Login/Logout software structure 1452 */ 1453typedef struct { 1454 uint16_t handle; 1455 uint16_t channel; 1456 uint32_t 1457 flags : 8, 1458 portid : 24; 1459} isp_plcmd_t; 1460/* the flags to use are those for PLOGX_FLG_* below */ 1461 1462/* 1463 * ISP24XX- Login/Logout Port IOCB 1464 */ 1465typedef struct { 1466 isphdr_t plogx_header; 1467 uint32_t plogx_handle; 1468 uint16_t plogx_status; 1469 uint16_t plogx_nphdl; 1470 uint16_t plogx_flags; 1471 uint16_t plogx_vphdl; /* low 8 bits */ 1472 uint16_t plogx_portlo; /* low 16 bits */ 1473 uint16_t plogx_rspsz_porthi; 1474 struct { 1475 uint16_t lo16; 1476 uint16_t hi16; 1477 } plogx_ioparm[11]; 1478} isp_plogx_t; 1479 1480#define PLOGX_STATUS_OK 0x00 1481#define PLOGX_STATUS_UNAVAIL 0x28 1482#define PLOGX_STATUS_LOGOUT 0x29 1483#define PLOGX_STATUS_IOCBERR 0x31 1484 1485#define PLOGX_IOCBERR_NOLINK 0x01 1486#define PLOGX_IOCBERR_NOIOCB 0x02 1487#define PLOGX_IOCBERR_NOXGHG 0x03 1488#define PLOGX_IOCBERR_FAILED 0x04 /* further info in IOPARM 1 */ 1489#define PLOGX_IOCBERR_NOFABRIC 0x05 1490#define PLOGX_IOCBERR_NOTREADY 0x07 1491#define PLOGX_IOCBERR_NOLOGIN 0x09 /* further info in IOPARM 1 */ 1492#define PLOGX_IOCBERR_NOPCB 0x0a 1493#define PLOGX_IOCBERR_REJECT 0x18 /* further info in IOPARM 1 */ 1494#define PLOGX_IOCBERR_EINVAL 0x19 /* further info in IOPARM 1 */ 1495#define PLOGX_IOCBERR_PORTUSED 0x1a /* further info in IOPARM 1 */ 1496#define PLOGX_IOCBERR_HNDLUSED 0x1b /* further info in IOPARM 1 */ 1497#define PLOGX_IOCBERR_NOHANDLE 0x1c 1498#define PLOGX_IOCBERR_NOFLOGI 0x1f /* further info in IOPARM 1 */ 1499 1500#define PLOGX_FLG_CMD_MASK 0xf 1501#define PLOGX_FLG_CMD_PLOGI 0 1502#define PLOGX_FLG_CMD_PRLI 1 1503#define PLOGX_FLG_CMD_PDISC 2 1504#define PLOGX_FLG_CMD_LOGO 8 1505#define PLOGX_FLG_CMD_PRLO 9 1506#define PLOGX_FLG_CMD_TPRLO 10 1507 1508#define PLOGX_FLG_COND_PLOGI 0x10 /* if with PLOGI */ 1509#define PLOGX_FLG_IMPLICIT 0x10 /* if with LOGO, PRLO, TPRLO */ 1510#define PLOGX_FLG_SKIP_PRLI 0x20 /* if with PLOGI */ 1511#define PLOGX_FLG_IMPLICIT_LOGO_ALL 0x20 /* if with LOGO */ 1512#define PLOGX_FLG_EXPLICIT_LOGO 0x40 /* if with LOGO */ 1513#define PLOGX_FLG_COMMON_FEATURES 0x80 /* if with PLOGI */ 1514#define PLOGX_FLG_FREE_NPHDL 0x80 /* if with with LOGO */ 1515 1516#define PLOGX_FLG_CLASS2 0x100 /* if with PLOGI */ 1517#define PLOGX_FLG_FCP2_OVERRIDE 0x200 /* if with PRLOG, PRLI */ 1518 1519/* 1520 * Report ID Acquisistion (24XX multi-id firmware) 1521 */ 1522typedef struct { 1523 isphdr_t ridacq_hdr; 1524 uint32_t ridacq_handle; 1525 uint8_t ridacq_vp_acquired; 1526 uint8_t ridacq_vp_setup; 1527 uint8_t ridacq_vp_index; 1528 uint8_t ridacq_vp_status; 1529 uint16_t ridacq_vp_port_lo; 1530 uint8_t ridacq_vp_port_hi; 1531 uint8_t ridacq_format; /* 0 or 1 */ 1532 uint16_t ridacq_map[8]; 1533 uint8_t ridacq_reserved1[32]; 1534} isp_ridacq_t; 1535 1536#define RIDACQ_STS_COMPLETE 0 1537#define RIDACQ_STS_UNACQUIRED 1 1538#define RIDACQ_STS_CHANGED 2 1539#define RIDACQ_STS_SNS_TIMEOUT 3 1540#define RIDACQ_STS_SNS_REJECTED 4 1541#define RIDACQ_STS_SCR_TIMEOUT 5 1542#define RIDACQ_STS_SCR_REJECTED 6 1543 1544/* 1545 * Simple Name Server Data Structures 1546 */ 1547#define SNS_GA_NXT 0x100 1548#define SNS_GPN_ID 0x112 1549#define SNS_GNN_ID 0x113 1550#define SNS_GFF_ID 0x11F 1551#define SNS_GID_FT 0x171 1552#define SNS_RFT_ID 0x217 1553#define SNS_RSPN_ID 0x218 1554#define SNS_RFF_ID 0x21F 1555#define SNS_RSNN_NN 0x239 1556typedef struct { 1557 uint16_t snscb_rblen; /* response buffer length (words) */ 1558 uint16_t snscb_reserved0; 1559 uint16_t snscb_addr[4]; /* response buffer address */ 1560 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1561 uint16_t snscb_reserved1; 1562 uint16_t snscb_data[]; /* variable data */ 1563} sns_screq_t; /* Subcommand Request Structure */ 1564 1565typedef struct { 1566 uint16_t snscb_rblen; /* response buffer length (words) */ 1567 uint16_t snscb_reserved0; 1568 uint16_t snscb_addr[4]; /* response buffer address */ 1569 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1570 uint16_t snscb_reserved1; 1571 uint16_t snscb_cmd; 1572 uint16_t snscb_reserved2; 1573 uint32_t snscb_reserved3; 1574 uint32_t snscb_port; 1575} sns_ga_nxt_req_t; 1576#define SNS_GA_NXT_REQ_SIZE (sizeof (sns_ga_nxt_req_t)) 1577 1578typedef struct { 1579 uint16_t snscb_rblen; /* response buffer length (words) */ 1580 uint16_t snscb_reserved0; 1581 uint16_t snscb_addr[4]; /* response buffer address */ 1582 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1583 uint16_t snscb_reserved1; 1584 uint16_t snscb_cmd; 1585 uint16_t snscb_reserved2; 1586 uint32_t snscb_reserved3; 1587 uint32_t snscb_portid; 1588} sns_gxn_id_req_t; 1589#define SNS_GXN_ID_REQ_SIZE (sizeof (sns_gxn_id_req_t)) 1590 1591typedef struct { 1592 uint16_t snscb_rblen; /* response buffer length (words) */ 1593 uint16_t snscb_reserved0; 1594 uint16_t snscb_addr[4]; /* response buffer address */ 1595 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1596 uint16_t snscb_reserved1; 1597 uint16_t snscb_cmd; 1598 uint16_t snscb_mword_div_2; 1599 uint32_t snscb_reserved3; 1600 uint32_t snscb_fc4_type; 1601} sns_gid_ft_req_t; 1602#define SNS_GID_FT_REQ_SIZE (sizeof (sns_gid_ft_req_t)) 1603 1604typedef struct { 1605 uint16_t snscb_rblen; /* response buffer length (words) */ 1606 uint16_t snscb_reserved0; 1607 uint16_t snscb_addr[4]; /* response buffer address */ 1608 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1609 uint16_t snscb_reserved1; 1610 uint16_t snscb_cmd; 1611 uint16_t snscb_reserved2; 1612 uint32_t snscb_reserved3; 1613 uint32_t snscb_port; 1614 uint32_t snscb_fc4_types[8]; 1615} sns_rft_id_req_t; 1616#define SNS_RFT_ID_REQ_SIZE (sizeof (sns_rft_id_req_t)) 1617 1618typedef struct { 1619 ct_hdr_t snscb_cthdr; 1620 uint8_t snscb_port_type; 1621 uint8_t snscb_port_id[3]; 1622 uint8_t snscb_portname[8]; 1623 uint16_t snscb_data[]; /* variable data */ 1624} sns_scrsp_t; /* Subcommand Response Structure */ 1625 1626typedef struct { 1627 ct_hdr_t snscb_cthdr; 1628 uint8_t snscb_port_type; 1629 uint8_t snscb_port_id[3]; 1630 uint8_t snscb_portname[8]; 1631 uint8_t snscb_pnlen; /* symbolic port name length */ 1632 uint8_t snscb_pname[255]; /* symbolic port name */ 1633 uint8_t snscb_nodename[8]; 1634 uint8_t snscb_nnlen; /* symbolic node name length */ 1635 uint8_t snscb_nname[255]; /* symbolic node name */ 1636 uint8_t snscb_ipassoc[8]; 1637 uint8_t snscb_ipaddr[16]; 1638 uint8_t snscb_svc_class[4]; 1639 uint8_t snscb_fc4_types[32]; 1640 uint8_t snscb_fpname[8]; 1641 uint8_t snscb_reserved; 1642 uint8_t snscb_hardaddr[3]; 1643} sns_ga_nxt_rsp_t; /* Subcommand Response Structure */ 1644#define SNS_GA_NXT_RESP_SIZE (sizeof (sns_ga_nxt_rsp_t)) 1645 1646typedef struct { 1647 ct_hdr_t snscb_cthdr; 1648 uint8_t snscb_wwn[8]; 1649} sns_gxn_id_rsp_t; 1650#define SNS_GXN_ID_RESP_SIZE (sizeof (sns_gxn_id_rsp_t)) 1651 1652typedef struct { 1653 ct_hdr_t snscb_cthdr; 1654 uint32_t snscb_fc4_features[32]; 1655} sns_gff_id_rsp_t; 1656#define SNS_GFF_ID_RESP_SIZE (sizeof (sns_gff_id_rsp_t)) 1657 1658typedef struct { 1659 ct_hdr_t snscb_cthdr; 1660 struct { 1661 uint8_t control; 1662 uint8_t portid[3]; 1663 } snscb_ports[1]; 1664} sns_gid_ft_rsp_t; 1665#define SNS_GID_FT_RESP_SIZE(x) ((sizeof (sns_gid_ft_rsp_t)) + ((x - 1) << 2)) 1666#define SNS_RFT_ID_RESP_SIZE (sizeof (ct_hdr_t)) 1667 1668/* 1669 * Other Misc Structures 1670 */ 1671 1672/* ELS Pass Through */ 1673typedef struct { 1674 isphdr_t els_hdr; 1675 uint32_t els_handle; 1676 uint16_t els_status; 1677 uint16_t els_nphdl; 1678 uint16_t els_xmit_dsd_count; /* outgoing only */ 1679 uint8_t els_vphdl; 1680 uint8_t els_sof; 1681 uint32_t els_rxid; 1682 uint16_t els_recv_dsd_count; /* outgoing only */ 1683 uint8_t els_opcode; 1684 uint8_t els_reserved1; 1685 uint8_t els_did_lo; 1686 uint8_t els_did_mid; 1687 uint8_t els_did_hi; 1688 uint8_t els_reserved2; 1689 uint16_t els_reserved3; 1690 uint16_t els_ctl_flags; 1691 union { 1692 struct { 1693 uint32_t _els_bytecnt; 1694 uint32_t _els_subcode1; 1695 uint32_t _els_subcode2; 1696 uint8_t _els_reserved4[20]; 1697 } in; 1698 struct { 1699 uint32_t _els_recv_bytecnt; 1700 uint32_t _els_xmit_bytecnt; 1701 uint32_t _els_xmit_dsd_length; 1702 uint16_t _els_xmit_dsd_a1500; 1703 uint16_t _els_xmit_dsd_a3116; 1704 uint16_t _els_xmit_dsd_a4732; 1705 uint16_t _els_xmit_dsd_a6348; 1706 uint32_t _els_recv_dsd_length; 1707 uint16_t _els_recv_dsd_a1500; 1708 uint16_t _els_recv_dsd_a3116; 1709 uint16_t _els_recv_dsd_a4732; 1710 uint16_t _els_recv_dsd_a6348; 1711 } out; 1712 } inout; 1713#define els_bytecnt inout.in._els_bytecnt 1714#define els_subcode1 inout.in._els_subcode1 1715#define els_subcode2 inout.in._els_subcode2 1716#define els_reserved4 inout.in._els_reserved4 1717#define els_recv_bytecnt inout.out._els_recv_bytecnt 1718#define els_xmit_bytecnt inout.out._els_xmit_bytecnt 1719#define els_xmit_dsd_length inout.out._els_xmit_dsd_length 1720#define els_xmit_dsd_a1500 inout.out._els_xmit_dsd_a1500 1721#define els_xmit_dsd_a3116 inout.out._els_xmit_dsd_a3116 1722#define els_xmit_dsd_a4732 inout.out._els_xmit_dsd_a4732 1723#define els_xmit_dsd_a6348 inout.out._els_xmit_dsd_a6348 1724#define els_recv_dsd_length inout.out._els_recv_dsd_length 1725#define els_recv_dsd_a1500 inout.out._els_recv_dsd_a1500 1726#define els_recv_dsd_a3116 inout.out._els_recv_dsd_a3116 1727#define els_recv_dsd_a4732 inout.out._els_recv_dsd_a4732 1728#define els_recv_dsd_a6348 inout.out._els_recv_dsd_a6348 1729} els_t; 1730 1731/* 1732 * A handy package structure for running FC-SCSI commands internally 1733 */ 1734typedef struct { 1735 uint16_t handle; 1736 uint16_t lun; 1737 uint32_t 1738 channel : 8, 1739 portid : 24; 1740 uint32_t timeout; 1741 union { 1742 struct { 1743 uint32_t data_length; 1744 uint32_t 1745 no_wait : 1, 1746 do_read : 1; 1747 uint8_t cdb[16]; 1748 void *data_ptr; 1749 } beg; 1750 struct { 1751 uint32_t data_residual; 1752 uint8_t status; 1753 uint8_t pad; 1754 uint16_t sense_length; 1755 uint8_t sense_data[32]; 1756 } end; 1757 } fcd; 1758} isp_xcmd_t; 1759 1760/* 1761 * Target Mode related definitions 1762 */ 1763#define QLTM_SENSELEN 18 /* non-FC cards only */ 1764#define QLTM_SVALID 0x80 1765 1766/* 1767 * Structure for Enable Lun and Modify Lun queue entries 1768 */ 1769typedef struct { 1770 isphdr_t le_header; 1771 uint32_t le_reserved; 1772 uint8_t le_lun; 1773 uint8_t le_rsvd; 1774 uint8_t le_ops; /* Modify LUN only */ 1775 uint8_t le_tgt; /* Not for FC */ 1776 uint32_t le_flags; /* Not for FC */ 1777 uint8_t le_status; 1778 uint8_t le_reserved2; 1779 uint8_t le_cmd_count; 1780 uint8_t le_in_count; 1781 uint8_t le_cdb6len; /* Not for FC */ 1782 uint8_t le_cdb7len; /* Not for FC */ 1783 uint16_t le_timeout; 1784 uint16_t le_reserved3[20]; 1785} lun_entry_t; 1786 1787/* 1788 * le_flags values 1789 */ 1790#define LUN_TQAE 0x00000002 /* bit1 Tagged Queue Action Enable */ 1791#define LUN_DSSM 0x01000000 /* bit24 Disable Sending SDP Message */ 1792#define LUN_DISAD 0x02000000 /* bit25 Disable autodisconnect */ 1793#define LUN_DM 0x40000000 /* bit30 Disconnects Mandatory */ 1794 1795/* 1796 * le_ops values 1797 */ 1798#define LUN_CCINCR 0x01 /* increment command count */ 1799#define LUN_CCDECR 0x02 /* decrement command count */ 1800#define LUN_ININCR 0x40 /* increment immed. notify count */ 1801#define LUN_INDECR 0x80 /* decrement immed. notify count */ 1802 1803/* 1804 * le_status values 1805 */ 1806#define LUN_OK 0x01 /* we be rockin' */ 1807#define LUN_ERR 0x04 /* request completed with error */ 1808#define LUN_INVAL 0x06 /* invalid request */ 1809#define LUN_NOCAP 0x16 /* can't provide requested capability */ 1810#define LUN_ENABLED 0x3E /* LUN already enabled */ 1811 1812/* 1813 * Immediate Notify Entry structure 1814 */ 1815#define IN_MSGLEN 8 /* 8 bytes */ 1816#define IN_RSVDLEN 8 /* 8 words */ 1817typedef struct { 1818 isphdr_t in_header; 1819 uint32_t in_reserved; 1820 uint8_t in_lun; /* lun */ 1821 uint8_t in_iid; /* initiator */ 1822 uint8_t in_reserved2; 1823 uint8_t in_tgt; /* target */ 1824 uint32_t in_flags; 1825 uint8_t in_status; 1826 uint8_t in_rsvd2; 1827 uint8_t in_tag_val; /* tag value */ 1828 uint8_t in_tag_type; /* tag type */ 1829 uint16_t in_seqid; /* sequence id */ 1830 uint8_t in_msg[IN_MSGLEN]; /* SCSI message bytes */ 1831 uint16_t in_reserved3[IN_RSVDLEN]; 1832 uint8_t in_sense[QLTM_SENSELEN];/* suggested sense data */ 1833} in_entry_t; 1834 1835typedef struct { 1836 isphdr_t in_header; 1837 uint32_t in_reserved; 1838 uint8_t in_lun; /* lun */ 1839 uint8_t in_iid; /* initiator */ 1840 uint16_t in_scclun; 1841 uint32_t in_reserved2; 1842 uint16_t in_status; 1843 uint16_t in_task_flags; 1844 uint16_t in_seqid; /* sequence id */ 1845} in_fcentry_t; 1846 1847typedef struct { 1848 isphdr_t in_header; 1849 uint32_t in_reserved; 1850 uint16_t in_iid; /* initiator */ 1851 uint16_t in_scclun; 1852 uint32_t in_reserved2; 1853 uint16_t in_status; 1854 uint16_t in_task_flags; 1855 uint16_t in_seqid; /* sequence id */ 1856} in_fcentry_e_t; 1857 1858/* 1859 * Values for the in_status field 1860 */ 1861#define IN_REJECT 0x0D /* Message Reject message received */ 1862#define IN_RESET 0x0E /* Bus Reset occurred */ 1863#define IN_NO_RCAP 0x16 /* requested capability not available */ 1864#define IN_IDE_RECEIVED 0x33 /* Initiator Detected Error msg received */ 1865#define IN_RSRC_UNAVAIL 0x34 /* resource unavailable */ 1866#define IN_MSG_RECEIVED 0x36 /* SCSI message received */ 1867#define IN_ABORT_TASK 0x20 /* task named in RX_ID is being aborted (FC) */ 1868#define IN_PORT_LOGOUT 0x29 /* port has logged out (FC) */ 1869#define IN_PORT_CHANGED 0x2A /* port changed */ 1870#define IN_GLOBAL_LOGO 0x2E /* all ports logged out */ 1871#define IN_NO_NEXUS 0x3B /* Nexus not established */ 1872#define IN_SRR_RCVD 0x45 /* SRR received */ 1873 1874/* 1875 * Values for the in_task_flags field- should only get one at a time! 1876 */ 1877#define TASK_FLAGS_RESERVED_MASK (0xe700) 1878#define TASK_FLAGS_CLEAR_ACA (1<<14) 1879#define TASK_FLAGS_TARGET_RESET (1<<13) 1880#define TASK_FLAGS_LUN_RESET (1<<12) 1881#define TASK_FLAGS_CLEAR_TASK_SET (1<<10) 1882#define TASK_FLAGS_ABORT_TASK_SET (1<<9) 1883 1884/* 1885 * ISP24XX Immediate Notify 1886 */ 1887typedef struct { 1888 isphdr_t in_header; 1889 uint32_t in_reserved; 1890 uint16_t in_nphdl; 1891 uint16_t in_reserved1; 1892 uint16_t in_flags; 1893 uint16_t in_srr_rxid; 1894 uint16_t in_status; 1895 uint8_t in_status_subcode; 1896 uint8_t in_fwhandle; 1897 uint32_t in_rxid; 1898 uint16_t in_srr_reloff_lo; 1899 uint16_t in_srr_reloff_hi; 1900 uint16_t in_srr_iu; 1901 uint16_t in_srr_oxid; 1902 /* 1903 * If bit 2 is set in in_flags, the N-Port and 1904 * handle tags are valid. If the received ELS is 1905 * a LOGO, then these tags contain the N Port ID 1906 * from the LOGO payload. If the received ELS 1907 * request is TPRLO, these tags contain the 1908 * Third Party Originator N Port ID. 1909 */ 1910 uint16_t in_nport_id_hi; 1911#define in_prli_options in_nport_id_hi 1912 uint8_t in_nport_id_lo; 1913 uint8_t in_reserved3; 1914 uint16_t in_np_handle; 1915 uint8_t in_reserved4[12]; 1916 uint8_t in_reserved5; 1917 uint8_t in_vpidx; 1918 uint32_t in_reserved6; 1919 uint16_t in_portid_lo; 1920 uint8_t in_portid_hi; 1921 uint8_t in_reserved7; 1922 uint16_t in_reserved8; 1923 uint16_t in_oxid; 1924} in_fcentry_24xx_t; 1925 1926#define IN24XX_FLAG_PUREX_IOCB 0x1 1927#define IN24XX_FLAG_GLOBAL_LOGOUT 0x2 1928#define IN24XX_FLAG_NPHDL_VALID 0x4 1929#define IN24XX_FLAG_N2N_PRLI 0x8 1930#define IN24XX_FLAG_PN_NN_VALID 0x10 1931 1932#define IN24XX_LIP_RESET 0x0E 1933#define IN24XX_LINK_RESET 0x0F 1934#define IN24XX_PORT_LOGOUT 0x29 1935#define IN24XX_PORT_CHANGED 0x2A 1936#define IN24XX_LINK_FAILED 0x2E 1937#define IN24XX_SRR_RCVD 0x45 1938#define IN24XX_ELS_RCVD 0x46 /* 1939 * login-affectin ELS received- check 1940 * subcode for specific opcode 1941 */ 1942 1943/* 1944 * For f/w > 4.0.25, these offsets in the Immediate Notify contain 1945 * the WWNN/WWPN if the ELS is PLOGI, PDISC or ADISC. The WWN is in 1946 * Big Endian format. 1947 */ 1948#define IN24XX_PRLI_WWNN_OFF 0x18 1949#define IN24XX_PRLI_WWPN_OFF 0x28 1950#define IN24XX_PLOGI_WWNN_OFF 0x20 1951#define IN24XX_PLOGI_WWPN_OFF 0x28 1952 1953/* 1954 * For f/w > 4.0.25, this offset in the Immediate Notify contain 1955 * the WWPN if the ELS is LOGO. The WWN is in Big Endian format. 1956 */ 1957#define IN24XX_LOGO_WWPN_OFF 0x28 1958 1959/* 1960 * Immediate Notify Status Subcodes for IN24XX_PORT_LOGOUT 1961 */ 1962#define IN24XX_PORT_LOGOUT_PDISC_TMO 0x00 1963#define IN24XX_PORT_LOGOUT_UXPR_DISC 0x01 1964#define IN24XX_PORT_LOGOUT_OWN_OPN 0x02 1965#define IN24XX_PORT_LOGOUT_OWN_OPN_SFT 0x03 1966#define IN24XX_PORT_LOGOUT_ABTS_TMO 0x04 1967#define IN24XX_PORT_LOGOUT_DISC_RJT 0x05 1968#define IN24XX_PORT_LOGOUT_LOGIN_NEEDED 0x06 1969#define IN24XX_PORT_LOGOUT_BAD_DISC 0x07 1970#define IN24XX_PORT_LOGOUT_LOST_ALPA 0x08 1971#define IN24XX_PORT_LOGOUT_XMIT_FAILURE 0x09 1972 1973/* 1974 * Immediate Notify Status Subcodes for IN24XX_PORT_CHANGED 1975 */ 1976#define IN24XX_PORT_CHANGED_BADFAN 0x00 1977#define IN24XX_PORT_CHANGED_TOPO_CHANGE 0x01 1978#define IN24XX_PORT_CHANGED_FLOGI_ACC 0x02 1979#define IN24XX_PORT_CHANGED_FLOGI_RJT 0x03 1980#define IN24XX_PORT_CHANGED_TIMEOUT 0x04 1981#define IN24XX_PORT_CHANGED_PORT_CHANGE 0x05 1982 1983/* 1984 * Notify Acknowledge Entry structure 1985 */ 1986#define NA_RSVDLEN 22 1987typedef struct { 1988 isphdr_t na_header; 1989 uint32_t na_reserved; 1990 uint8_t na_lun; /* lun */ 1991 uint8_t na_iid; /* initiator */ 1992 uint8_t na_reserved2; 1993 uint8_t na_tgt; /* target */ 1994 uint32_t na_flags; 1995 uint8_t na_status; 1996 uint8_t na_event; 1997 uint16_t na_seqid; /* sequence id */ 1998 uint16_t na_reserved3[NA_RSVDLEN]; 1999} na_entry_t; 2000 2001/* 2002 * Value for the na_event field 2003 */ 2004#define NA_RST_CLRD 0x80 /* Clear an async event notification */ 2005#define NA_OK 0x01 /* Notify Acknowledge Succeeded */ 2006#define NA_INVALID 0x06 /* Invalid Notify Acknowledge */ 2007 2008#define NA2_RSVDLEN 21 2009typedef struct { 2010 isphdr_t na_header; 2011 uint32_t na_reserved; 2012 uint8_t na_reserved1; 2013 uint8_t na_iid; /* initiator loop id */ 2014 uint16_t na_response; 2015 uint16_t na_flags; 2016 uint16_t na_reserved2; 2017 uint16_t na_status; 2018 uint16_t na_task_flags; 2019 uint16_t na_seqid; /* sequence id */ 2020 uint16_t na_reserved3[NA2_RSVDLEN]; 2021} na_fcentry_t; 2022 2023typedef struct { 2024 isphdr_t na_header; 2025 uint32_t na_reserved; 2026 uint16_t na_iid; /* initiator loop id */ 2027 uint16_t na_response; /* response code */ 2028 uint16_t na_flags; 2029 uint16_t na_reserved2; 2030 uint16_t na_status; 2031 uint16_t na_task_flags; 2032 uint16_t na_seqid; /* sequence id */ 2033 uint16_t na_reserved3[NA2_RSVDLEN]; 2034} na_fcentry_e_t; 2035 2036#define NAFC_RCOUNT 0x80 /* increment resource count */ 2037#define NAFC_RST_CLRD 0x20 /* Clear LIP Reset */ 2038#define NAFC_TVALID 0x10 /* task mangement response code is valid */ 2039 2040/* 2041 * ISP24XX Notify Acknowledge 2042 */ 2043 2044typedef struct { 2045 isphdr_t na_header; 2046 uint32_t na_handle; 2047 uint16_t na_nphdl; 2048 uint16_t na_reserved1; 2049 uint16_t na_flags; 2050 uint16_t na_srr_rxid; 2051 uint16_t na_status; 2052 uint8_t na_status_subcode; 2053 uint8_t na_fwhandle; 2054 uint32_t na_rxid; 2055 uint16_t na_srr_reloff_lo; 2056 uint16_t na_srr_reloff_hi; 2057 uint16_t na_srr_iu; 2058 uint16_t na_srr_flags; 2059 uint8_t na_reserved3[18]; 2060 uint8_t na_reserved4; 2061 uint8_t na_vpidx; 2062 uint8_t na_srr_reject_vunique; 2063 uint8_t na_srr_reject_explanation; 2064 uint8_t na_srr_reject_code; 2065 uint8_t na_reserved5; 2066 uint8_t na_reserved6[6]; 2067 uint16_t na_oxid; 2068} na_fcentry_24xx_t; 2069 2070/* 2071 * Accept Target I/O Entry structure 2072 */ 2073#define ATIO_CDBLEN 26 2074 2075typedef struct { 2076 isphdr_t at_header; 2077 uint16_t at_reserved; 2078 uint16_t at_handle; 2079 uint8_t at_lun; /* lun */ 2080 uint8_t at_iid; /* initiator */ 2081 uint8_t at_cdblen; /* cdb length */ 2082 uint8_t at_tgt; /* target */ 2083 uint32_t at_flags; 2084 uint8_t at_status; /* firmware status */ 2085 uint8_t at_scsi_status; /* scsi status */ 2086 uint8_t at_tag_val; /* tag value */ 2087 uint8_t at_tag_type; /* tag type */ 2088 uint8_t at_cdb[ATIO_CDBLEN]; /* received CDB */ 2089 uint8_t at_sense[QLTM_SENSELEN];/* suggested sense data */ 2090} at_entry_t; 2091 2092/* 2093 * at_flags values 2094 */ 2095#define AT_NODISC 0x00008000 /* disconnect disabled */ 2096#define AT_TQAE 0x00000002 /* Tagged Queue Action enabled */ 2097 2098/* 2099 * at_status values 2100 */ 2101#define AT_PATH_INVALID 0x07 /* ATIO sent to firmware for disabled lun */ 2102#define AT_RESET 0x0E /* SCSI Bus Reset Occurred */ 2103#define AT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 2104#define AT_NOCAP 0x16 /* Requested capability not available */ 2105#define AT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 2106#define AT_CDB 0x3D /* CDB received */ 2107/* 2108 * Macros to create and fetch and test concatenated handle and tag value macros 2109 * (SPI only) 2110 */ 2111#define AT_MAKE_TAGID(tid, aep) \ 2112 tid = aep->at_handle; \ 2113 if (aep->at_flags & AT_TQAE) { \ 2114 tid |= (aep->at_tag_val << 16); \ 2115 tid |= (1 << 24); \ 2116 } 2117 2118#define CT_MAKE_TAGID(tid, ct) \ 2119 tid = ct->ct_fwhandle; \ 2120 if (ct->ct_flags & CT_TQAE) { \ 2121 tid |= (ct->ct_tag_val << 16); \ 2122 tid |= (1 << 24); \ 2123 } 2124 2125#define AT_HAS_TAG(val) ((val) & (1 << 24)) 2126#define AT_GET_TAG(val) (((val) >> 16) & 0xff) 2127#define AT_GET_HANDLE(val) ((val) & 0xffff) 2128 2129#define IN_MAKE_TAGID(tid, inp) \ 2130 tid = inp->in_seqid; \ 2131 tid |= (inp->in_tag_val << 16); \ 2132 tid |= (1 << 24) 2133 2134/* 2135 * Accept Target I/O Entry structure, Type 2 2136 */ 2137#define ATIO2_CDBLEN 16 2138 2139typedef struct { 2140 isphdr_t at_header; 2141 uint32_t at_reserved; 2142 uint8_t at_lun; /* lun or reserved */ 2143 uint8_t at_iid; /* initiator */ 2144 uint16_t at_rxid; /* response ID */ 2145 uint16_t at_flags; 2146 uint16_t at_status; /* firmware status */ 2147 uint8_t at_crn; /* command reference number */ 2148 uint8_t at_taskcodes; 2149 uint8_t at_taskflags; 2150 uint8_t at_execodes; 2151 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2152 uint32_t at_datalen; /* allocated data len */ 2153 uint16_t at_scclun; /* SCC Lun or reserved */ 2154 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2155 uint16_t at_reserved2[6]; 2156 uint16_t at_oxid; 2157} at2_entry_t; 2158 2159typedef struct { 2160 isphdr_t at_header; 2161 uint32_t at_reserved; 2162 uint16_t at_iid; /* initiator */ 2163 uint16_t at_rxid; /* response ID */ 2164 uint16_t at_flags; 2165 uint16_t at_status; /* firmware status */ 2166 uint8_t at_crn; /* command reference number */ 2167 uint8_t at_taskcodes; 2168 uint8_t at_taskflags; 2169 uint8_t at_execodes; 2170 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2171 uint32_t at_datalen; /* allocated data len */ 2172 uint16_t at_scclun; /* SCC Lun or reserved */ 2173 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2174 uint16_t at_reserved2[6]; 2175 uint16_t at_oxid; 2176} at2e_entry_t; 2177 2178#define ATIO2_WWPN_OFFSET 0x2A 2179#define ATIO2_OXID_OFFSET 0x3E 2180 2181#define ATIO2_TC_ATTR_MASK 0x7 2182#define ATIO2_TC_ATTR_SIMPLEQ 0 2183#define ATIO2_TC_ATTR_HEADOFQ 1 2184#define ATIO2_TC_ATTR_ORDERED 2 2185#define ATIO2_TC_ATTR_ACAQ 4 2186#define ATIO2_TC_ATTR_UNTAGGED 5 2187 2188#define ATIO2_EX_WRITE 0x1 2189#define ATIO2_EX_READ 0x2 2190/* 2191 * Macros to create and fetch and test concatenated handle and tag value macros 2192 */ 2193#define AT2_MAKE_TAGID(tid, bus, inst, aep) \ 2194 tid = aep->at_rxid; \ 2195 tid |= (((uint64_t)inst) << 32); \ 2196 tid |= (((uint64_t)bus) << 48) 2197 2198#define CT2_MAKE_TAGID(tid, bus, inst, ct) \ 2199 tid = ct->ct_rxid; \ 2200 tid |= (((uint64_t)inst) << 32); \ 2201 tid |= (((uint64_t)(bus & 0xff)) << 48) 2202 2203#define AT2_HAS_TAG(val) 1 2204#define AT2_GET_TAG(val) ((val) & 0xffffffff) 2205#define AT2_GET_INST(val) (((val) >> 32) & 0xffff) 2206#define AT2_GET_HANDLE AT2_GET_TAG 2207#define AT2_GET_BUS(val) (((val) >> 48) & 0xff) 2208 2209#define FC_HAS_TAG AT2_HAS_TAG 2210#define FC_GET_TAG AT2_GET_TAG 2211#define FC_GET_INST AT2_GET_INST 2212#define FC_GET_HANDLE AT2_GET_HANDLE 2213 2214#define IN_FC_MAKE_TAGID(tid, bus, inst, seqid) \ 2215 tid = seqid; \ 2216 tid |= (((uint64_t)inst) << 32); \ 2217 tid |= (((uint64_t)(bus & 0xff)) << 48) 2218 2219#define FC_TAG_INSERT_INST(tid, inst) \ 2220 tid &= ~0x0000ffff00000000ull; \ 2221 tid |= (((uint64_t)inst) << 32) 2222 2223/* 2224 * 24XX ATIO Definition 2225 * 2226 * This is *quite* different from other entry types. 2227 * First of all, it has its own queue it comes in on. 2228 * 2229 * Secondly, it doesn't have a normal header. 2230 * 2231 * Thirdly, it's just a passthru of the FCP CMND IU 2232 * which is recorded in big endian mode. 2233 */ 2234typedef struct { 2235 uint8_t at_type; 2236 uint8_t at_count; 2237 /* 2238 * Task attribute in high four bits, 2239 * the rest is the FCP CMND IU Length. 2240 * NB: the command can extend past the 2241 * length for a single queue entry. 2242 */ 2243 uint16_t at_ta_len; 2244 uint32_t at_rxid; 2245 fc_hdr_t at_hdr; 2246 fcp_cmnd_iu_t at_cmnd; 2247} at7_entry_t; 2248#define AT7_NORESRC_RXID 0xffffffff 2249 2250 2251/* 2252 * Continue Target I/O Entry structure 2253 * Request from driver. The response from the 2254 * ISP firmware is the same except that the last 18 2255 * bytes are overwritten by suggested sense data if 2256 * the 'autosense valid' bit is set in the status byte. 2257 */ 2258typedef struct { 2259 isphdr_t ct_header; 2260 uint16_t ct_syshandle; 2261 uint16_t ct_fwhandle; /* required by f/w */ 2262 uint8_t ct_lun; /* lun */ 2263 uint8_t ct_iid; /* initiator id */ 2264 uint8_t ct_reserved2; 2265 uint8_t ct_tgt; /* our target id */ 2266 uint32_t ct_flags; 2267 uint8_t ct_status; /* isp status */ 2268 uint8_t ct_scsi_status; /* scsi status */ 2269 uint8_t ct_tag_val; /* tag value */ 2270 uint8_t ct_tag_type; /* tag type */ 2271 uint32_t ct_xfrlen; /* transfer length */ 2272 uint32_t ct_resid; /* residual length */ 2273 uint16_t ct_timeout; 2274 uint16_t ct_seg_count; 2275 ispds_t ct_dataseg[ISP_RQDSEG]; 2276} ct_entry_t; 2277 2278/* 2279 * For some of the dual port SCSI adapters, port (bus #) is reported 2280 * in the MSbit of ct_iid. Bit fields are a bit too awkward here. 2281 * 2282 * Note that this does not apply to FC adapters at all which can and 2283 * do report IIDs between 0x81 && 0xfe (or 0x7ff) which represent devices 2284 * that have logged in across a SCSI fabric. 2285 */ 2286#define GET_IID_VAL(x) (x & 0x3f) 2287#define GET_BUS_VAL(x) ((x >> 7) & 0x1) 2288#define SET_IID_VAL(y, x) y = ((y & ~0x3f) | (x & 0x3f)) 2289#define SET_BUS_VAL(y, x) y = ((y & 0x3f) | ((x & 0x1) << 7)) 2290 2291/* 2292 * ct_flags values 2293 */ 2294#define CT_TQAE 0x00000002 /* bit 1, Tagged Queue Action enable */ 2295#define CT_DATA_IN 0x00000040 /* bits 6&7, Data direction - *to* initiator */ 2296#define CT_DATA_OUT 0x00000080 /* bits 6&7, Data direction - *from* initiator */ 2297#define CT_NO_DATA 0x000000C0 /* bits 6&7, Data direction */ 2298#define CT_CCINCR 0x00000100 /* bit 8, autoincrement atio count */ 2299#define CT_DATAMASK 0x000000C0 /* bits 6&7, Data direction */ 2300#define CT_INISYNCWIDE 0x00004000 /* bit 14, Do Sync/Wide Negotiation */ 2301#define CT_NODISC 0x00008000 /* bit 15, Disconnects disabled */ 2302#define CT_DSDP 0x01000000 /* bit 24, Disable Save Data Pointers */ 2303#define CT_SENDRDP 0x04000000 /* bit 26, Send Restore Pointers msg */ 2304#define CT_SENDSTATUS 0x80000000 /* bit 31, Send SCSI status byte */ 2305 2306/* 2307 * ct_status values 2308 * - set by the firmware when it returns the CTIO 2309 */ 2310#define CT_OK 0x01 /* completed without error */ 2311#define CT_ABORTED 0x02 /* aborted by host */ 2312#define CT_ERR 0x04 /* see sense data for error */ 2313#define CT_INVAL 0x06 /* request for disabled lun */ 2314#define CT_NOPATH 0x07 /* invalid ITL nexus */ 2315#define CT_INVRXID 0x08 /* (FC only) Invalid RX_ID */ 2316#define CT_DATA_OVER 0x09 /* (FC only) Data Overrun */ 2317#define CT_RSELTMO 0x0A /* reselection timeout after 2 tries */ 2318#define CT_TIMEOUT 0x0B /* timed out */ 2319#define CT_RESET 0x0E /* SCSI Bus Reset occurred */ 2320#define CT_PARITY 0x0F /* Uncorrectable Parity Error */ 2321#define CT_BUS_ERROR 0x10 /* (FC Only) DMA PCI Error */ 2322#define CT_PANIC 0x13 /* Unrecoverable Error */ 2323#define CT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 2324#define CT_DATA_UNDER 0x15 /* (FC only) Data Underrun */ 2325#define CT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 2326#define CT_TERMINATED 0x19 /* due to Terminate Transfer mbox cmd */ 2327#define CT_PORTUNAVAIL 0x28 /* port not available */ 2328#define CT_LOGOUT 0x29 /* port logout */ 2329#define CT_PORTCHANGED 0x2A /* port changed */ 2330#define CT_IDE 0x33 /* Initiator Detected Error */ 2331#define CT_NOACK 0x35 /* Outstanding Immed. Notify. entry */ 2332#define CT_SRR 0x45 /* SRR Received */ 2333#define CT_LUN_RESET 0x48 /* Lun Reset Received */ 2334 2335#define CT_HBA_RESET 0xffff /* pseudo error - command destroyed by HBA reset*/ 2336 2337/* 2338 * When the firmware returns a CTIO entry, it may overwrite the last 2339 * part of the structure with sense data. This starts at offset 0x2E 2340 * into the entry, which is in the middle of ct_dataseg[1]. Rather 2341 * than define a new struct for this, I'm just using the sense data 2342 * offset. 2343 */ 2344#define CTIO_SENSE_OFFSET 0x2E 2345 2346/* 2347 * Entry length in u_longs. All entries are the same size so 2348 * any one will do as the numerator. 2349 */ 2350#define UINT32_ENTRY_SIZE (sizeof(at_entry_t)/sizeof(uint32_t)) 2351 2352/* 2353 * QLA2100 CTIO (type 2) entry 2354 */ 2355#define MAXRESPLEN 26 2356typedef struct { 2357 isphdr_t ct_header; 2358 uint32_t ct_syshandle; 2359 uint8_t ct_lun; /* lun */ 2360 uint8_t ct_iid; /* initiator id */ 2361 uint16_t ct_rxid; /* response ID */ 2362 uint16_t ct_flags; 2363 uint16_t ct_status; /* isp status */ 2364 uint16_t ct_timeout; 2365 uint16_t ct_seg_count; 2366 uint32_t ct_reloff; /* relative offset */ 2367 uint32_t ct_resid; /* residual length */ 2368 union { 2369 /* 2370 * The three different modes that the target driver 2371 * can set the CTIO{2,3,4} up as. 2372 * 2373 * The first is for sending FCP_DATA_IUs as well as 2374 * (optionally) sending a terminal SCSI status FCP_RSP_IU. 2375 * 2376 * The second is for sending SCSI sense data in an FCP_RSP_IU. 2377 * Note that no FCP_DATA_IUs will be sent. 2378 * 2379 * The third is for sending FCP_RSP_IUs as built specifically 2380 * in system memory as located by the isp_dataseg. 2381 */ 2382 struct { 2383 uint32_t _reserved; 2384 uint16_t _reserved2; 2385 uint16_t ct_scsi_status; 2386 uint32_t ct_xfrlen; 2387 union { 2388 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2389 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2390 ispdslist_t ct_dslist; 2391 } u; 2392 } m0; 2393 struct { 2394 uint16_t _reserved; 2395 uint16_t _reserved2; 2396 uint16_t ct_senselen; 2397 uint16_t ct_scsi_status; 2398 uint16_t ct_resplen; 2399 uint8_t ct_resp[MAXRESPLEN]; 2400 } m1; 2401 struct { 2402 uint32_t _reserved; 2403 uint16_t _reserved2; 2404 uint16_t _reserved3; 2405 uint32_t ct_datalen; 2406 union { 2407 ispds_t ct_fcp_rsp_iudata_32; 2408 ispds64_t ct_fcp_rsp_iudata_64; 2409 } u; 2410 } m2; 2411 } rsp; 2412} ct2_entry_t; 2413 2414typedef struct { 2415 isphdr_t ct_header; 2416 uint32_t ct_syshandle; 2417 uint16_t ct_iid; /* initiator id */ 2418 uint16_t ct_rxid; /* response ID */ 2419 uint16_t ct_flags; 2420 uint16_t ct_status; /* isp status */ 2421 uint16_t ct_timeout; 2422 uint16_t ct_seg_count; 2423 uint32_t ct_reloff; /* relative offset */ 2424 uint32_t ct_resid; /* residual length */ 2425 union { 2426 struct { 2427 uint32_t _reserved; 2428 uint16_t _reserved2; 2429 uint16_t ct_scsi_status; 2430 uint32_t ct_xfrlen; 2431 union { 2432 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2433 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2434 ispdslist_t ct_dslist; 2435 } u; 2436 } m0; 2437 struct { 2438 uint16_t _reserved; 2439 uint16_t _reserved2; 2440 uint16_t ct_senselen; 2441 uint16_t ct_scsi_status; 2442 uint16_t ct_resplen; 2443 uint8_t ct_resp[MAXRESPLEN]; 2444 } m1; 2445 struct { 2446 uint32_t _reserved; 2447 uint16_t _reserved2; 2448 uint16_t _reserved3; 2449 uint32_t ct_datalen; 2450 union { 2451 ispds_t ct_fcp_rsp_iudata_32; 2452 ispds64_t ct_fcp_rsp_iudata_64; 2453 } u; 2454 } m2; 2455 } rsp; 2456} ct2e_entry_t; 2457 2458/* 2459 * ct_flags values for CTIO2 2460 */ 2461#define CT2_FLAG_MODE0 0x0000 2462#define CT2_FLAG_MODE1 0x0001 2463#define CT2_FLAG_MODE2 0x0002 2464#define CT2_FLAG_MMASK 0x0003 2465#define CT2_DATA_IN 0x0040 /* *to* initiator */ 2466#define CT2_DATA_OUT 0x0080 /* *from* initiator */ 2467#define CT2_NO_DATA 0x00C0 2468#define CT2_DATAMASK 0x00C0 2469#define CT2_CCINCR 0x0100 2470#define CT2_FASTPOST 0x0200 2471#define CT2_CONFIRM 0x2000 2472#define CT2_TERMINATE 0x4000 2473#define CT2_SENDSTATUS 0x8000 2474 2475/* 2476 * ct_status values are (mostly) the same as that for ct_entry. 2477 */ 2478 2479/* 2480 * ct_scsi_status values- the low 8 bits are the normal SCSI status 2481 * we know and love. The upper 8 bits are validity markers for FCP_RSP_IU 2482 * fields. 2483 */ 2484#define CT2_RSPLEN_VALID 0x0100 2485#define CT2_SNSLEN_VALID 0x0200 2486#define CT2_DATA_OVER 0x0400 2487#define CT2_DATA_UNDER 0x0800 2488 2489/* 2490 * ISP24XX CTIO 2491 */ 2492#define MAXRESPLEN_24XX 24 2493typedef struct { 2494 isphdr_t ct_header; 2495 uint32_t ct_syshandle; 2496 uint16_t ct_nphdl; /* status on returned CTIOs */ 2497 uint16_t ct_timeout; 2498 uint16_t ct_seg_count; 2499 uint8_t ct_vpidx; 2500 uint8_t ct_xflags; 2501 uint16_t ct_iid_lo; /* low 16 bits of portid */ 2502 uint8_t ct_iid_hi; /* hi 8 bits of portid */ 2503 uint8_t ct_reserved; 2504 uint32_t ct_rxid; 2505 uint16_t ct_senselen; /* mode 1 only */ 2506 uint16_t ct_flags; 2507 uint32_t ct_resid; /* residual length */ 2508 uint16_t ct_oxid; 2509 uint16_t ct_scsi_status; /* modes 0 && 1 only */ 2510 union { 2511 struct { 2512 uint32_t reloff; 2513 uint32_t reserved0; 2514 uint32_t ct_xfrlen; 2515 uint32_t reserved1; 2516 ispds64_t ds; 2517 } m0; 2518 struct { 2519 uint16_t ct_resplen; 2520 uint16_t reserved; 2521 uint8_t ct_resp[MAXRESPLEN_24XX]; 2522 } m1; 2523 struct { 2524 uint32_t reserved0; 2525 uint32_t reserved1; 2526 uint32_t ct_datalen; 2527 uint32_t reserved2; 2528 ispds64_t ct_fcp_rsp_iudata; 2529 } m2; 2530 } rsp; 2531} ct7_entry_t; 2532 2533/* 2534 * ct_flags values for CTIO7 2535 */ 2536#define CT7_NO_DATA 0x0000 2537#define CT7_DATA_OUT 0x0001 /* *from* initiator */ 2538#define CT7_DATA_IN 0x0002 /* *to* initiator */ 2539#define CT7_DATAMASK 0x3 2540#define CT7_DSD_ENABLE 0x0004 2541#define CT7_CONF_STSFD 0x0010 2542#define CT7_EXPLCT_CONF 0x0020 2543#define CT7_FLAG_MODE0 0x0000 2544#define CT7_FLAG_MODE1 0x0040 2545#define CT7_FLAG_MODE2 0x0080 2546#define CT7_FLAG_MMASK 0x00C0 2547#define CT7_NOACK 0x0100 2548#define CT7_TASK_ATTR_SHIFT 9 2549#define CT7_CONFIRM 0x2000 2550#define CT7_TERMINATE 0x4000 2551#define CT7_SENDSTATUS 0x8000 2552 2553/* 2554 * Type 7 CTIO status codes 2555 */ 2556#define CT7_OK 0x01 /* completed without error */ 2557#define CT7_ABORTED 0x02 /* aborted by host */ 2558#define CT7_ERR 0x04 /* see sense data for error */ 2559#define CT7_INVAL 0x06 /* request for disabled lun */ 2560#define CT7_INVRXID 0x08 /* Invalid RX_ID */ 2561#define CT7_DATA_OVER 0x09 /* Data Overrun */ 2562#define CT7_TIMEOUT 0x0B /* timed out */ 2563#define CT7_RESET 0x0E /* LIP Rset Received */ 2564#define CT7_BUS_ERROR 0x10 /* DMA PCI Error */ 2565#define CT7_REASSY_ERR 0x11 /* DMA reassembly error */ 2566#define CT7_DATA_UNDER 0x15 /* Data Underrun */ 2567#define CT7_PORTUNAVAIL 0x28 /* port not available */ 2568#define CT7_LOGOUT 0x29 /* port logout */ 2569#define CT7_PORTCHANGED 0x2A /* port changed */ 2570#define CT7_SRR 0x45 /* SRR Received */ 2571 2572/* 2573 * Other 24XX related target IOCBs 2574 */ 2575 2576/* 2577 * ABTS Received 2578 */ 2579typedef struct { 2580 isphdr_t abts_header; 2581 uint8_t abts_reserved0[6]; 2582 uint16_t abts_nphdl; 2583 uint16_t abts_reserved1; 2584 uint16_t abts_sof; 2585 uint32_t abts_rxid_abts; 2586 uint16_t abts_did_lo; 2587 uint8_t abts_did_hi; 2588 uint8_t abts_r_ctl; 2589 uint16_t abts_sid_lo; 2590 uint8_t abts_sid_hi; 2591 uint8_t abts_cs_ctl; 2592 uint16_t abts_fs_ctl; 2593 uint8_t abts_f_ctl; 2594 uint8_t abts_type; 2595 uint16_t abts_seq_cnt; 2596 uint8_t abts_df_ctl; 2597 uint8_t abts_seq_id; 2598 uint16_t abts_rx_id; 2599 uint16_t abts_ox_id; 2600 uint32_t abts_param; 2601 uint8_t abts_reserved2[16]; 2602 uint32_t abts_rxid_task; 2603} abts_t; 2604 2605typedef struct { 2606 isphdr_t abts_rsp_header; 2607 uint32_t abts_rsp_handle; 2608 uint16_t abts_rsp_status; 2609 uint16_t abts_rsp_nphdl; 2610 uint16_t abts_rsp_ctl_flags; 2611 uint16_t abts_rsp_sof; 2612 uint32_t abts_rsp_rxid_abts; 2613 uint16_t abts_rsp_did_lo; 2614 uint8_t abts_rsp_did_hi; 2615 uint8_t abts_rsp_r_ctl; 2616 uint16_t abts_rsp_sid_lo; 2617 uint8_t abts_rsp_sid_hi; 2618 uint8_t abts_rsp_cs_ctl; 2619 uint16_t abts_rsp_f_ctl_lo; 2620 uint8_t abts_rsp_f_ctl_hi; 2621 uint8_t abts_rsp_type; 2622 uint16_t abts_rsp_seq_cnt; 2623 uint8_t abts_rsp_df_ctl; 2624 uint8_t abts_rsp_seq_id; 2625 uint16_t abts_rsp_rx_id; 2626 uint16_t abts_rsp_ox_id; 2627 uint32_t abts_rsp_param; 2628 union { 2629 struct { 2630 uint16_t reserved; 2631 uint8_t last_seq_id; 2632 uint8_t seq_id_valid; 2633 uint16_t aborted_rx_id; 2634 uint16_t aborted_ox_id; 2635 uint16_t high_seq_cnt; 2636 uint16_t low_seq_cnt; 2637 uint8_t reserved2[4]; 2638 } ba_acc; 2639 struct { 2640 uint8_t vendor_unique; 2641 uint8_t explanation; 2642 uint8_t reason; 2643 uint8_t reserved; 2644 uint8_t reserved2[12]; 2645 } ba_rjt; 2646 struct { 2647 uint8_t reserved[8]; 2648 uint32_t subcode1; 2649 uint32_t subcode2; 2650 } rsp; 2651 uint8_t reserved[16]; 2652 } abts_rsp_payload; 2653 uint32_t abts_rsp_rxid_task; 2654} abts_rsp_t; 2655 2656/* terminate this ABTS exchange */ 2657#define ISP24XX_ABTS_RSP_TERMINATE 0x01 2658 2659#define ISP24XX_ABTS_RSP_COMPLETE 0x00 2660#define ISP24XX_ABTS_RSP_RESET 0x04 2661#define ISP24XX_ABTS_RSP_ABORTED 0x05 2662#define ISP24XX_ABTS_RSP_TIMEOUT 0x06 2663#define ISP24XX_ABTS_RSP_INVXID 0x08 2664#define ISP24XX_ABTS_RSP_LOGOUT 0x29 2665#define ISP24XX_ABTS_RSP_SUBCODE 0x31 2666 2667#define ISP24XX_NO_TASK 0xffffffff 2668 2669/* 2670 * Miscellaneous 2671 * 2672 * These are the limits of the number of dma segments we 2673 * can deal with based not on the size of the segment counter 2674 * (which is 16 bits), but on the size of the number of 2675 * queue entries field (which is 8 bits). We assume no 2676 * segments in the first queue entry, so we can either 2677 * have 7 dma segments per continuation entry or 5 2678 * (for 64 bit dma).. multiplying out by 254.... 2679 */ 2680#define ISP_NSEG_MAX 1778 2681#define ISP_NSEG64_MAX 1270 2682 2683#endif /* _ISPMBOX_H */ 2684