atombios_i2c.c revision 282199 
1/*
2 * Copyright 2011 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Alex Deucher
23 *
24 */
25
26#include <sys/cdefs.h>
27__FBSDID("$FreeBSD: stable/10/sys/dev/drm2/radeon/atombios_i2c.c 282199 2015-04-28 19:35:05Z dumbbell $");
28
29#include <dev/drm2/drmP.h>
30#include <dev/drm2/radeon/radeon_drm.h>
31#include <dev/iicbus/iic.h>
32#include <dev/iicbus/iiconf.h>
33#include <dev/iicbus/iicbus.h>
34#include "radeon.h"
35#include "atom.h"
36#include "iicbus_if.h"
37#include "iicbb_if.h"
38
39#define TARGET_HW_I2C_CLOCK 50
40
41/* these are a limitation of ProcessI2cChannelTransaction not the hw */
42#define ATOM_MAX_HW_I2C_WRITE 2
43#define ATOM_MAX_HW_I2C_READ  255
44
45static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan,
46				 u8 slave_addr, u8 flags,
47				 u8 *buf, u8 num)
48{
49	struct drm_device *dev = chan->dev;
50	struct radeon_device *rdev = dev->dev_private;
51	PROCESS_I2C_CHANNEL_TRANSACTION_PS_ALLOCATION args;
52	int index = GetIndexIntoMasterTable(COMMAND, ProcessI2cChannelTransaction);
53	unsigned char *base;
54	u16 out;
55
56	memset(&args, 0, sizeof(args));
57
58	base = (unsigned char *)rdev->mode_info.atom_context->scratch;
59
60	if (flags & HW_I2C_WRITE) {
61		if (num > ATOM_MAX_HW_I2C_WRITE) {
62			DRM_ERROR("hw i2c: tried to write too many bytes (%d vs 2)\n", num);
63			return -EINVAL;
64		}
65		memcpy(&out, buf, num);
66		args.lpI2CDataOut = cpu_to_le16(out);
67	} else {
68#ifdef FREEBSD_WIP /* FreeBSD: to please GCC 4.2. */
69		if (num > ATOM_MAX_HW_I2C_READ) {
70			DRM_ERROR("hw i2c: tried to read too many bytes (%d vs 255)\n", num);
71			return -EINVAL;
72		}
73#endif
74	}
75
76	args.ucI2CSpeed = TARGET_HW_I2C_CLOCK;
77	args.ucRegIndex = 0;
78	args.ucTransBytes = num;
79	args.ucSlaveAddr = slave_addr << 1;
80	args.ucLineNumber = chan->rec.i2c_id;
81
82	atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
83
84	/* error */
85	if (args.ucStatus != HW_ASSISTED_I2C_STATUS_SUCCESS) {
86		DRM_DEBUG_KMS("hw_i2c error\n");
87		return -EIO;
88	}
89
90	if (!(flags & HW_I2C_WRITE))
91		memcpy(buf, base, num);
92
93	return 0;
94}
95
96static int
97radeon_atom_hw_i2c_xfer(device_t dev, struct iic_msg *msgs, u_int num)
98{
99	struct radeon_i2c_chan *i2c = device_get_softc(dev);
100	struct iic_msg *p;
101	int i, remaining, current_count, buffer_offset, max_bytes, ret;
102	u8 buf = 0, flags;
103
104	/* check for bus probe */
105	p = &msgs[0];
106	if ((num == 1) && (p->len == 0)) {
107		ret = radeon_process_i2c_ch(i2c,
108					    p->slave, HW_I2C_WRITE,
109					    &buf, 1);
110		if (ret)
111			return -ret; /* "ret" is returned on Linux. */
112		else
113			return (0); /* "num" is returned on Linux. */
114	}
115
116	for (i = 0; i < num; i++) {
117		p = &msgs[i];
118		remaining = p->len;
119		buffer_offset = 0;
120		/* max_bytes are a limitation of ProcessI2cChannelTransaction not the hw */
121		if (p->flags & IIC_M_RD) {
122			max_bytes = ATOM_MAX_HW_I2C_READ;
123			flags = HW_I2C_READ;
124		} else {
125			max_bytes = ATOM_MAX_HW_I2C_WRITE;
126			flags = HW_I2C_WRITE;
127		}
128		while (remaining) {
129			if (remaining > max_bytes)
130				current_count = max_bytes;
131			else
132				current_count = remaining;
133			ret = radeon_process_i2c_ch(i2c,
134						    p->slave, flags,
135						    &p->buf[buffer_offset], current_count);
136			if (ret)
137				return -ret; /* "ret" is returned on Linux. */
138			remaining -= current_count;
139			buffer_offset += current_count;
140		}
141	}
142
143	return (0); /* "num" is returned on Linux. */
144}
145
146static int
147radeon_atom_hw_i2c_probe(device_t dev)
148{
149
150	return (BUS_PROBE_SPECIFIC);
151}
152
153static int
154radeon_atom_hw_i2c_attach(device_t dev)
155{
156	struct radeon_i2c_chan *i2c;
157	device_t iic_dev;
158
159	i2c = device_get_softc(dev);
160	device_set_desc(dev, i2c->name);
161
162	/* add generic bit-banging code */
163	iic_dev = device_add_child(dev, "iicbus", -1);
164	if (iic_dev == NULL)
165		return (ENXIO);
166	device_quiet(iic_dev);
167
168	/* attach and probe added child */
169	bus_generic_attach(dev);
170
171	return (0);
172}
173
174static int
175radeon_atom_hw_i2c_detach(device_t dev)
176{
177	/* detach bit-banding code. */
178	bus_generic_detach(dev);
179
180	/* delete bit-banding code. */
181	device_delete_children(dev);
182	return (0);
183}
184
185static int
186radeon_atom_hw_i2c_reset(device_t dev, u_char speed,
187    u_char addr, u_char *oldaddr)
188{
189
190	return (0);
191}
192
193static device_method_t radeon_atom_hw_i2c_methods[] = {
194	DEVMETHOD(device_probe,		radeon_atom_hw_i2c_probe),
195	DEVMETHOD(device_attach,	radeon_atom_hw_i2c_attach),
196	DEVMETHOD(device_detach,	radeon_atom_hw_i2c_detach),
197	DEVMETHOD(iicbus_reset,		radeon_atom_hw_i2c_reset),
198	DEVMETHOD(iicbus_transfer,	radeon_atom_hw_i2c_xfer),
199	DEVMETHOD_END
200};
201
202static driver_t radeon_atom_hw_i2c_driver = {
203	"radeon_atom_hw_i2c",
204	radeon_atom_hw_i2c_methods,
205	0
206};
207
208static devclass_t radeon_atom_hw_i2c_devclass;
209DRIVER_MODULE_ORDERED(radeon_atom_hw_i2c, drmn, radeon_atom_hw_i2c_driver,
210    radeon_atom_hw_i2c_devclass, 0, 0, SI_ORDER_ANY);
211