1183724Ssos/*-
2230132Suqs * Copyright (c) 1998 - 2008 S��ren Schmidt <sos@FreeBSD.org>
3183724Ssos * All rights reserved.
4183724Ssos *
5183724Ssos * Redistribution and use in source and binary forms, with or without
6183724Ssos * modification, are permitted provided that the following conditions
7183724Ssos * are met:
8183724Ssos * 1. Redistributions of source code must retain the above copyright
9183724Ssos *    notice, this list of conditions and the following disclaimer,
10183724Ssos *    without modification, immediately at the beginning of the file.
11183724Ssos * 2. Redistributions in binary form must reproduce the above copyright
12183724Ssos *    notice, this list of conditions and the following disclaimer in the
13183724Ssos *    documentation and/or other materials provided with the distribution.
14183724Ssos *
15183724Ssos * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16183724Ssos * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17183724Ssos * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18183724Ssos * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19183724Ssos * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20183724Ssos * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21183724Ssos * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22183724Ssos * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23183724Ssos * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24183724Ssos * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25183724Ssos */
26183724Ssos
27183724Ssos#include <sys/cdefs.h>
28183724Ssos__FBSDID("$FreeBSD$");
29183724Ssos
30183724Ssos#include <sys/param.h>
31183724Ssos#include <sys/module.h>
32183724Ssos#include <sys/systm.h>
33183724Ssos#include <sys/kernel.h>
34183724Ssos#include <sys/ata.h>
35183724Ssos#include <sys/bus.h>
36183724Ssos#include <sys/endian.h>
37183724Ssos#include <sys/malloc.h>
38183724Ssos#include <sys/lock.h>
39183724Ssos#include <sys/mutex.h>
40183724Ssos#include <sys/sema.h>
41183724Ssos#include <sys/taskqueue.h>
42183724Ssos#include <vm/uma.h>
43183724Ssos#include <machine/stdarg.h>
44183724Ssos#include <machine/resource.h>
45183724Ssos#include <machine/bus.h>
46183724Ssos#include <sys/rman.h>
47183724Ssos#include <dev/pci/pcivar.h>
48183724Ssos#include <dev/pci/pcireg.h>
49183724Ssos#include <dev/ata/ata-all.h>
50183724Ssos#include <dev/ata/ata-pci.h>
51183724Ssos#include <ata_if.h>
52183724Ssos
53183724Ssos/* local prototypes */
54183724Ssosstatic int ata_jmicron_chipinit(device_t dev);
55200171Smavstatic int ata_jmicron_ch_attach(device_t dev);
56200171Smavstatic int ata_jmicron_setmode(device_t dev, int target, int mode);
57183724Ssos
58183724Ssos/*
59183724Ssos * JMicron chipset support functions
60183724Ssos */
61183724Ssosstatic int
62183724Ssosata_jmicron_probe(device_t dev)
63183724Ssos{
64183724Ssos    struct ata_pci_controller *ctlr = device_get_softc(dev);
65233282Smarius    const struct ata_chip_id *idx;
66242625Sdim    static const struct ata_chip_id ids[] =
67183724Ssos    {{ ATA_JMB360, 0, 1, 0, ATA_SA300, "JMB360" },
68199322Smav     { ATA_JMB361, 0, 1, 1, ATA_UDMA6, "JMB361" },
69239907Smav     { ATA_JMB362, 0, 2, 0, ATA_SA300, "JMB362" },
70199322Smav     { ATA_JMB363, 0, 2, 1, ATA_UDMA6, "JMB363" },
71199322Smav     { ATA_JMB365, 0, 1, 2, ATA_UDMA6, "JMB365" },
72199322Smav     { ATA_JMB366, 0, 2, 2, ATA_UDMA6, "JMB366" },
73183724Ssos     { ATA_JMB368, 0, 0, 1, ATA_UDMA6, "JMB368" },
74273725Smav     { ATA_JMB368_2, 0, 0, 1, ATA_UDMA6, "JMB368" },
75183724Ssos     { 0, 0, 0, 0, 0, 0}};
76183724Ssos    char buffer[64];
77183724Ssos
78183724Ssos    if (pci_get_vendor(dev) != ATA_JMICRON_ID)
79183724Ssos	return ENXIO;
80183724Ssos
81183724Ssos    if (!(idx = ata_match_chip(dev, ids)))
82183724Ssos        return ENXIO;
83183724Ssos
84200171Smav    sprintf(buffer, "JMicron %s %s controller",
85200171Smav	idx->text, ata_mode2str(idx->max_dma));
86183724Ssos    device_set_desc_copy(dev, buffer);
87183724Ssos    ctlr->chip = idx;
88183724Ssos    ctlr->chipinit = ata_jmicron_chipinit;
89281140Smav    return (BUS_PROBE_LOW_PRIORITY);
90183724Ssos}
91183724Ssos
92183724Ssosstatic int
93183724Ssosata_jmicron_chipinit(device_t dev)
94183724Ssos{
95183724Ssos    struct ata_pci_controller *ctlr = device_get_softc(dev);
96199322Smav    device_t child;
97183724Ssos
98183724Ssos    if (ata_setup_interrupt(dev, ata_generic_intr))
99183724Ssos	return ENXIO;
100183724Ssos
101183724Ssos    /* do we have multiple PCI functions ? */
102183724Ssos    if (pci_read_config(dev, 0xdf, 1) & 0x40) {
103287016Smav	/* If this was not claimed by AHCI, then we are on the PATA part */
104200171Smav	ctlr->ch_attach = ata_jmicron_ch_attach;
105188769Smav	ctlr->ch_detach = ata_pci_ch_detach;
106183724Ssos	ctlr->reset = ata_generic_reset;
107183724Ssos	ctlr->setmode = ata_jmicron_setmode;
108183724Ssos	ctlr->channels = ctlr->chip->cfg2;
109183724Ssos    }
110183724Ssos    else {
111183724Ssos	/* set controller configuration to a combined setup we support */
112183724Ssos	pci_write_config(dev, 0x40, 0x80c0a131, 4);
113183724Ssos	pci_write_config(dev, 0x80, 0x01200000, 4);
114199322Smav	/* Create AHCI subdevice if AHCI part present. */
115199322Smav	if (ctlr->chip->cfg1) {
116199322Smav	    	child = device_add_child(dev, NULL, -1);
117199322Smav		if (child != NULL) {
118199322Smav		    device_set_ivars(child, (void *)(intptr_t)-1);
119199322Smav		    bus_generic_attach(dev);
120199322Smav		}
121199322Smav	}
122200171Smav	ctlr->ch_attach = ata_jmicron_ch_attach;
123199322Smav	ctlr->ch_detach = ata_pci_ch_detach;
124199322Smav	ctlr->reset = ata_generic_reset;
125183724Ssos	ctlr->setmode = ata_jmicron_setmode;
126199322Smav	ctlr->channels = ctlr->chip->cfg2;
127183724Ssos    }
128183724Ssos    return 0;
129183724Ssos}
130183724Ssos
131200171Smavstatic int
132200171Smavata_jmicron_ch_attach(device_t dev)
133183724Ssos{
134200171Smav	struct ata_channel *ch = device_get_softc(dev);
135200171Smav	int error;
136200171Smav
137200171Smav	error = ata_pci_ch_attach(dev);
138200171Smav	ch->flags |= ATA_CHECKS_CABLE;
139200171Smav	return (error);
140200171Smav}
141183724Ssos
142200171Smavstatic int
143200171Smavata_jmicron_setmode(device_t dev, int target, int mode)
144200171Smav{
145200171Smav	struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
146200171Smav
147200171Smav	mode = min(mode, ctlr->chip->max_dma);
148183724Ssos	/* check for 80pin cable present */
149209872Smav	if (ata_dma_check_80pin && mode > ATA_UDMA2 &&
150209872Smav	    pci_read_config(dev, 0x40, 1) & 0x08) {
151200171Smav		ata_print_cable(dev, "controller");
152200171Smav		mode = ATA_UDMA2;
153200171Smav	}
154200171Smav	/* Nothing to do to setup mode, the controller snoop SET_FEATURE cmd. */
155200171Smav	return (mode);
156183724Ssos}
157183724Ssos
158183724SsosATA_DECLARE_DRIVER(ata_jmicron);
159