1248557Sray/*- 2248557Sray * Copyright (c) 2012 The FreeBSD Foundation 3248557Sray * All rights reserved. 4248557Sray * 5248557Sray * This software was developed by Oleksandr Rybalko under sponsorship 6248557Sray * from the FreeBSD Foundation. 7248557Sray * 8248557Sray * Redistribution and use in source and binary forms, with or without 9248557Sray * modification, are permitted provided that the following conditions 10248557Sray * are met: 11248557Sray * 1. Redistributions of source code must retain the above copyright 12248557Sray * notice, this list of conditions and the following disclaimer. 13248557Sray * 2. Redistributions in binary form must reproduce the above copyright 14248557Sray * notice, this list of conditions and the following disclaimer in the 15248557Sray * documentation and/or other materials provided with the distribution. 16248557Sray * 17248557Sray * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18248557Sray * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19248557Sray * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20248557Sray * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21248557Sray * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22248557Sray * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23248557Sray * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24248557Sray * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25248557Sray * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26248557Sray * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27248557Sray * SUCH DAMAGE. 28248557Sray */ 29248557Sray 30248557Sray#include <sys/cdefs.h> 31248557Sray__FBSDID("$FreeBSD$"); 32248557Sray 33248557Sray#include <sys/param.h> 34248557Sray#include <sys/module.h> 35248557Sray#include <sys/systm.h> 36248557Sray#include <sys/kernel.h> 37248557Sray#include <sys/ata.h> 38248557Sray#include <sys/bus.h> 39248557Sray#include <sys/endian.h> 40248557Sray#include <sys/malloc.h> 41248557Sray#include <sys/lock.h> 42248557Sray#include <sys/mutex.h> 43248557Sray#include <sys/sema.h> 44248557Sray#include <sys/taskqueue.h> 45248557Sray#include <vm/uma.h> 46248557Sray#include <machine/stdarg.h> 47248557Sray#include <machine/resource.h> 48248557Sray#include <machine/bus.h> 49248557Sray#include <sys/rman.h> 50248557Sray#include <dev/pci/pcivar.h> 51248557Sray#include <dev/pci/pcireg.h> 52248557Sray#include <dev/ata/ata-all.h> 53248557Sray#include <dev/ata/ata-pci.h> 54248557Sray#include <ata_if.h> 55248557Sray 56248557Sray#include <dev/fdt/fdt_common.h> 57248557Sray#include <dev/ofw/openfirm.h> 58248557Sray#include <dev/ofw/ofw_bus.h> 59248557Sray#include <dev/ofw/ofw_bus_subr.h> 60248557Sray 61248557Sray#include <machine/fdt.h> 62248557Sray 63248557Sray/* local prototypes */ 64248557Sraystatic int imx_ata_ch_attach(device_t dev); 65248557Sraystatic int imx_ata_setmode(device_t dev, int target, int mode); 66248557Sray 67248557Sraystatic int 68248557Srayimx_ata_probe(device_t dev) 69248557Sray{ 70248557Sray struct ata_pci_controller *ctrl; 71248557Sray 72266152Sian if (!ofw_bus_status_okay(dev)) 73266152Sian return (ENXIO); 74266152Sian 75266360Sian if (!ofw_bus_is_compatible(dev, "fsl,imx51-ata") && 76266360Sian !ofw_bus_is_compatible(dev, "fsl,imx53-ata")) 77248557Sray return (ENXIO); 78248557Sray 79248557Sray ctrl = device_get_softc(dev); 80248557Sray 81248557Sray device_set_desc(dev, "Freescale Integrated PATA Controller"); 82281140Smav return (BUS_PROBE_LOW_PRIORITY); 83248557Sray} 84248557Sray 85248557Sraystatic void 86248557Srayimx_ata_intr(void *data) 87248557Sray{ 88248557Sray struct ata_pci_controller *ctrl = data; 89248557Sray 90248557Sray bus_write_2(ctrl->r_res1, 0x28, bus_read_2(ctrl->r_res1, 0x28)); 91248557Sray ctrl->interrupt[0].function(ctrl->interrupt[0].argument); 92248557Sray} 93248557Sray 94248557Sraystatic int 95248557Srayimx_ata_attach(device_t dev) 96248557Sray{ 97248557Sray struct ata_pci_controller *ctrl; 98248557Sray device_t child; 99248557Sray int unit; 100248557Sray 101248557Sray ctrl = device_get_softc(dev); 102248557Sray /* do chipset specific setups only needed once */ 103248557Sray ctrl->legacy = ata_legacy(dev); 104248557Sray ctrl->channels = 1; 105248557Sray ctrl->ichannels = -1; 106248557Sray ctrl->ch_attach = ata_pci_ch_attach; 107248557Sray ctrl->ch_detach = ata_pci_ch_detach; 108248557Sray ctrl->dev = dev; 109248557Sray 110248557Sray ctrl->r_type1 = SYS_RES_MEMORY; 111248557Sray ctrl->r_rid1 = 0; 112248557Sray ctrl->r_res1 = bus_alloc_resource_any(dev, ctrl->r_type1, 113248557Sray &ctrl->r_rid1, RF_ACTIVE); 114248557Sray 115248557Sray if (ata_setup_interrupt(dev, imx_ata_intr)) { 116248557Sray device_printf(dev, "failed to setup interrupt\n"); 117248557Sray return ENXIO; 118248557Sray } 119248557Sray 120248557Sray ctrl->channels = 1; 121248557Sray 122248557Sray ctrl->ch_attach = imx_ata_ch_attach; 123248557Sray ctrl->setmode = imx_ata_setmode; 124248557Sray 125248557Sray /* attach all channels on this controller */ 126248557Sray unit = 0; 127248557Sray child = device_add_child(dev, "ata", ((unit == 0) && ctrl->legacy) ? 128248557Sray unit : devclass_find_free_unit(ata_devclass, 2)); 129248557Sray if (child == NULL) 130248557Sray device_printf(dev, "failed to add ata child device\n"); 131248557Sray else 132248557Sray device_set_ivars(child, (void *)(intptr_t)unit); 133248557Sray 134248557Sray bus_generic_attach(dev); 135248557Sray return 0; 136248557Sray} 137248557Sray 138248557Sraystatic int 139248557Srayimx_ata_ch_attach(device_t dev) 140248557Sray{ 141248557Sray struct ata_pci_controller *ctrl; 142248557Sray struct ata_channel *ch; 143248557Sray int i; 144248557Sray 145248557Sray ctrl = device_get_softc(device_get_parent(dev)); 146248557Sray ch = device_get_softc(dev); 147248557Sray for (i = ATA_DATA; i < ATA_MAX_RES; i++) 148248557Sray ch->r_io[i].res = ctrl->r_res1; 149248557Sray 150248557Sray bus_write_2(ctrl->r_res1, 0x24, 0x80); 151248557Sray DELAY(100); 152248557Sray bus_write_2(ctrl->r_res1, 0x24, 0xc0); 153248557Sray DELAY(100); 154248557Sray 155248557Sray 156248557Sray /* Write TIME_OFF/ON/1/2W */ 157248557Sray bus_write_1(ctrl->r_res1, 0x00, 3); 158248557Sray bus_write_1(ctrl->r_res1, 0x01, 3); 159248557Sray bus_write_1(ctrl->r_res1, 0x02, (25 + 15) / 15); 160248557Sray bus_write_1(ctrl->r_res1, 0x03, (70 + 15) / 15); 161248557Sray 162248557Sray /* Write TIME_2R/AX/RDX/4 */ 163248557Sray bus_write_1(ctrl->r_res1, 0x04, (70 + 15) / 15); 164248557Sray bus_write_1(ctrl->r_res1, 0x05, (50 + 15) / 15 + 2); 165248557Sray bus_write_1(ctrl->r_res1, 0x06, 1); 166248557Sray bus_write_1(ctrl->r_res1, 0x07, (10 + 15) / 15); 167248557Sray 168248557Sray /* Write TIME_9 ; the rest of timing registers is irrelevant for PIO */ 169248557Sray bus_write_1(ctrl->r_res1, 0x08, (10 + 15) / 15); 170248557Sray 171248557Sray bus_write_2(ctrl->r_res1, 0x24, 0xc1); 172248557Sray DELAY(30000); 173248557Sray 174248557Sray /* setup ATA registers */ 175248557Sray ch->r_io[ATA_DATA ].offset = 0xa0; 176248557Sray ch->r_io[ATA_FEATURE].offset = 0xa4; 177248557Sray ch->r_io[ATA_ERROR ].offset = 0xa4; 178248557Sray ch->r_io[ATA_COUNT ].offset = 0xa8; 179248557Sray ch->r_io[ATA_SECTOR ].offset = 0xac; 180248557Sray ch->r_io[ATA_CYL_LSB].offset = 0xb0; 181248557Sray ch->r_io[ATA_CYL_MSB].offset = 0xb4; 182248557Sray ch->r_io[ATA_DRIVE ].offset = 0xb8; 183248557Sray ch->r_io[ATA_COMMAND].offset = 0xbc; 184248557Sray 185248557Sray ch->r_io[ATA_STATUS ].offset = 0xbc; 186248557Sray ch->r_io[ATA_ALTSTAT].offset = 0xd8; 187248557Sray ch->r_io[ATA_CONTROL].offset = 0xd8; 188248557Sray 189248557Sray ata_pci_hw(dev); 190248557Sray 191248557Sray ch->flags |= ATA_NO_SLAVE; 192248557Sray ch->flags |= ATA_USE_16BIT; 193248557Sray ch->flags |= ATA_CHECKS_CABLE; 194248557Sray ch->flags |= ATA_KNOWN_PRESENCE; 195248557Sray 196248557Sray /* Clear pending interrupts. */ 197248557Sray bus_write_2(ctrl->r_res1, 0x28, 0xf8); 198248557Sray /* Enable all, but Idle interrupts. */ 199248557Sray bus_write_2(ctrl->r_res1, 0x2c, 0x88); 200248557Sray 201248557Sray return 0; 202248557Sray} 203248557Sray 204248557Sraystatic int 205248557Srayimx_ata_setmode(device_t dev, int target, int mode) 206248557Sray{ 207248557Sray 208248557Sray return (min(mode, ATA_PIO4)); 209248557Sray} 210248557Sray 211248557Sraystatic device_method_t imx_ata_methods[] = { 212248557Sray DEVMETHOD(device_probe, imx_ata_probe), 213248557Sray DEVMETHOD(device_attach, imx_ata_attach), 214248557Sray DEVMETHOD(device_detach, ata_pci_detach), 215248557Sray DEVMETHOD(device_suspend, ata_pci_suspend), 216248557Sray DEVMETHOD(device_resume, ata_pci_resume), 217248557Sray DEVMETHOD(device_shutdown, bus_generic_shutdown), 218248557Sray DEVMETHOD(bus_read_ivar, ata_pci_read_ivar), 219248557Sray DEVMETHOD(bus_write_ivar, ata_pci_write_ivar), 220248557Sray DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource), 221248557Sray DEVMETHOD(bus_release_resource, ata_pci_release_resource), 222248557Sray DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 223248557Sray DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 224248557Sray DEVMETHOD(bus_setup_intr, ata_pci_setup_intr), 225248557Sray DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr), 226248557Sray DEVMETHOD(pci_read_config, ata_pci_read_config), 227248557Sray DEVMETHOD(pci_write_config, ata_pci_write_config), 228248557Sray DEVMETHOD(bus_print_child, ata_pci_print_child), 229248557Sray DEVMETHOD(bus_child_location_str, ata_pci_child_location_str), 230248557Sray DEVMETHOD_END 231248557Sray}; 232248557Sraystatic driver_t imx_ata_driver = { 233248557Sray "atapci", 234248557Sray imx_ata_methods, 235248557Sray sizeof(struct ata_pci_controller) 236248557Sray}; 237248557SrayDRIVER_MODULE(imx_ata, simplebus, imx_ata_driver, ata_pci_devclass, NULL, 238248557Sray NULL); 239248557SrayMODULE_VERSION(imx_ata, 1); 240248557SrayMODULE_DEPEND(imx_ata, ata, 1, 1, 1); 241248557SrayMODULE_DEPEND(imx_ata, atapci, 1, 1, 1); 242