aha.c revision 315813
1/*
2 * Generic register and struct definitions for the Adaptech 154x/164x
3 * SCSI host adapters. Product specific probe and attach routines can
4 * be found in:
5 *      aha 1542A/1542B/1542C/1542CF/1542CP	aha_isa.c
6 *      aha 1640			aha_mca.c
7 */
8/*-
9 * Copyright (c) 1998 M. Warner Losh.
10 * All Rights Reserved.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 *    notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 *    notice, this list of conditions and the following disclaimer in the
19 *    documentation and/or other materials provided with the distribution.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * Derived from bt.c written by:
34 *
35 * Copyright (c) 1998 Justin T. Gibbs.
36 * All rights reserved.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 * 1. Redistributions of source code must retain the above copyright
42 *    notice, this list of conditions, and the following disclaimer,
43 *    without modification, immediately at the beginning of the file.
44 * 2. The name of the author may not be used to endorse or promote products
45 *    derived from this software without specific prior written permission.
46 *
47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
48 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
49 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
50 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
51 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
52 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
53 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
55 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
56 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
57 * SUCH DAMAGE.
58 */
59
60#include <sys/cdefs.h>
61__FBSDID("$FreeBSD: stable/10/sys/dev/aha/aha.c 315813 2017-03-23 06:41:13Z mav $");
62
63#include <sys/param.h>
64#include <sys/conf.h>
65#include <sys/bus.h>
66#include <sys/systm.h>
67#include <sys/malloc.h>
68#include <sys/kernel.h>
69#include <sys/lock.h>
70#include <sys/module.h>
71#include <sys/mutex.h>
72#include <sys/rman.h>
73
74#include <machine/bus.h>
75
76#include <cam/cam.h>
77#include <cam/cam_ccb.h>
78#include <cam/cam_sim.h>
79#include <cam/cam_xpt_sim.h>
80#include <cam/cam_debug.h>
81
82#include <cam/scsi/scsi_message.h>
83
84#include <dev/aha/ahareg.h>
85
86#define	PRVERB(x) do { if (bootverbose) device_printf x; } while (0)
87
88/* Macro to determine that a rev is potentially a new valid one
89 * so that the driver doesn't keep breaking on new revs as it
90 * did for the CF and CP.
91 */
92#define PROBABLY_NEW_BOARD(REV) (REV > 0x43 && REV < 0x56)
93
94/* MailBox Management functions */
95static __inline void	ahanextinbox(struct aha_softc *aha);
96static __inline void	ahanextoutbox(struct aha_softc *aha);
97
98#define aha_name(aha)	device_get_nameunit(aha->dev)
99
100static __inline void
101ahanextinbox(struct aha_softc *aha)
102{
103	if (aha->cur_inbox == aha->last_inbox)
104		aha->cur_inbox = aha->in_boxes;
105	else
106		aha->cur_inbox++;
107}
108
109static __inline void
110ahanextoutbox(struct aha_softc *aha)
111{
112	if (aha->cur_outbox == aha->last_outbox)
113		aha->cur_outbox = aha->out_boxes;
114	else
115		aha->cur_outbox++;
116}
117
118#define ahautoa24(u,s3)			\
119	(s3)[0] = ((u) >> 16) & 0xff;	\
120	(s3)[1] = ((u) >> 8) & 0xff;	\
121	(s3)[2] = (u) & 0xff;
122
123#define aha_a24tou(s3) \
124	(((s3)[0] << 16) | ((s3)[1] << 8) | (s3)[2])
125
126/* CCB Management functions */
127static __inline uint32_t		ahaccbvtop(struct aha_softc *aha,
128						  struct aha_ccb *accb);
129static __inline struct aha_ccb*		ahaccbptov(struct aha_softc *aha,
130						  uint32_t ccb_addr);
131
132static __inline uint32_t
133ahaccbvtop(struct aha_softc *aha, struct aha_ccb *accb)
134{
135	return (aha->aha_ccb_physbase
136	      + (uint32_t)((caddr_t)accb - (caddr_t)aha->aha_ccb_array));
137}
138static __inline struct aha_ccb *
139ahaccbptov(struct aha_softc *aha, uint32_t ccb_addr)
140{
141	return (aha->aha_ccb_array +
142	      + ((struct aha_ccb*)(uintptr_t)ccb_addr -
143	         (struct aha_ccb*)(uintptr_t)aha->aha_ccb_physbase));
144}
145
146static struct aha_ccb*	ahagetccb(struct aha_softc *aha);
147static __inline void	ahafreeccb(struct aha_softc *aha, struct aha_ccb *accb);
148static void		ahaallocccbs(struct aha_softc *aha);
149static bus_dmamap_callback_t ahaexecuteccb;
150static void		ahadone(struct aha_softc *aha, struct aha_ccb *accb,
151			       aha_mbi_comp_code_t comp_code);
152static void		aha_intr_locked(struct aha_softc *aha);
153
154/* Host adapter command functions */
155static int	ahareset(struct aha_softc* aha, int hard_reset);
156
157/* Initialization functions */
158static int			ahainitmboxes(struct aha_softc *aha);
159static bus_dmamap_callback_t	ahamapmboxes;
160static bus_dmamap_callback_t	ahamapccbs;
161static bus_dmamap_callback_t	ahamapsgs;
162
163/* Transfer Negotiation Functions */
164static void ahafetchtransinfo(struct aha_softc *aha,
165			     struct ccb_trans_settings *cts);
166
167/* CAM SIM entry points */
168#define ccb_accb_ptr spriv_ptr0
169#define ccb_aha_ptr spriv_ptr1
170static void	ahaaction(struct cam_sim *sim, union ccb *ccb);
171static void	ahapoll(struct cam_sim *sim);
172
173/* Our timeout handler */
174static void	ahatimeout(void *arg);
175
176/* Exported functions */
177void
178aha_alloc(struct aha_softc *aha)
179{
180
181	SLIST_INIT(&aha->free_aha_ccbs);
182	LIST_INIT(&aha->pending_ccbs);
183	SLIST_INIT(&aha->sg_maps);
184	aha->ccb_sg_opcode = INITIATOR_SG_CCB_WRESID;
185	aha->ccb_ccb_opcode = INITIATOR_CCB_WRESID;
186	mtx_init(&aha->lock, "aha", NULL, MTX_DEF);
187}
188
189void
190aha_free(struct aha_softc *aha)
191{
192	switch (aha->init_level) {
193	default:
194	case 8:
195	{
196		struct sg_map_node *sg_map;
197
198		while ((sg_map = SLIST_FIRST(&aha->sg_maps))!= NULL) {
199			SLIST_REMOVE_HEAD(&aha->sg_maps, links);
200			bus_dmamap_unload(aha->sg_dmat, sg_map->sg_dmamap);
201			bus_dmamem_free(aha->sg_dmat, sg_map->sg_vaddr,
202			    sg_map->sg_dmamap);
203			free(sg_map, M_DEVBUF);
204		}
205		bus_dma_tag_destroy(aha->sg_dmat);
206	}
207	case 7:
208		bus_dmamap_unload(aha->ccb_dmat, aha->ccb_dmamap);
209	case 6:
210		bus_dmamem_free(aha->ccb_dmat, aha->aha_ccb_array,
211		    aha->ccb_dmamap);
212		bus_dmamap_destroy(aha->ccb_dmat, aha->ccb_dmamap);
213	case 5:
214		bus_dma_tag_destroy(aha->ccb_dmat);
215	case 4:
216		bus_dmamap_unload(aha->mailbox_dmat, aha->mailbox_dmamap);
217	case 3:
218		bus_dmamem_free(aha->mailbox_dmat, aha->in_boxes,
219		    aha->mailbox_dmamap);
220		bus_dmamap_destroy(aha->mailbox_dmat, aha->mailbox_dmamap);
221	case 2:
222		bus_dma_tag_destroy(aha->buffer_dmat);
223	case 1:
224		bus_dma_tag_destroy(aha->mailbox_dmat);
225	case 0:
226		break;
227	}
228	mtx_destroy(&aha->lock);
229}
230
231/*
232 * Probe the adapter and verify that the card is an Adaptec.
233 */
234int
235aha_probe(struct aha_softc* aha)
236{
237	u_int	 status;
238	u_int	 intstat;
239	int	 error;
240	board_id_data_t	board_id;
241
242	/*
243	 * See if the three I/O ports look reasonable.
244	 * Touch the minimal number of registers in the
245	 * failure case.
246	 */
247	status = aha_inb(aha, STATUS_REG);
248	if ((status == 0) ||
249	    (status & (DIAG_ACTIVE|CMD_REG_BUSY | STATUS_REG_RSVD)) != 0) {
250		PRVERB((aha->dev, "status reg test failed %x\n", status));
251		return (ENXIO);
252	}
253
254	intstat = aha_inb(aha, INTSTAT_REG);
255	if ((intstat & INTSTAT_REG_RSVD) != 0) {
256		PRVERB((aha->dev, "Failed Intstat Reg Test\n"));
257		return (ENXIO);
258	}
259
260	/*
261	 * Looking good so far.  Final test is to reset the
262	 * adapter and fetch the board ID and ensure we aren't
263	 * looking at a BusLogic.
264	 */
265	if ((error = ahareset(aha, /*hard_reset*/TRUE)) != 0) {
266		PRVERB((aha->dev, "Failed Reset\n"));
267		return (ENXIO);
268	}
269
270	/*
271	 * Get the board ID.  We use this to see if we're dealing with
272	 * a buslogic card or an aha card (or clone).
273	 */
274	error = aha_cmd(aha, AOP_INQUIRE_BOARD_ID, NULL, /*parmlen*/0,
275	    (uint8_t*)&board_id, sizeof(board_id), DEFAULT_CMD_TIMEOUT);
276	if (error != 0) {
277		PRVERB((aha->dev, "INQUIRE failed %x\n", error));
278		return (ENXIO);
279	}
280	aha->fw_major = board_id.firmware_rev_major;
281	aha->fw_minor = board_id.firmware_rev_minor;
282	aha->boardid = board_id.board_type;
283
284	/*
285	 * The Buslogic cards have an id of either 0x41 or 0x42.  So
286	 * if those come up in the probe, we test the geometry register
287	 * of the board.  Adaptec boards that are this old will not have
288	 * this register, and return 0xff, while buslogic cards will return
289	 * something different.
290	 *
291	 * It appears that for reasons unknow, for the for the
292	 * aha-1542B cards, we need to wait a little bit before trying
293	 * to read the geometry register.  I picked 10ms since we have
294	 * reports that a for loop to 1000 did the trick, and this
295	 * errs on the side of conservatism.  Besides, no one will
296	 * notice a 10mS delay here, even the 1542B card users :-)
297	 *
298	 * Some compatible cards return 0 here.  Some cards also
299	 * seem to return 0x7f.
300	 *
301	 * XXX I'm not sure how this will impact other cloned cards
302	 *
303	 * This really should be replaced with the esetup command, since
304	 * that appears to be more reliable.  This becomes more and more
305	 * true over time as we discover more cards that don't read the
306	 * geometry register consistantly.
307	 */
308	if (aha->boardid <= 0x42) {
309		/* Wait 10ms before reading */
310		DELAY(10000);
311		status = aha_inb(aha, GEOMETRY_REG);
312		if (status != 0xff && status != 0x00 && status != 0x7f) {
313			PRVERB((aha->dev, "Geometry Register test failed %#x\n",
314				status));
315			return (ENXIO);
316		}
317	}
318
319	return (0);
320}
321
322/*
323 * Pull the boards setup information and record it in our softc.
324 */
325int
326aha_fetch_adapter_info(struct aha_softc *aha)
327{
328	setup_data_t	setup_info;
329	config_data_t config_data;
330	uint8_t length_param;
331	int	 error;
332	struct	aha_extbios extbios;
333
334	switch (aha->boardid) {
335	case BOARD_1540_16HEAD_BIOS:
336		snprintf(aha->model, sizeof(aha->model), "1540 16 head BIOS");
337		break;
338	case BOARD_1540_64HEAD_BIOS:
339		snprintf(aha->model, sizeof(aha->model), "1540 64 head BIOS");
340		break;
341	case BOARD_1542:
342		snprintf(aha->model, sizeof(aha->model), "1540/1542 64 head BIOS");
343		break;
344	case BOARD_1640:
345		snprintf(aha->model, sizeof(aha->model), "1640");
346		break;
347	case BOARD_1740:
348		snprintf(aha->model, sizeof(aha->model), "1740A/1742A/1744");
349		break;
350	case BOARD_1542C:
351		snprintf(aha->model, sizeof(aha->model), "1542C");
352		break;
353	case BOARD_1542CF:
354		snprintf(aha->model, sizeof(aha->model), "1542CF");
355		break;
356	case BOARD_1542CP:
357		snprintf(aha->model, sizeof(aha->model), "1542CP");
358		break;
359	default:
360		snprintf(aha->model, sizeof(aha->model), "Unknown");
361		break;
362	}
363	/*
364	 * If we are a new type of 1542 board (anything newer than a 1542C)
365	 * then disable the extended bios so that the
366	 * mailbox interface is unlocked.
367	 * This is also true for the 1542B Version 3.20. First Adaptec
368	 * board that supports >1Gb drives.
369	 * No need to check the extended bios flags as some of the
370	 * extensions that cause us problems are not flagged in that byte.
371	 */
372	if (PROBABLY_NEW_BOARD(aha->boardid) ||
373		(aha->boardid == 0x41
374		&& aha->fw_major == 0x31 &&
375		aha->fw_minor >= 0x34)) {
376		error = aha_cmd(aha, AOP_RETURN_EXT_BIOS_INFO, NULL,
377		    /*paramlen*/0, (u_char *)&extbios, sizeof(extbios),
378		    DEFAULT_CMD_TIMEOUT);
379		if (error != 0) {
380			device_printf(aha->dev,
381			    "AOP_RETURN_EXT_BIOS_INFO - Failed.");
382			return (error);
383		}
384		error = aha_cmd(aha, AOP_MBOX_IF_ENABLE, (uint8_t *)&extbios,
385		    /*paramlen*/2, NULL, 0, DEFAULT_CMD_TIMEOUT);
386		if (error != 0) {
387			device_printf(aha->dev, "AOP_MBOX_IF_ENABLE - Failed.");
388			return (error);
389		}
390	}
391	if (aha->boardid < 0x41)
392		device_printf(aha->dev, "Warning: aha-1542A won't work.\n");
393
394	aha->max_sg = 17;		/* Need >= 17 to do 64k I/O */
395	aha->diff_bus = 0;
396	aha->extended_lun = 0;
397	aha->extended_trans = 0;
398	aha->max_ccbs = 16;
399	/* Determine Sync/Wide/Disc settings */
400	length_param = sizeof(setup_info);
401	error = aha_cmd(aha, AOP_INQUIRE_SETUP_INFO, &length_param,
402	    /*paramlen*/1, (uint8_t*)&setup_info, sizeof(setup_info),
403	    DEFAULT_CMD_TIMEOUT);
404	if (error != 0) {
405		device_printf(aha->dev, "aha_fetch_adapter_info - Failed "
406		    "Get Setup Info\n");
407		return (error);
408	}
409	if (setup_info.initiate_sync != 0) {
410		aha->sync_permitted = ALL_TARGETS;
411	}
412	aha->disc_permitted = ALL_TARGETS;
413
414	/* We need as many mailboxes as we can have ccbs */
415	aha->num_boxes = aha->max_ccbs;
416
417	/* Determine our SCSI ID */
418	error = aha_cmd(aha, AOP_INQUIRE_CONFIG, NULL, /*parmlen*/0,
419	    (uint8_t*)&config_data, sizeof(config_data), DEFAULT_CMD_TIMEOUT);
420	if (error != 0) {
421		device_printf(aha->dev,
422		    "aha_fetch_adapter_info - Failed Get Config\n");
423		return (error);
424	}
425	aha->scsi_id = config_data.scsi_id;
426	return (0);
427}
428
429/*
430 * Start the board, ready for normal operation
431 */
432int
433aha_init(struct aha_softc* aha)
434{
435	/* Announce the Adapter */
436	device_printf(aha->dev, "AHA-%s FW Rev. %c.%c (ID=%x) ",
437	    aha->model, aha->fw_major, aha->fw_minor, aha->boardid);
438
439	if (aha->diff_bus != 0)
440		printf("Diff ");
441
442	printf("SCSI Host Adapter, SCSI ID %d, %d CCBs\n", aha->scsi_id,
443	    aha->max_ccbs);
444
445	/*
446	 * Create our DMA tags.  These tags define the kinds of device
447	 * accessible memory allocations and memory mappings we will
448	 * need to perform during normal operation.
449	 *
450	 * Unless we need to further restrict the allocation, we rely
451	 * on the restrictions of the parent dmat, hence the common
452	 * use of MAXADDR and MAXSIZE.
453	 */
454
455	/* DMA tag for mapping buffers into device visible space. */
456	if (bus_dma_tag_create( /* parent	*/ aha->parent_dmat,
457				/* alignment	*/ 1,
458				/* boundary	*/ 0,
459				/* lowaddr	*/ BUS_SPACE_MAXADDR,
460				/* highaddr	*/ BUS_SPACE_MAXADDR,
461				/* filter	*/ NULL,
462				/* filterarg	*/ NULL,
463				/* maxsize	*/ DFLTPHYS,
464				/* nsegments	*/ AHA_NSEG,
465				/* maxsegsz	*/ BUS_SPACE_MAXSIZE_24BIT,
466				/* flags	*/ BUS_DMA_ALLOCNOW,
467				/* lockfunc	*/ busdma_lock_mutex,
468				/* lockarg	*/ &aha->lock,
469				&aha->buffer_dmat) != 0) {
470		goto error_exit;
471	}
472
473	aha->init_level++;
474	/* DMA tag for our mailboxes */
475	if (bus_dma_tag_create(	/* parent	*/ aha->parent_dmat,
476				/* alignment	*/ 1,
477				/* boundary	*/ 0,
478				/* lowaddr	*/ BUS_SPACE_MAXADDR,
479				/* highaddr	*/ BUS_SPACE_MAXADDR,
480				/* filter	*/ NULL,
481				/* filterarg	*/ NULL,
482				/* maxsize	*/ aha->num_boxes *
483						   (sizeof(aha_mbox_in_t) +
484						    sizeof(aha_mbox_out_t)),
485				/* nsegments	*/ 1,
486				/* maxsegsz	*/ BUS_SPACE_MAXSIZE_24BIT,
487				/* flags	*/ 0,
488				/* lockfunc	*/ NULL,
489				/* lockarg	*/ NULL,
490				&aha->mailbox_dmat) != 0) {
491		goto error_exit;
492        }
493
494	aha->init_level++;
495
496	/* Allocation for our mailboxes */
497	if (bus_dmamem_alloc(aha->mailbox_dmat, (void **)&aha->out_boxes,
498	    BUS_DMA_NOWAIT, &aha->mailbox_dmamap) != 0)
499		goto error_exit;
500
501	aha->init_level++;
502
503	/* And permanently map them */
504	bus_dmamap_load(aha->mailbox_dmat, aha->mailbox_dmamap,
505	    aha->out_boxes, aha->num_boxes * (sizeof(aha_mbox_in_t) +
506	    sizeof(aha_mbox_out_t)), ahamapmboxes, aha, /*flags*/0);
507
508	aha->init_level++;
509
510	aha->in_boxes = (aha_mbox_in_t *)&aha->out_boxes[aha->num_boxes];
511
512	ahainitmboxes(aha);
513
514	/* DMA tag for our ccb structures */
515	if (bus_dma_tag_create(	/* parent	*/ aha->parent_dmat,
516				/* alignment	*/ 1,
517				/* boundary	*/ 0,
518				/* lowaddr	*/ BUS_SPACE_MAXADDR,
519				/* highaddr	*/ BUS_SPACE_MAXADDR,
520				/* filter	*/ NULL,
521				/* filterarg	*/ NULL,
522				/* maxsize	*/ aha->max_ccbs *
523						   sizeof(struct aha_ccb),
524				/* nsegments	*/ 1,
525				/* maxsegsz	*/ BUS_SPACE_MAXSIZE_24BIT,
526				/* flags	*/ 0,
527				/* lockfunc	*/ NULL,
528				/* lockarg	*/ NULL,
529				&aha->ccb_dmat) != 0) {
530		goto error_exit;
531        }
532
533	aha->init_level++;
534
535	/* Allocation for our ccbs */
536	if (bus_dmamem_alloc(aha->ccb_dmat, (void **)&aha->aha_ccb_array,
537	    BUS_DMA_NOWAIT, &aha->ccb_dmamap) != 0)
538		goto error_exit;
539
540	aha->init_level++;
541
542	/* And permanently map them */
543	bus_dmamap_load(aha->ccb_dmat, aha->ccb_dmamap, aha->aha_ccb_array,
544	    aha->max_ccbs * sizeof(struct aha_ccb), ahamapccbs, aha, /*flags*/0);
545
546	aha->init_level++;
547
548	/* DMA tag for our S/G structures.  We allocate in page sized chunks */
549	if (bus_dma_tag_create(	/* parent	*/ aha->parent_dmat,
550				/* alignment	*/ 1,
551				/* boundary	*/ 0,
552				/* lowaddr	*/ BUS_SPACE_MAXADDR,
553				/* highaddr	*/ BUS_SPACE_MAXADDR,
554				/* filter	*/ NULL,
555				/* filterarg	*/ NULL,
556				/* maxsize	*/ PAGE_SIZE,
557				/* nsegments	*/ 1,
558				/* maxsegsz	*/ BUS_SPACE_MAXSIZE_24BIT,
559				/* flags	*/ 0,
560				/* lockfunc	*/ NULL,
561				/* lockarg	*/ NULL,
562				&aha->sg_dmat) != 0)
563		goto error_exit;
564
565	aha->init_level++;
566
567	/* Perform initial CCB allocation */
568	bzero(aha->aha_ccb_array, aha->max_ccbs * sizeof(struct aha_ccb));
569	ahaallocccbs(aha);
570
571	if (aha->num_ccbs == 0) {
572		device_printf(aha->dev,
573		    "aha_init - Unable to allocate initial ccbs\n");
574		goto error_exit;
575	}
576
577	/*
578	 * Note that we are going and return (to probe)
579	 */
580	return (0);
581
582error_exit:
583
584	return (ENXIO);
585}
586
587int
588aha_attach(struct aha_softc *aha)
589{
590	int tagged_dev_openings;
591	struct cam_devq *devq;
592
593	/*
594	 * We don't do tagged queueing, since the aha cards don't
595	 * support it.
596	 */
597	tagged_dev_openings = 0;
598
599	/*
600	 * Create the device queue for our SIM.
601	 */
602	devq = cam_simq_alloc(aha->max_ccbs - 1);
603	if (devq == NULL)
604		return (ENOMEM);
605
606	/*
607	 * Construct our SIM entry
608	 */
609	aha->sim = cam_sim_alloc(ahaaction, ahapoll, "aha", aha,
610	    device_get_unit(aha->dev), &aha->lock, 2, tagged_dev_openings,
611	    devq);
612	if (aha->sim == NULL) {
613		cam_simq_free(devq);
614		return (ENOMEM);
615	}
616	mtx_lock(&aha->lock);
617	if (xpt_bus_register(aha->sim, aha->dev, 0) != CAM_SUCCESS) {
618		cam_sim_free(aha->sim, /*free_devq*/TRUE);
619		mtx_unlock(&aha->lock);
620		return (ENXIO);
621	}
622	if (xpt_create_path(&aha->path, /*periph*/NULL, cam_sim_path(aha->sim),
623	    CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
624		xpt_bus_deregister(cam_sim_path(aha->sim));
625		cam_sim_free(aha->sim, /*free_devq*/TRUE);
626		mtx_unlock(&aha->lock);
627		return (ENXIO);
628	}
629	mtx_unlock(&aha->lock);
630
631	return (0);
632}
633
634static void
635ahaallocccbs(struct aha_softc *aha)
636{
637	struct aha_ccb *next_ccb;
638	struct sg_map_node *sg_map;
639	bus_addr_t physaddr;
640	aha_sg_t *segs;
641	int newcount;
642	int i;
643
644	next_ccb = &aha->aha_ccb_array[aha->num_ccbs];
645
646	sg_map = malloc(sizeof(*sg_map), M_DEVBUF, M_NOWAIT);
647
648	if (sg_map == NULL)
649		return;
650
651	/* Allocate S/G space for the next batch of CCBS */
652	if (bus_dmamem_alloc(aha->sg_dmat, (void **)&sg_map->sg_vaddr,
653	    BUS_DMA_NOWAIT, &sg_map->sg_dmamap) != 0) {
654		free(sg_map, M_DEVBUF);
655		return;
656	}
657
658	SLIST_INSERT_HEAD(&aha->sg_maps, sg_map, links);
659
660	bus_dmamap_load(aha->sg_dmat, sg_map->sg_dmamap, sg_map->sg_vaddr,
661	    PAGE_SIZE, ahamapsgs, aha, /*flags*/0);
662
663	segs = sg_map->sg_vaddr;
664	physaddr = sg_map->sg_physaddr;
665
666	newcount = (PAGE_SIZE / (AHA_NSEG * sizeof(aha_sg_t)));
667	for (i = 0; aha->num_ccbs < aha->max_ccbs && i < newcount; i++) {
668		int error;
669
670		next_ccb->sg_list = segs;
671		next_ccb->sg_list_phys = physaddr;
672		next_ccb->flags = ACCB_FREE;
673		callout_init_mtx(&next_ccb->timer, &aha->lock, 0);
674		error = bus_dmamap_create(aha->buffer_dmat, /*flags*/0,
675		    &next_ccb->dmamap);
676		if (error != 0)
677			break;
678		SLIST_INSERT_HEAD(&aha->free_aha_ccbs, next_ccb, links);
679		segs += AHA_NSEG;
680		physaddr += (AHA_NSEG * sizeof(aha_sg_t));
681		next_ccb++;
682		aha->num_ccbs++;
683	}
684
685	/* Reserve a CCB for error recovery */
686	if (aha->recovery_accb == NULL) {
687		aha->recovery_accb = SLIST_FIRST(&aha->free_aha_ccbs);
688		SLIST_REMOVE_HEAD(&aha->free_aha_ccbs, links);
689	}
690}
691
692static __inline void
693ahafreeccb(struct aha_softc *aha, struct aha_ccb *accb)
694{
695
696	if (!dumping)
697		mtx_assert(&aha->lock, MA_OWNED);
698	if ((accb->flags & ACCB_ACTIVE) != 0)
699		LIST_REMOVE(&accb->ccb->ccb_h, sim_links.le);
700	if (aha->resource_shortage != 0
701	    && (accb->ccb->ccb_h.status & CAM_RELEASE_SIMQ) == 0) {
702		accb->ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
703		aha->resource_shortage = FALSE;
704	}
705	accb->flags = ACCB_FREE;
706	SLIST_INSERT_HEAD(&aha->free_aha_ccbs, accb, links);
707	aha->active_ccbs--;
708}
709
710static struct aha_ccb*
711ahagetccb(struct aha_softc *aha)
712{
713	struct	aha_ccb* accb;
714
715	if (!dumping)
716		mtx_assert(&aha->lock, MA_OWNED);
717	if ((accb = SLIST_FIRST(&aha->free_aha_ccbs)) != NULL) {
718		SLIST_REMOVE_HEAD(&aha->free_aha_ccbs, links);
719		aha->active_ccbs++;
720	} else if (aha->num_ccbs < aha->max_ccbs) {
721		ahaallocccbs(aha);
722		accb = SLIST_FIRST(&aha->free_aha_ccbs);
723		if (accb == NULL)
724			device_printf(aha->dev, "Can't malloc ACCB\n");
725		else {
726			SLIST_REMOVE_HEAD(&aha->free_aha_ccbs, links);
727			aha->active_ccbs++;
728		}
729	}
730
731	return (accb);
732}
733
734static void
735ahaaction(struct cam_sim *sim, union ccb *ccb)
736{
737	struct	aha_softc *aha;
738
739	CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("ahaaction\n"));
740
741	aha = (struct aha_softc *)cam_sim_softc(sim);
742	mtx_assert(&aha->lock, MA_OWNED);
743
744	switch (ccb->ccb_h.func_code) {
745	/* Common cases first */
746	case XPT_SCSI_IO:	/* Execute the requested I/O operation */
747	case XPT_RESET_DEV:	/* Bus Device Reset the specified SCSI device */	{
748		struct	aha_ccb	*accb;
749		struct	aha_hccb *hccb;
750
751		/*
752		 * Get an accb to use.
753		 */
754		if ((accb = ahagetccb(aha)) == NULL) {
755			aha->resource_shortage = TRUE;
756			xpt_freeze_simq(aha->sim, /*count*/1);
757			ccb->ccb_h.status = CAM_REQUEUE_REQ;
758			xpt_done(ccb);
759			return;
760		}
761		hccb = &accb->hccb;
762
763		/*
764		 * So we can find the ACCB when an abort is requested
765		 */
766		accb->ccb = ccb;
767		ccb->ccb_h.ccb_accb_ptr = accb;
768		ccb->ccb_h.ccb_aha_ptr = aha;
769
770		/*
771		 * Put all the arguments for the xfer in the accb
772		 */
773		hccb->target = ccb->ccb_h.target_id;
774		hccb->lun = ccb->ccb_h.target_lun;
775		hccb->ahastat = 0;
776		hccb->sdstat = 0;
777
778		if (ccb->ccb_h.func_code == XPT_SCSI_IO) {
779			struct ccb_scsiio *csio;
780			struct ccb_hdr *ccbh;
781			int error;
782
783			csio = &ccb->csio;
784			ccbh = &csio->ccb_h;
785			hccb->opcode = aha->ccb_ccb_opcode;
786			hccb->datain = (ccb->ccb_h.flags & CAM_DIR_IN) != 0;
787			hccb->dataout = (ccb->ccb_h.flags & CAM_DIR_OUT) != 0;
788			hccb->cmd_len = csio->cdb_len;
789			if (hccb->cmd_len > sizeof(hccb->scsi_cdb)) {
790				ccb->ccb_h.status = CAM_REQ_INVALID;
791				ahafreeccb(aha, accb);
792				xpt_done(ccb);
793				return;
794			}
795			hccb->sense_len = csio->sense_len;
796			if ((ccbh->flags & CAM_CDB_POINTER) != 0) {
797				if ((ccbh->flags & CAM_CDB_PHYS) == 0) {
798					bcopy(csio->cdb_io.cdb_ptr,
799					      hccb->scsi_cdb, hccb->cmd_len);
800				} else {
801					/* I guess I could map it in... */
802					ccbh->status = CAM_REQ_INVALID;
803					ahafreeccb(aha, accb);
804					xpt_done(ccb);
805					return;
806				}
807			} else {
808				bcopy(csio->cdb_io.cdb_bytes,
809				      hccb->scsi_cdb, hccb->cmd_len);
810			}
811			/*
812			 * If we have any data to send with this command,
813			 * map it into bus space.
814			 */
815
816			error = bus_dmamap_load_ccb(
817			    aha->buffer_dmat,
818			    accb->dmamap,
819			    ccb,
820			    ahaexecuteccb,
821			    accb,
822			    /*flags*/0);
823			if (error == EINPROGRESS) {
824				/*
825				 * So as to maintain ordering, freeze the
826				 * controller queue until our mapping is
827				 * returned.
828				 */
829				xpt_freeze_simq(aha->sim, 1);
830				csio->ccb_h.status |= CAM_RELEASE_SIMQ;
831			}
832		} else {
833			hccb->opcode = INITIATOR_BUS_DEV_RESET;
834			/* No data transfer */
835			hccb->datain = TRUE;
836			hccb->dataout = TRUE;
837			hccb->cmd_len = 0;
838			hccb->sense_len = 0;
839			ahaexecuteccb(accb, NULL, 0, 0);
840		}
841		break;
842	}
843	case XPT_EN_LUN:		/* Enable LUN as a target */
844	case XPT_TARGET_IO:		/* Execute target I/O request */
845	case XPT_ACCEPT_TARGET_IO:	/* Accept Host Target Mode CDB */
846	case XPT_CONT_TARGET_IO:	/* Continue Host Target I/O Connection*/
847	case XPT_ABORT:			/* Abort the specified CCB */
848		/* XXX Implement */
849		ccb->ccb_h.status = CAM_REQ_INVALID;
850		xpt_done(ccb);
851		break;
852	case XPT_SET_TRAN_SETTINGS:
853		/* XXX Implement */
854		ccb->ccb_h.status = CAM_PROVIDE_FAIL;
855		xpt_done(ccb);
856		break;
857	case XPT_GET_TRAN_SETTINGS:
858	/* Get default/user set transfer settings for the target */
859	{
860		struct	ccb_trans_settings *cts = &ccb->cts;
861		u_int	target_mask = 0x01 << ccb->ccb_h.target_id;
862		struct ccb_trans_settings_scsi *scsi =
863		    &cts->proto_specific.scsi;
864		struct ccb_trans_settings_spi *spi =
865		    &cts->xport_specific.spi;
866
867		cts->protocol = PROTO_SCSI;
868		cts->protocol_version = SCSI_REV_2;
869		cts->transport = XPORT_SPI;
870		cts->transport_version = 2;
871		if (cts->type == CTS_TYPE_USER_SETTINGS) {
872			spi->flags = 0;
873			if ((aha->disc_permitted & target_mask) != 0)
874				spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
875			spi->bus_width = MSG_EXT_WDTR_BUS_8_BIT;
876			if ((aha->sync_permitted & target_mask) != 0) {
877				if (aha->boardid >= BOARD_1542CF)
878					spi->sync_period = 25;
879				else
880					spi->sync_period = 50;
881			} else {
882				spi->sync_period = 0;
883			}
884
885			if (spi->sync_period != 0)
886				spi->sync_offset = 15;
887
888			spi->valid = CTS_SPI_VALID_SYNC_RATE
889				   | CTS_SPI_VALID_SYNC_OFFSET
890				   | CTS_SPI_VALID_BUS_WIDTH
891				   | CTS_SPI_VALID_DISC;
892			scsi->valid = CTS_SCSI_VALID_TQ;
893		} else {
894			ahafetchtransinfo(aha, cts);
895		}
896
897		ccb->ccb_h.status = CAM_REQ_CMP;
898		xpt_done(ccb);
899		break;
900	}
901	case XPT_CALC_GEOMETRY:
902	{
903		struct	  ccb_calc_geometry *ccg;
904		uint32_t size_mb;
905		uint32_t secs_per_cylinder;
906
907		ccg = &ccb->ccg;
908		size_mb = ccg->volume_size
909			/ ((1024L * 1024L) / ccg->block_size);
910		if (size_mb >= 1024 && (aha->extended_trans != 0)) {
911			if (size_mb >= 2048) {
912				ccg->heads = 255;
913				ccg->secs_per_track = 63;
914			} else {
915				ccg->heads = 128;
916				ccg->secs_per_track = 32;
917			}
918		} else {
919			ccg->heads = 64;
920			ccg->secs_per_track = 32;
921		}
922		secs_per_cylinder = ccg->heads * ccg->secs_per_track;
923		ccg->cylinders = ccg->volume_size / secs_per_cylinder;
924		ccb->ccb_h.status = CAM_REQ_CMP;
925		xpt_done(ccb);
926		break;
927	}
928	case XPT_RESET_BUS:		/* Reset the specified SCSI bus */
929		ahareset(aha, /*hardreset*/TRUE);
930		ccb->ccb_h.status = CAM_REQ_CMP;
931		xpt_done(ccb);
932		break;
933	case XPT_TERM_IO:		/* Terminate the I/O process */
934		/* XXX Implement */
935		ccb->ccb_h.status = CAM_REQ_INVALID;
936		xpt_done(ccb);
937		break;
938	case XPT_PATH_INQ:		/* Path routing inquiry */
939	{
940		struct ccb_pathinq *cpi = &ccb->cpi;
941
942		cpi->version_num = 1; /* XXX??? */
943		cpi->hba_inquiry = PI_SDTR_ABLE;
944		cpi->target_sprt = 0;
945		cpi->hba_misc = 0;
946		cpi->hba_eng_cnt = 0;
947		cpi->max_target = 7;
948		cpi->max_lun = 7;
949		cpi->initiator_id = aha->scsi_id;
950		cpi->bus_id = cam_sim_bus(sim);
951		cpi->base_transfer_speed = 3300;
952		strlcpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
953		strlcpy(cpi->hba_vid, "Adaptec", HBA_IDLEN);
954		strlcpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
955		cpi->unit_number = cam_sim_unit(sim);
956                cpi->transport = XPORT_SPI;
957                cpi->transport_version = 2;
958                cpi->protocol = PROTO_SCSI;
959                cpi->protocol_version = SCSI_REV_2;
960		cpi->ccb_h.status = CAM_REQ_CMP;
961		xpt_done(ccb);
962		break;
963	}
964	default:
965		ccb->ccb_h.status = CAM_REQ_INVALID;
966		xpt_done(ccb);
967		break;
968	}
969}
970
971static void
972ahaexecuteccb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
973{
974	struct	 aha_ccb *accb;
975	union	 ccb *ccb;
976	struct	 aha_softc *aha;
977	uint32_t paddr;
978
979	accb = (struct aha_ccb *)arg;
980	ccb = accb->ccb;
981	aha = (struct aha_softc *)ccb->ccb_h.ccb_aha_ptr;
982
983	if (error != 0) {
984		if (error != EFBIG)
985			device_printf(aha->dev,
986			    "Unexepected error 0x%x returned from "
987			    "bus_dmamap_load\n", error);
988		if (ccb->ccb_h.status == CAM_REQ_INPROG) {
989			xpt_freeze_devq(ccb->ccb_h.path, /*count*/1);
990			ccb->ccb_h.status = CAM_REQ_TOO_BIG|CAM_DEV_QFRZN;
991		}
992		ahafreeccb(aha, accb);
993		xpt_done(ccb);
994		return;
995	}
996
997	if (nseg != 0) {
998		aha_sg_t *sg;
999		bus_dma_segment_t *end_seg;
1000		bus_dmasync_op_t op;
1001
1002		end_seg = dm_segs + nseg;
1003
1004		/* Copy the segments into our SG list */
1005		sg = accb->sg_list;
1006		while (dm_segs < end_seg) {
1007			ahautoa24(dm_segs->ds_len, sg->len);
1008			ahautoa24(dm_segs->ds_addr, sg->addr);
1009			sg++;
1010			dm_segs++;
1011		}
1012
1013		if (nseg > 1) {
1014			accb->hccb.opcode = aha->ccb_sg_opcode;
1015			ahautoa24((sizeof(aha_sg_t) * nseg),
1016			    accb->hccb.data_len);
1017			ahautoa24(accb->sg_list_phys, accb->hccb.data_addr);
1018		} else {
1019			bcopy(accb->sg_list->len, accb->hccb.data_len, 3);
1020			bcopy(accb->sg_list->addr, accb->hccb.data_addr, 3);
1021		}
1022
1023		if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
1024			op = BUS_DMASYNC_PREREAD;
1025		else
1026			op = BUS_DMASYNC_PREWRITE;
1027
1028		bus_dmamap_sync(aha->buffer_dmat, accb->dmamap, op);
1029
1030	} else {
1031		accb->hccb.opcode = INITIATOR_CCB;
1032		ahautoa24(0, accb->hccb.data_len);
1033		ahautoa24(0, accb->hccb.data_addr);
1034	}
1035
1036	/*
1037	 * Last time we need to check if this CCB needs to
1038	 * be aborted.
1039	 */
1040	if (ccb->ccb_h.status != CAM_REQ_INPROG) {
1041		if (nseg != 0)
1042			bus_dmamap_unload(aha->buffer_dmat, accb->dmamap);
1043		ahafreeccb(aha, accb);
1044		xpt_done(ccb);
1045		return;
1046	}
1047
1048	accb->flags = ACCB_ACTIVE;
1049	ccb->ccb_h.status |= CAM_SIM_QUEUED;
1050	LIST_INSERT_HEAD(&aha->pending_ccbs, &ccb->ccb_h, sim_links.le);
1051
1052	callout_reset_sbt(&accb->timer, SBT_1MS * ccb->ccb_h.timeout, 0,
1053	    ahatimeout, accb, 0);
1054
1055	/* Tell the adapter about this command */
1056	if (aha->cur_outbox->action_code != AMBO_FREE) {
1057		/*
1058		 * We should never encounter a busy mailbox.
1059		 * If we do, warn the user, and treat it as
1060		 * a resource shortage.  If the controller is
1061		 * hung, one of the pending transactions will
1062		 * timeout causing us to start recovery operations.
1063		 */
1064		device_printf(aha->dev,
1065		    "Encountered busy mailbox with %d out of %d "
1066		    "commands active!!!", aha->active_ccbs, aha->max_ccbs);
1067		callout_stop(&accb->timer);
1068		if (nseg != 0)
1069			bus_dmamap_unload(aha->buffer_dmat, accb->dmamap);
1070		ahafreeccb(aha, accb);
1071		aha->resource_shortage = TRUE;
1072		xpt_freeze_simq(aha->sim, /*count*/1);
1073		ccb->ccb_h.status = CAM_REQUEUE_REQ;
1074		xpt_done(ccb);
1075		return;
1076	}
1077	paddr = ahaccbvtop(aha, accb);
1078	ahautoa24(paddr, aha->cur_outbox->ccb_addr);
1079	aha->cur_outbox->action_code = AMBO_START;
1080	aha_outb(aha, COMMAND_REG, AOP_START_MBOX);
1081
1082	ahanextoutbox(aha);
1083}
1084
1085void
1086aha_intr(void *arg)
1087{
1088	struct	aha_softc *aha;
1089
1090	aha = arg;
1091	mtx_lock(&aha->lock);
1092	aha_intr_locked(aha);
1093	mtx_unlock(&aha->lock);
1094}
1095
1096void
1097aha_intr_locked(struct aha_softc *aha)
1098{
1099	u_int	intstat;
1100	uint32_t paddr;
1101
1102	while (((intstat = aha_inb(aha, INTSTAT_REG)) & INTR_PENDING) != 0) {
1103		if ((intstat & CMD_COMPLETE) != 0) {
1104			aha->latched_status = aha_inb(aha, STATUS_REG);
1105			aha->command_cmp = TRUE;
1106		}
1107
1108		aha_outb(aha, CONTROL_REG, RESET_INTR);
1109
1110		if ((intstat & IMB_LOADED) != 0) {
1111			while (aha->cur_inbox->comp_code != AMBI_FREE) {
1112				paddr = aha_a24tou(aha->cur_inbox->ccb_addr);
1113				ahadone(aha, ahaccbptov(aha, paddr),
1114				    aha->cur_inbox->comp_code);
1115				aha->cur_inbox->comp_code = AMBI_FREE;
1116				ahanextinbox(aha);
1117			}
1118		}
1119
1120		if ((intstat & SCSI_BUS_RESET) != 0) {
1121			ahareset(aha, /*hardreset*/FALSE);
1122		}
1123	}
1124}
1125
1126static void
1127ahadone(struct aha_softc *aha, struct aha_ccb *accb, aha_mbi_comp_code_t comp_code)
1128{
1129	union  ccb	  *ccb;
1130	struct ccb_scsiio *csio;
1131
1132	ccb = accb->ccb;
1133	csio = &accb->ccb->csio;
1134
1135	if ((accb->flags & ACCB_ACTIVE) == 0) {
1136		device_printf(aha->dev,
1137		    "ahadone - Attempt to free non-active ACCB %p\n",
1138		    (void *)accb);
1139		return;
1140	}
1141
1142	if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
1143		bus_dmasync_op_t op;
1144
1145		if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
1146			op = BUS_DMASYNC_POSTREAD;
1147		else
1148			op = BUS_DMASYNC_POSTWRITE;
1149		bus_dmamap_sync(aha->buffer_dmat, accb->dmamap, op);
1150		bus_dmamap_unload(aha->buffer_dmat, accb->dmamap);
1151	}
1152
1153	if (accb == aha->recovery_accb) {
1154		/*
1155		 * The recovery ACCB does not have a CCB associated
1156		 * with it, so short circuit the normal error handling.
1157		 * We now traverse our list of pending CCBs and process
1158		 * any that were terminated by the recovery CCBs action.
1159		 * We also reinstate timeouts for all remaining, pending,
1160		 * CCBs.
1161		 */
1162		struct cam_path *path;
1163		struct ccb_hdr *ccb_h;
1164		cam_status error;
1165
1166		/* Notify all clients that a BDR occured */
1167		error = xpt_create_path(&path, /*periph*/NULL,
1168		    cam_sim_path(aha->sim), accb->hccb.target,
1169		    CAM_LUN_WILDCARD);
1170
1171		if (error == CAM_REQ_CMP) {
1172			xpt_async(AC_SENT_BDR, path, NULL);
1173			xpt_free_path(path);
1174		}
1175
1176		ccb_h = LIST_FIRST(&aha->pending_ccbs);
1177		while (ccb_h != NULL) {
1178			struct aha_ccb *pending_accb;
1179
1180			pending_accb = (struct aha_ccb *)ccb_h->ccb_accb_ptr;
1181			if (pending_accb->hccb.target == accb->hccb.target) {
1182				pending_accb->hccb.ahastat = AHASTAT_HA_BDR;
1183				ccb_h = LIST_NEXT(ccb_h, sim_links.le);
1184				ahadone(aha, pending_accb, AMBI_ERROR);
1185			} else {
1186				callout_reset_sbt(&pending_accb->timer,
1187				    SBT_1MS * ccb_h->timeout, 0, ahatimeout,
1188				    pending_accb, 0);
1189				ccb_h = LIST_NEXT(ccb_h, sim_links.le);
1190			}
1191		}
1192		device_printf(aha->dev, "No longer in timeout\n");
1193		return;
1194	}
1195
1196	callout_stop(&accb->timer);
1197
1198	switch (comp_code) {
1199	case AMBI_FREE:
1200		device_printf(aha->dev,
1201		    "ahadone - CCB completed with free status!\n");
1202		break;
1203	case AMBI_NOT_FOUND:
1204		device_printf(aha->dev,
1205		    "ahadone - CCB Abort failed to find CCB\n");
1206		break;
1207	case AMBI_ABORT:
1208	case AMBI_ERROR:
1209		/* An error occured */
1210		if (accb->hccb.opcode < INITIATOR_CCB_WRESID)
1211			csio->resid = 0;
1212		else
1213			csio->resid = aha_a24tou(accb->hccb.data_len);
1214		switch(accb->hccb.ahastat) {
1215		case AHASTAT_DATARUN_ERROR:
1216		{
1217			if (csio->resid <= 0) {
1218				csio->ccb_h.status = CAM_DATA_RUN_ERR;
1219				break;
1220			}
1221			/* FALLTHROUGH */
1222		}
1223		case AHASTAT_NOERROR:
1224			csio->scsi_status = accb->hccb.sdstat;
1225			csio->ccb_h.status |= CAM_SCSI_STATUS_ERROR;
1226			switch(csio->scsi_status) {
1227			case SCSI_STATUS_CHECK_COND:
1228			case SCSI_STATUS_CMD_TERMINATED:
1229				csio->ccb_h.status |= CAM_AUTOSNS_VALID;
1230				/*
1231				 * The aha writes the sense data at different
1232				 * offsets based on the scsi cmd len
1233				 */
1234				bcopy((caddr_t) &accb->hccb.scsi_cdb +
1235				    accb->hccb.cmd_len,
1236				    (caddr_t) &csio->sense_data,
1237				    accb->hccb.sense_len);
1238				break;
1239			default:
1240				break;
1241			case SCSI_STATUS_OK:
1242				csio->ccb_h.status = CAM_REQ_CMP;
1243				break;
1244			}
1245			break;
1246		case AHASTAT_SELTIMEOUT:
1247			csio->ccb_h.status = CAM_SEL_TIMEOUT;
1248			break;
1249		case AHASTAT_UNEXPECTED_BUSFREE:
1250			csio->ccb_h.status = CAM_UNEXP_BUSFREE;
1251			break;
1252		case AHASTAT_INVALID_PHASE:
1253			csio->ccb_h.status = CAM_SEQUENCE_FAIL;
1254			break;
1255		case AHASTAT_INVALID_ACTION_CODE:
1256			panic("%s: Inavlid Action code", aha_name(aha));
1257			break;
1258		case AHASTAT_INVALID_OPCODE:
1259			if (accb->hccb.opcode < INITIATOR_CCB_WRESID)
1260				panic("%s: Invalid CCB Opcode %x hccb = %p",
1261				    aha_name(aha), accb->hccb.opcode,
1262				    &accb->hccb);
1263			device_printf(aha->dev,
1264			    "AHA-1540A compensation failed\n");
1265			xpt_freeze_devq(ccb->ccb_h.path, /*count*/1);
1266			csio->ccb_h.status = CAM_REQUEUE_REQ;
1267			break;
1268		case AHASTAT_LINKED_CCB_LUN_MISMATCH:
1269			/* We don't even support linked commands... */
1270			panic("%s: Linked CCB Lun Mismatch", aha_name(aha));
1271			break;
1272		case AHASTAT_INVALID_CCB_OR_SG_PARAM:
1273			panic("%s: Invalid CCB or SG list", aha_name(aha));
1274			break;
1275		case AHASTAT_HA_SCSI_BUS_RESET:
1276			if ((csio->ccb_h.status & CAM_STATUS_MASK)
1277			    != CAM_CMD_TIMEOUT)
1278				csio->ccb_h.status = CAM_SCSI_BUS_RESET;
1279			break;
1280		case AHASTAT_HA_BDR:
1281			if ((accb->flags & ACCB_DEVICE_RESET) == 0)
1282				csio->ccb_h.status = CAM_BDR_SENT;
1283			else
1284				csio->ccb_h.status = CAM_CMD_TIMEOUT;
1285			break;
1286		}
1287		if (csio->ccb_h.status != CAM_REQ_CMP) {
1288			xpt_freeze_devq(csio->ccb_h.path, /*count*/1);
1289			csio->ccb_h.status |= CAM_DEV_QFRZN;
1290		}
1291		if ((accb->flags & ACCB_RELEASE_SIMQ) != 0)
1292			ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
1293		ahafreeccb(aha, accb);
1294		xpt_done(ccb);
1295		break;
1296	case AMBI_OK:
1297		/* All completed without incident */
1298		/* XXX DO WE NEED TO COPY SENSE BYTES HERE???? XXX */
1299		/* I don't think so since it works???? */
1300		ccb->ccb_h.status |= CAM_REQ_CMP;
1301		if ((accb->flags & ACCB_RELEASE_SIMQ) != 0)
1302			ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
1303		ahafreeccb(aha, accb);
1304		xpt_done(ccb);
1305		break;
1306	}
1307}
1308
1309static int
1310ahareset(struct aha_softc* aha, int hard_reset)
1311{
1312	struct	 ccb_hdr *ccb_h;
1313	u_int	 status;
1314	u_int	 timeout;
1315	uint8_t reset_type;
1316
1317	if (hard_reset != 0)
1318		reset_type = HARD_RESET;
1319	else
1320		reset_type = SOFT_RESET;
1321	aha_outb(aha, CONTROL_REG, reset_type);
1322
1323	/* Wait 5sec. for Diagnostic start */
1324	timeout = 5 * 10000;
1325	while (--timeout) {
1326		status = aha_inb(aha, STATUS_REG);
1327		if ((status & DIAG_ACTIVE) != 0)
1328			break;
1329		DELAY(100);
1330	}
1331	if (timeout == 0) {
1332		PRVERB((aha->dev, "ahareset - Diagnostic Active failed to "
1333		    "assert. status = %#x\n", status));
1334		return (ETIMEDOUT);
1335	}
1336
1337	/* Wait 10sec. for Diagnostic end */
1338	timeout = 10 * 10000;
1339	while (--timeout) {
1340		status = aha_inb(aha, STATUS_REG);
1341		if ((status & DIAG_ACTIVE) == 0)
1342			break;
1343		DELAY(100);
1344	}
1345	if (timeout == 0) {
1346		panic("%s: ahareset - Diagnostic Active failed to drop. "
1347		    "status = 0x%x\n", aha_name(aha), status);
1348		return (ETIMEDOUT);
1349	}
1350
1351	/* Wait for the host adapter to become ready or report a failure */
1352	timeout = 10000;
1353	while (--timeout) {
1354		status = aha_inb(aha, STATUS_REG);
1355		if ((status & (DIAG_FAIL|HA_READY|DATAIN_REG_READY)) != 0)
1356			break;
1357		DELAY(100);
1358	}
1359	if (timeout == 0) {
1360		device_printf(aha->dev, "ahareset - Host adapter failed to "
1361		    "come ready. status = 0x%x\n", status);
1362		return (ETIMEDOUT);
1363	}
1364
1365	/* If the diagnostics failed, tell the user */
1366	if ((status & DIAG_FAIL) != 0
1367	 || (status & HA_READY) == 0) {
1368		device_printf(aha->dev, "ahareset - Adapter failed diag\n");
1369
1370		if ((status & DATAIN_REG_READY) != 0)
1371			device_printf(aha->dev, "ahareset - Host Adapter "
1372			    "Error code = 0x%x\n", aha_inb(aha, DATAIN_REG));
1373		return (ENXIO);
1374	}
1375
1376	/* If we've attached to the XPT, tell it about the event */
1377	if (aha->path != NULL)
1378		xpt_async(AC_BUS_RESET, aha->path, NULL);
1379
1380	/*
1381	 * Perform completion processing for all outstanding CCBs.
1382	 */
1383	while ((ccb_h = LIST_FIRST(&aha->pending_ccbs)) != NULL) {
1384		struct aha_ccb *pending_accb;
1385
1386		pending_accb = (struct aha_ccb *)ccb_h->ccb_accb_ptr;
1387		pending_accb->hccb.ahastat = AHASTAT_HA_SCSI_BUS_RESET;
1388		ahadone(aha, pending_accb, AMBI_ERROR);
1389	}
1390
1391	/* If we've allocated mailboxes, initialize them */
1392	/* Must be done after we've aborted our queue, or aha_cmd fails */
1393	if (aha->init_level > 4)
1394		ahainitmboxes(aha);
1395
1396	return (0);
1397}
1398
1399/*
1400 * Send a command to the adapter.
1401 */
1402int
1403aha_cmd(struct aha_softc *aha, aha_op_t opcode, uint8_t *params,
1404	u_int param_len, uint8_t *reply_data, u_int reply_len,
1405	u_int cmd_timeout)
1406{
1407	u_int	timeout;
1408	u_int	status;
1409	u_int	saved_status;
1410	u_int	intstat;
1411	u_int	reply_buf_size;
1412	int	cmd_complete;
1413	int	error;
1414
1415	/* No data returned to start */
1416	reply_buf_size = reply_len;
1417	reply_len = 0;
1418	intstat = 0;
1419	cmd_complete = 0;
1420	saved_status = 0;
1421	error = 0;
1422
1423	/*
1424	 * All commands except for the "start mailbox" and the "enable
1425	 * outgoing mailbox read interrupt" commands cannot be issued
1426	 * while there are pending transactions.  Freeze our SIMQ
1427	 * and wait for all completions to occur if necessary.
1428	 */
1429	timeout = 10000;
1430	while (LIST_FIRST(&aha->pending_ccbs) != NULL && --timeout) {
1431		/* Fire the interrupt handler in case interrupts are blocked */
1432		aha_intr(aha);
1433		DELAY(10);
1434	}
1435
1436	if (timeout == 0) {
1437		device_printf(aha->dev,
1438		    "aha_cmd: Timeout waiting for adapter idle\n");
1439		return (ETIMEDOUT);
1440	}
1441	aha->command_cmp = 0;
1442	/*
1443	 * Wait up to 10 sec. for the adapter to become
1444	 * ready to accept commands.
1445	 */
1446	timeout = 100000;
1447	while (--timeout) {
1448		status = aha_inb(aha, STATUS_REG);
1449		if ((status & HA_READY) != 0 && (status & CMD_REG_BUSY) == 0)
1450			break;
1451		/*
1452		 * Throw away any pending data which may be
1453		 * left over from earlier commands that we
1454		 * timedout on.
1455		 */
1456		if ((status & DATAIN_REG_READY) != 0)
1457			(void)aha_inb(aha, DATAIN_REG);
1458		DELAY(100);
1459	}
1460	if (timeout == 0) {
1461		device_printf(aha->dev, "aha_cmd: Timeout waiting for adapter"
1462		    " ready, status = 0x%x\n", status);
1463		return (ETIMEDOUT);
1464	}
1465
1466	/*
1467	 * Send the opcode followed by any necessary parameter bytes.
1468	 */
1469	aha_outb(aha, COMMAND_REG, opcode);
1470
1471	/*
1472	 * Wait for up to 1sec to get the parameter list sent
1473	 */
1474	timeout = 10000;
1475	while (param_len && --timeout) {
1476		DELAY(100);
1477		status = aha_inb(aha, STATUS_REG);
1478		intstat = aha_inb(aha, INTSTAT_REG);
1479
1480		if ((intstat & (INTR_PENDING|CMD_COMPLETE))
1481		 == (INTR_PENDING|CMD_COMPLETE)) {
1482			saved_status = status;
1483			cmd_complete = 1;
1484			break;
1485		}
1486
1487		if (aha->command_cmp != 0) {
1488			saved_status = aha->latched_status;
1489			cmd_complete = 1;
1490			break;
1491		}
1492		if ((status & DATAIN_REG_READY) != 0)
1493			break;
1494		if ((status & CMD_REG_BUSY) == 0) {
1495			aha_outb(aha, COMMAND_REG, *params++);
1496			param_len--;
1497			timeout = 10000;
1498		}
1499	}
1500	if (timeout == 0) {
1501		device_printf(aha->dev, "aha_cmd: Timeout sending parameters, "
1502		    "status = 0x%x\n", status);
1503		error = ETIMEDOUT;
1504	}
1505
1506	/*
1507	 * For all other commands, we wait for any output data
1508	 * and the final comand completion interrupt.
1509	 */
1510	while (cmd_complete == 0 && --cmd_timeout) {
1511
1512		status = aha_inb(aha, STATUS_REG);
1513		intstat = aha_inb(aha, INTSTAT_REG);
1514
1515		if (aha->command_cmp != 0) {
1516			cmd_complete = 1;
1517			saved_status = aha->latched_status;
1518		} else if ((intstat & (INTR_PENDING|CMD_COMPLETE))
1519			== (INTR_PENDING|CMD_COMPLETE)) {
1520			/*
1521			 * Our poll (in case interrupts are blocked)
1522			 * saw the CMD_COMPLETE interrupt.
1523			 */
1524			cmd_complete = 1;
1525			saved_status = status;
1526		}
1527		if ((status & DATAIN_REG_READY) != 0) {
1528			uint8_t data;
1529
1530			data = aha_inb(aha, DATAIN_REG);
1531			if (reply_len < reply_buf_size) {
1532				*reply_data++ = data;
1533			} else {
1534				device_printf(aha->dev,
1535				    "aha_cmd - Discarded reply data "
1536				    "byte for opcode 0x%x\n", opcode);
1537			}
1538			/*
1539			 * Reset timeout to ensure at least a second
1540			 * between response bytes.
1541			 */
1542			cmd_timeout = MAX(cmd_timeout, 10000);
1543			reply_len++;
1544		}
1545		DELAY(100);
1546	}
1547	if (cmd_timeout == 0) {
1548		device_printf(aha->dev, "aha_cmd: Timeout: status = 0x%x, "
1549		    "intstat = 0x%x, reply_len = %d\n", status, intstat,
1550		    reply_len);
1551		return (ETIMEDOUT);
1552	}
1553
1554	/*
1555	 * Clear any pending interrupts.  Block interrupts so our
1556	 * interrupt handler is not re-entered.
1557	 */
1558	aha_intr(aha);
1559
1560	if (error != 0)
1561		return (error);
1562
1563	/*
1564	 * If the command was rejected by the controller, tell the caller.
1565	 */
1566	if ((saved_status & CMD_INVALID) != 0) {
1567		PRVERB((aha->dev, "Invalid Command 0x%x\n", opcode));
1568		/*
1569		 * Some early adapters may not recover properly from
1570		 * an invalid command.  If it appears that the controller
1571		 * has wedged (i.e. status was not cleared by our interrupt
1572		 * reset above), perform a soft reset.
1573      		 */
1574		DELAY(1000);
1575		status = aha_inb(aha, STATUS_REG);
1576		if ((status & (CMD_INVALID|STATUS_REG_RSVD|DATAIN_REG_READY|
1577			      CMD_REG_BUSY|DIAG_FAIL|DIAG_ACTIVE)) != 0
1578		 || (status & (HA_READY|INIT_REQUIRED))
1579		  != (HA_READY|INIT_REQUIRED))
1580			ahareset(aha, /*hard_reset*/FALSE);
1581		return (EINVAL);
1582	}
1583
1584	if (param_len > 0) {
1585		/* The controller did not accept the full argument list */
1586		PRVERB((aha->dev, "Controller did not accept full argument "
1587		    "list (%d > 0)\n", param_len));
1588	 	return (E2BIG);
1589	}
1590
1591	if (reply_len != reply_buf_size) {
1592		/* Too much or too little data received */
1593		PRVERB((aha->dev, "data received mismatch (%d != %d)\n",
1594		    reply_len, reply_buf_size));
1595		return (EMSGSIZE);
1596	}
1597
1598	/* We were successful */
1599	return (0);
1600}
1601
1602static int
1603ahainitmboxes(struct aha_softc *aha)
1604{
1605	int error;
1606	init_24b_mbox_params_t init_mbox;
1607
1608	bzero(aha->in_boxes, sizeof(aha_mbox_in_t) * aha->num_boxes);
1609	bzero(aha->out_boxes, sizeof(aha_mbox_out_t) * aha->num_boxes);
1610	aha->cur_inbox = aha->in_boxes;
1611	aha->last_inbox = aha->in_boxes + aha->num_boxes - 1;
1612	aha->cur_outbox = aha->out_boxes;
1613	aha->last_outbox = aha->out_boxes + aha->num_boxes - 1;
1614
1615	/* Tell the adapter about them */
1616	init_mbox.num_mboxes = aha->num_boxes;
1617	ahautoa24(aha->mailbox_physbase, init_mbox.base_addr);
1618	error = aha_cmd(aha, AOP_INITIALIZE_MBOX, (uint8_t *)&init_mbox,
1619	    /*parmlen*/sizeof(init_mbox), /*reply_buf*/NULL,
1620	    /*reply_len*/0, DEFAULT_CMD_TIMEOUT);
1621
1622	if (error != 0)
1623		printf("ahainitmboxes: Initialization command failed\n");
1624	return (error);
1625}
1626
1627/*
1628 * Update the XPT's idea of the negotiated transfer
1629 * parameters for a particular target.
1630 */
1631static void
1632ahafetchtransinfo(struct aha_softc *aha, struct ccb_trans_settings* cts)
1633{
1634	setup_data_t	setup_info;
1635	u_int		target;
1636	u_int		targ_offset;
1637	u_int		sync_period;
1638	int		error;
1639	uint8_t	param;
1640	targ_syncinfo_t	sync_info;
1641	struct ccb_trans_settings_spi *spi = &cts->xport_specific.spi;
1642
1643	target = cts->ccb_h.target_id;
1644	targ_offset = (target & 0x7);
1645
1646	/*
1647	 * Inquire Setup Information.  This command retreives
1648	 * the sync info for older models.
1649	 */
1650	param = sizeof(setup_info);
1651	error = aha_cmd(aha, AOP_INQUIRE_SETUP_INFO, &param, /*paramlen*/1,
1652	    (uint8_t*)&setup_info, sizeof(setup_info), DEFAULT_CMD_TIMEOUT);
1653
1654	if (error != 0) {
1655		device_printf(aha->dev,
1656		    "ahafetchtransinfo - Inquire Setup Info Failed %d\n",
1657		    error);
1658		return;
1659	}
1660
1661	sync_info = setup_info.syncinfo[targ_offset];
1662
1663	if (sync_info.sync == 0)
1664		spi->sync_offset = 0;
1665	else
1666		spi->sync_offset = sync_info.offset;
1667
1668	spi->bus_width = MSG_EXT_WDTR_BUS_8_BIT;
1669
1670	if (aha->boardid >= BOARD_1542CF)
1671		sync_period = 1000;
1672	else
1673		sync_period = 2000;
1674	sync_period += 500 * sync_info.period;
1675
1676	/* Convert ns value to standard SCSI sync rate */
1677	if (spi->sync_offset != 0)
1678		spi->sync_period = scsi_calc_syncparam(sync_period);
1679	else
1680		spi->sync_period = 0;
1681
1682	spi->valid = CTS_SPI_VALID_SYNC_RATE
1683		   | CTS_SPI_VALID_SYNC_OFFSET
1684		   | CTS_SPI_VALID_BUS_WIDTH;
1685        xpt_async(AC_TRANSFER_NEG, cts->ccb_h.path, cts);
1686}
1687
1688static void
1689ahamapmboxes(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1690{
1691	struct aha_softc* aha;
1692
1693	aha = (struct aha_softc*)arg;
1694	aha->mailbox_physbase = segs->ds_addr;
1695}
1696
1697static void
1698ahamapccbs(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1699{
1700	struct aha_softc* aha;
1701
1702	aha = (struct aha_softc*)arg;
1703	aha->aha_ccb_physbase = segs->ds_addr;
1704}
1705
1706static void
1707ahamapsgs(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1708{
1709
1710	struct aha_softc* aha;
1711
1712	aha = (struct aha_softc*)arg;
1713	SLIST_FIRST(&aha->sg_maps)->sg_physaddr = segs->ds_addr;
1714}
1715
1716static void
1717ahapoll(struct cam_sim *sim)
1718{
1719	aha_intr_locked(cam_sim_softc(sim));
1720}
1721
1722static void
1723ahatimeout(void *arg)
1724{
1725	struct aha_ccb	*accb;
1726	union  ccb	*ccb;
1727	struct aha_softc *aha;
1728	uint32_t	paddr;
1729	struct ccb_hdr *ccb_h;
1730
1731	accb = (struct aha_ccb *)arg;
1732	ccb = accb->ccb;
1733	aha = (struct aha_softc *)ccb->ccb_h.ccb_aha_ptr;
1734	mtx_assert(&aha->lock, MA_OWNED);
1735	xpt_print_path(ccb->ccb_h.path);
1736	printf("CCB %p - timed out\n", (void *)accb);
1737
1738	if ((accb->flags & ACCB_ACTIVE) == 0) {
1739		xpt_print_path(ccb->ccb_h.path);
1740		printf("CCB %p - timed out CCB already completed\n",
1741		    (void *)accb);
1742		return;
1743	}
1744
1745	/*
1746	 * In order to simplify the recovery process, we ask the XPT
1747	 * layer to halt the queue of new transactions and we traverse
1748	 * the list of pending CCBs and remove their timeouts. This
1749	 * means that the driver attempts to clear only one error
1750	 * condition at a time.  In general, timeouts that occur
1751	 * close together are related anyway, so there is no benefit
1752	 * in attempting to handle errors in parrallel.  Timeouts will
1753	 * be reinstated when the recovery process ends.
1754	 */
1755	if ((accb->flags & ACCB_DEVICE_RESET) == 0) {
1756		if ((accb->flags & ACCB_RELEASE_SIMQ) == 0) {
1757			xpt_freeze_simq(aha->sim, /*count*/1);
1758			accb->flags |= ACCB_RELEASE_SIMQ;
1759		}
1760
1761		ccb_h = LIST_FIRST(&aha->pending_ccbs);
1762		while (ccb_h != NULL) {
1763			struct aha_ccb *pending_accb;
1764
1765			pending_accb = (struct aha_ccb *)ccb_h->ccb_accb_ptr;
1766			callout_stop(&pending_accb->timer);
1767			ccb_h = LIST_NEXT(ccb_h, sim_links.le);
1768		}
1769	}
1770
1771	if ((accb->flags & ACCB_DEVICE_RESET) != 0
1772	 || aha->cur_outbox->action_code != AMBO_FREE) {
1773		/*
1774		 * Try a full host adapter/SCSI bus reset.
1775		 * We do this only if we have already attempted
1776		 * to clear the condition with a BDR, or we cannot
1777		 * attempt a BDR for lack of mailbox resources.
1778		 */
1779		ccb->ccb_h.status = CAM_CMD_TIMEOUT;
1780		ahareset(aha, /*hardreset*/TRUE);
1781		device_printf(aha->dev, "No longer in timeout\n");
1782	} else {
1783		/*
1784		 * Send a Bus Device Reset message:
1785		 * The target that is holding up the bus may not
1786		 * be the same as the one that triggered this timeout
1787		 * (different commands have different timeout lengths),
1788		 * but we have no way of determining this from our
1789		 * timeout handler.  Our strategy here is to queue a
1790		 * BDR message to the target of the timed out command.
1791		 * If this fails, we'll get another timeout 2 seconds
1792		 * later which will attempt a bus reset.
1793		 */
1794		accb->flags |= ACCB_DEVICE_RESET;
1795		callout_reset(&accb->timer, 2 * hz, ahatimeout, accb);
1796		aha->recovery_accb->hccb.opcode = INITIATOR_BUS_DEV_RESET;
1797
1798		/* No Data Transfer */
1799		aha->recovery_accb->hccb.datain = TRUE;
1800		aha->recovery_accb->hccb.dataout = TRUE;
1801		aha->recovery_accb->hccb.ahastat = 0;
1802		aha->recovery_accb->hccb.sdstat = 0;
1803		aha->recovery_accb->hccb.target = ccb->ccb_h.target_id;
1804
1805		/* Tell the adapter about this command */
1806		paddr = ahaccbvtop(aha, aha->recovery_accb);
1807		ahautoa24(paddr, aha->cur_outbox->ccb_addr);
1808		aha->cur_outbox->action_code = AMBO_START;
1809		aha_outb(aha, COMMAND_REG, AOP_START_MBOX);
1810		ahanextoutbox(aha);
1811	}
1812}
1813
1814int
1815aha_detach(struct aha_softc *aha)
1816{
1817	mtx_lock(&aha->lock);
1818	xpt_async(AC_LOST_DEVICE, aha->path, NULL);
1819	xpt_free_path(aha->path);
1820	xpt_bus_deregister(cam_sim_path(aha->sim));
1821	cam_sim_free(aha->sim, /*free_devq*/TRUE);
1822	mtx_unlock(&aha->lock);
1823	/* XXX: Drain all timers? */
1824	return (0);
1825}
1826MODULE_DEPEND(aha, cam, 1, 1, 1);
1827