1210284Sjmallett/***********************license start***************
2232812Sjmallett * Copyright (c) 2003-2010  Cavium Inc. (support@cavium.com). All rights
3215990Sjmallett * reserved.
4210284Sjmallett *
5210284Sjmallett *
6215990Sjmallett * Redistribution and use in source and binary forms, with or without
7215990Sjmallett * modification, are permitted provided that the following conditions are
8215990Sjmallett * met:
9210284Sjmallett *
10215990Sjmallett *   * Redistributions of source code must retain the above copyright
11215990Sjmallett *     notice, this list of conditions and the following disclaimer.
12210284Sjmallett *
13215990Sjmallett *   * Redistributions in binary form must reproduce the above
14215990Sjmallett *     copyright notice, this list of conditions and the following
15215990Sjmallett *     disclaimer in the documentation and/or other materials provided
16215990Sjmallett *     with the distribution.
17215990Sjmallett
18232812Sjmallett *   * Neither the name of Cavium Inc. nor the names of
19215990Sjmallett *     its contributors may be used to endorse or promote products
20215990Sjmallett *     derived from this software without specific prior written
21215990Sjmallett *     permission.
22215990Sjmallett
23215990Sjmallett * This Software, including technical data, may be subject to U.S. export  control
24215990Sjmallett * laws, including the U.S. Export Administration Act and its  associated
25215990Sjmallett * regulations, and may be subject to export or import  regulations in other
26215990Sjmallett * countries.
27215990Sjmallett
28215990Sjmallett * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
29232812Sjmallett * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR
30215990Sjmallett * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
31215990Sjmallett * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
32215990Sjmallett * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
33215990Sjmallett * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
34215990Sjmallett * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
35215990Sjmallett * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
36215990Sjmallett * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR
37215990Sjmallett * PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
38210284Sjmallett ***********************license end**************************************/
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45215990Sjmallett
46210284Sjmallett/**
47210284Sjmallett * @file
48210284Sjmallett *
49210284Sjmallett * Helper functions to abstract board specific data about
50210284Sjmallett * network ports from the rest of the cvmx-helper files.
51210284Sjmallett *
52232812Sjmallett * <hr>$Revision: 70030 $<hr>
53210284Sjmallett */
54210284Sjmallett#ifndef __CVMX_HELPER_BOARD_H__
55210284Sjmallett#define __CVMX_HELPER_BOARD_H__
56210284Sjmallett
57210284Sjmallett#ifdef	__cplusplus
58210284Sjmallettextern "C" {
59210284Sjmallett#endif
60210284Sjmallett
61210284Sjmallett
62210284Sjmalletttypedef enum {
63210284Sjmallett    USB_CLOCK_TYPE_REF_12,
64210284Sjmallett    USB_CLOCK_TYPE_REF_24,
65210284Sjmallett    USB_CLOCK_TYPE_REF_48,
66210284Sjmallett    USB_CLOCK_TYPE_CRYSTAL_12,
67210284Sjmallett} cvmx_helper_board_usb_clock_types_t;
68210284Sjmallett
69210284Sjmalletttypedef enum {
70232812Sjmallett    BROADCOM_GENERIC_PHY,
71232812Sjmallett    MARVELL_GENERIC_PHY,
72232812Sjmallett} cvmx_phy_type_t;
73232812Sjmallett
74232812Sjmalletttypedef enum {
75210284Sjmallett    set_phy_link_flags_autoneg                  = 0x1,
76210284Sjmallett    set_phy_link_flags_flow_control_dont_touch  = 0x0 << 1,
77210284Sjmallett    set_phy_link_flags_flow_control_enable      = 0x1 << 1,
78210284Sjmallett    set_phy_link_flags_flow_control_disable     = 0x2 << 1,
79210284Sjmallett    set_phy_link_flags_flow_control_mask        = 0x3 << 1,  /* Mask for 2 bit wide flow control field */
80210284Sjmallett} cvmx_helper_board_set_phy_link_flags_types_t;
81210284Sjmallett
82210284Sjmallett
83215990Sjmallett/* Fake IPD port, the RGMII/MII interface may use different PHY, use this
84215990Sjmallett   macro to return appropriate MIX address to read the PHY. */
85215990Sjmallett#define CVMX_HELPER_BOARD_MGMT_IPD_PORT     -10
86215990Sjmallett
87210284Sjmallett/**
88210284Sjmallett * cvmx_override_board_link_get(int ipd_port) is a function
89210284Sjmallett * pointer. It is meant to allow customization of the process of
90210284Sjmallett * talking to a PHY to determine link speed. It is called every
91210284Sjmallett * time a PHY must be polled for link status. Users should set
92210284Sjmallett * this pointer to a function before calling any cvmx-helper
93210284Sjmallett * operations.
94210284Sjmallett */
95210284Sjmallettextern cvmx_helper_link_info_t (*cvmx_override_board_link_get)(int ipd_port);
96210284Sjmallett
97210284Sjmallett/**
98210284Sjmallett * Return the MII PHY address associated with the given IPD
99210284Sjmallett * port. A result of -1 means there isn't a MII capable PHY
100210284Sjmallett * connected to this port. On chips supporting multiple MII
101210284Sjmallett * busses the bus number is encoded in bits <15:8>.
102210284Sjmallett *
103215990Sjmallett * This function must be modified for every new Octeon board.
104210284Sjmallett * Internally it uses switch statements based on the cvmx_sysinfo
105215990Sjmallett * data to determine board types and revisions. It relies on the
106210284Sjmallett * fact that every Octeon board receives a unique board type
107210284Sjmallett * enumeration from the bootloader.
108210284Sjmallett *
109210284Sjmallett * @param ipd_port Octeon IPD port to get the MII address for.
110210284Sjmallett *
111210284Sjmallett * @return MII PHY address and bus number or -1.
112210284Sjmallett */
113210284Sjmallettextern int cvmx_helper_board_get_mii_address(int ipd_port);
114210284Sjmallett
115210284Sjmallett/**
116210284Sjmallett * This function as a board specific method of changing the PHY
117210284Sjmallett * speed, duplex, and autonegotiation. This programs the PHY and
118210284Sjmallett * not Octeon. This can be used to force Octeon's links to
119210284Sjmallett * specific settings.
120210284Sjmallett *
121210284Sjmallett * @param phy_addr  The address of the PHY to program
122210284Sjmallett * @param link_flags
123210284Sjmallett *                  Flags to control autonegotiation.  Bit 0 is autonegotiation
124215990Sjmallett *                  enable/disable to maintain backward compatibility.
125210284Sjmallett * @param link_info Link speed to program. If the speed is zero and autonegotiation
126210284Sjmallett *                  is enabled, all possible negotiation speeds are advertised.
127210284Sjmallett *
128210284Sjmallett * @return Zero on success, negative on failure
129210284Sjmallett */
130210284Sjmallettint cvmx_helper_board_link_set_phy(int phy_addr, cvmx_helper_board_set_phy_link_flags_types_t link_flags,
131210284Sjmallett                                   cvmx_helper_link_info_t link_info);
132210284Sjmallett
133210284Sjmallett/**
134210284Sjmallett * @INTERNAL
135210284Sjmallett * This function is the board specific method of determining an
136210284Sjmallett * ethernet ports link speed. Most Octeon boards have Marvell PHYs
137210284Sjmallett * and are handled by the fall through case. This function must be
138210284Sjmallett * updated for boards that don't have the normal Marvell PHYs.
139210284Sjmallett *
140215990Sjmallett * This function must be modified for every new Octeon board.
141210284Sjmallett * Internally it uses switch statements based on the cvmx_sysinfo
142215990Sjmallett * data to determine board types and revisions. It relies on the
143210284Sjmallett * fact that every Octeon board receives a unique board type
144210284Sjmallett * enumeration from the bootloader.
145210284Sjmallett *
146210284Sjmallett * @param ipd_port IPD input port associated with the port we want to get link
147210284Sjmallett *                 status for.
148210284Sjmallett *
149210284Sjmallett * @return The ports link status. If the link isn't fully resolved, this must
150210284Sjmallett *         return zero.
151210284Sjmallett */
152210284Sjmallettextern cvmx_helper_link_info_t __cvmx_helper_board_link_get(int ipd_port);
153210284Sjmallett
154210284Sjmallett/**
155210284Sjmallett * @INTERNAL
156210284Sjmallett * This function is called by cvmx_helper_interface_probe() after it
157210284Sjmallett * determines the number of ports Octeon can support on a specific
158210284Sjmallett * interface. This function is the per board location to override
159210284Sjmallett * this value. It is called with the number of ports Octeon might
160210284Sjmallett * support and should return the number of actual ports on the
161210284Sjmallett * board.
162210284Sjmallett *
163215990Sjmallett * This function must be modified for every new Octeon board.
164210284Sjmallett * Internally it uses switch statements based on the cvmx_sysinfo
165215990Sjmallett * data to determine board types and revisions. It relies on the
166210284Sjmallett * fact that every Octeon board receives a unique board type
167210284Sjmallett * enumeration from the bootloader.
168210284Sjmallett *
169210284Sjmallett * @param interface Interface to probe
170210284Sjmallett * @param supported_ports
171210284Sjmallett *                  Number of ports Octeon supports.
172210284Sjmallett *
173210284Sjmallett * @return Number of ports the actual board supports. Many times this will
174210284Sjmallett *         simple be "support_ports".
175210284Sjmallett */
176210284Sjmallettextern int __cvmx_helper_board_interface_probe(int interface, int supported_ports);
177210284Sjmallett
178210284Sjmallett/**
179210284Sjmallett * @INTERNAL
180210284Sjmallett * Enable packet input/output from the hardware. This function is
181210284Sjmallett * called after by cvmx_helper_packet_hardware_enable() to
182210284Sjmallett * perform board specific initialization. For most boards
183210284Sjmallett * nothing is needed.
184210284Sjmallett *
185210284Sjmallett * @param interface Interface to enable
186210284Sjmallett *
187210284Sjmallett * @return Zero on success, negative on failure
188210284Sjmallett */
189210284Sjmallettextern int __cvmx_helper_board_hardware_enable(int interface);
190210284Sjmallett
191210284Sjmallett
192210284Sjmallett
193210284Sjmallett
194210284Sjmallett/**
195210284Sjmallett * @INTERNAL
196210284Sjmallett * Gets the clock type used for the USB block based on board type.
197210284Sjmallett * Used by the USB code for auto configuration of clock type.
198210284Sjmallett *
199210284Sjmallett * @return USB clock type enumeration
200210284Sjmallett */
201210284Sjmallettcvmx_helper_board_usb_clock_types_t __cvmx_helper_board_usb_get_clock_type(void);
202210284Sjmallett
203210284Sjmallett
204210284Sjmallett/**
205210284Sjmallett * @INTERNAL
206210284Sjmallett * Adjusts the number of available USB ports on Octeon based on board
207210284Sjmallett * specifics.
208215990Sjmallett *
209210284Sjmallett * @param supported_ports expected number of ports based on chip type;
210210284Sjmallett *
211215990Sjmallett *
212210284Sjmallett * @return number of available usb ports, based on board specifics.
213210284Sjmallett *         Return value is supported_ports if function does not
214210284Sjmallett *         override.
215210284Sjmallett */
216210284Sjmallettint __cvmx_helper_board_usb_get_num_ports(int supported_ports);
217210284Sjmallett
218210284Sjmallett#ifdef	__cplusplus
219210284Sjmallett}
220210284Sjmallett#endif
221210284Sjmallett
222210284Sjmallett#endif  /* __CVMX_HELPER_BOARD_H__ */
223