1210284Sjmallett/***********************license start*************** 2232812Sjmallett * Copyright (c) 2003-2010 Cavium Inc. (support@cavium.com). All rights 3215990Sjmallett * reserved. 4210284Sjmallett * 5210284Sjmallett * 6215990Sjmallett * Redistribution and use in source and binary forms, with or without 7215990Sjmallett * modification, are permitted provided that the following conditions are 8215990Sjmallett * met: 9210284Sjmallett * 10215990Sjmallett * * Redistributions of source code must retain the above copyright 11215990Sjmallett * notice, this list of conditions and the following disclaimer. 12210284Sjmallett * 13215990Sjmallett * * Redistributions in binary form must reproduce the above 14215990Sjmallett * copyright notice, this list of conditions and the following 15215990Sjmallett * disclaimer in the documentation and/or other materials provided 16215990Sjmallett * with the distribution. 17215990Sjmallett 18232812Sjmallett * * Neither the name of Cavium Inc. nor the names of 19215990Sjmallett * its contributors may be used to endorse or promote products 20215990Sjmallett * derived from this software without specific prior written 21215990Sjmallett * permission. 22215990Sjmallett 23215990Sjmallett * This Software, including technical data, may be subject to U.S. export control 24215990Sjmallett * laws, including the U.S. Export Administration Act and its associated 25215990Sjmallett * regulations, and may be subject to export or import regulations in other 26215990Sjmallett * countries. 27215990Sjmallett 28215990Sjmallett * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 29232812Sjmallett * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR 30215990Sjmallett * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO 31215990Sjmallett * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR 32215990Sjmallett * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM 33215990Sjmallett * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, 34215990Sjmallett * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF 35215990Sjmallett * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR 36215990Sjmallett * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR 37215990Sjmallett * PERFORMANCE OF THE SOFTWARE LIES WITH YOU. 38210284Sjmallett ***********************license end**************************************/ 39210284Sjmallett 40215990Sjmallett 41210284Sjmallett/** 42210284Sjmallett * @file 43210284Sjmallett * Function prototypes for accessing memory and CSRs on Octeon. 44210284Sjmallett * 45210284Sjmallett * <hr>$Revision: 38306 $<hr> 46210284Sjmallett*/ 47210284Sjmallett#ifndef __CVMX_ACCESS_H__ 48210284Sjmallett#define __CVMX_ACCESS_H__ 49210284Sjmallett 50210284Sjmallett#ifdef __cplusplus 51210284Sjmallettextern "C" { 52210284Sjmallett#endif 53210284Sjmallett 54210284Sjmallett/* We're going to assume that if we are compiling for Mips then we must be 55210284Sjmallett running natively on Octoen. It is possible that this code could be 56210284Sjmallett compiled on a non Octeon Mips that is acting as a PCI/PCIe host. In this 57210284Sjmallett case this assumption will be wrong and cause issues We can't key off of 58210284Sjmallett __octeon__ since some people use stock gcc toolchains */ 59210284Sjmallett#if defined(__mips__) && !defined(CVMX_BUILD_FOR_LINUX_HOST) 60210284Sjmallett #define CVMX_FUNCTION static inline 61210284Sjmallett#else 62210284Sjmallett #define CVMX_FUNCTION extern 63210284Sjmallett#endif 64210284Sjmallett 65210284Sjmallett/** 66210284Sjmallett * simprintf uses simulator tricks to speed up printouts. The format 67210284Sjmallett * and args are passed to the simulator and processed natively on the host. 68210284Sjmallett * Simprintf is limited to 7 arguments, and they all must use %ll (long long) 69210284Sjmallett * format specifiers to be displayed correctly. 70210284Sjmallett * 71210284Sjmallett * @param format 72210284Sjmallett * 73210284Sjmallett * @return 74210284Sjmallett */ 75210284SjmallettEXTERN_ASM void simprintf(const char *format, ...); 76210284Sjmallett 77210284Sjmallett/** 78210284Sjmallett * This function performs some default initialization of the Octeon executive. 79210284Sjmallett * It initializes the cvmx_bootmem memory allocator with the list of physical 80210284Sjmallett * memory provided by the bootloader, and creates 1-1 TLB mappings for this 81210284Sjmallett * memory. This function should be called on all cores that will use either the 82210284Sjmallett * bootmem allocator or the 1-1 TLB mappings. Applications which require a 83210284Sjmallett * different configuration can replace this function with a suitable application 84210284Sjmallett * specific one. 85210284Sjmallett * 86210284Sjmallett * @return 0 on success 87210284Sjmallett * -1 on failure 88210284Sjmallett */ 89210284Sjmallettextern int cvmx_user_app_init(void); 90210284Sjmallett 91210284Sjmallett/** 92210284Sjmallett * Returns the Octeon processor ID. 93210284Sjmallett * 94210284Sjmallett * @return Octeon processor ID from COP0 95210284Sjmallett */ 96210284SjmallettCVMX_FUNCTION uint32_t cvmx_get_proc_id(void) __attribute__ ((pure)); 97210284Sjmallett 98210284Sjmallett/** 99210284Sjmallett * Convert a memory pointer (void*) into a hardware compatable 100210284Sjmallett * memory address (uint64_t). Octeon hardware widgets don't 101210284Sjmallett * understand logical addresses. 102210284Sjmallett * 103210284Sjmallett * @param ptr C style memory pointer 104210284Sjmallett * @return Hardware physical address 105210284Sjmallett */ 106210284SjmallettCVMX_FUNCTION uint64_t cvmx_ptr_to_phys(void *ptr); 107210284Sjmallett 108210284Sjmallett/** 109210284Sjmallett * Convert a hardware physical address (uint64_t) into a 110210284Sjmallett * memory pointer (void *). 111210284Sjmallett * 112210284Sjmallett * @param physical_address 113210284Sjmallett * Hardware physical address to memory 114210284Sjmallett * @return Pointer to memory 115210284Sjmallett */ 116210284SjmallettCVMX_FUNCTION void *cvmx_phys_to_ptr(uint64_t physical_address); 117210284Sjmallett 118210284SjmallettCVMX_FUNCTION void cvmx_write64_int64(uint64_t address, int64_t value); 119210284SjmallettCVMX_FUNCTION void cvmx_write64_uint64(uint64_t address, uint64_t value); 120210284SjmallettCVMX_FUNCTION void cvmx_write64_int32(uint64_t address, int32_t value); 121210284SjmallettCVMX_FUNCTION void cvmx_write64_uint32(uint64_t address, uint32_t value); 122210284SjmallettCVMX_FUNCTION void cvmx_write64_int16(uint64_t address, int16_t value); 123210284SjmallettCVMX_FUNCTION void cvmx_write64_uint16(uint64_t address, uint16_t value); 124210284SjmallettCVMX_FUNCTION void cvmx_write64_int8(uint64_t address, int8_t value); 125210284SjmallettCVMX_FUNCTION void cvmx_write64_uint8(uint64_t address, uint8_t value); 126210284SjmallettCVMX_FUNCTION void cvmx_write_csr(uint64_t csr_addr, uint64_t val); 127210284SjmallettCVMX_FUNCTION void cvmx_write_io(uint64_t io_addr, uint64_t val); 128210284Sjmallett 129210284SjmallettCVMX_FUNCTION int64_t cvmx_read64_int64(uint64_t address); 130210284SjmallettCVMX_FUNCTION uint64_t cvmx_read64_uint64(uint64_t address); 131210284SjmallettCVMX_FUNCTION int32_t cvmx_read64_int32(uint64_t address); 132210284SjmallettCVMX_FUNCTION uint32_t cvmx_read64_uint32(uint64_t address); 133210284SjmallettCVMX_FUNCTION int16_t cvmx_read64_int16(uint64_t address); 134210284SjmallettCVMX_FUNCTION uint16_t cvmx_read64_uint16(uint64_t address); 135210284SjmallettCVMX_FUNCTION int8_t cvmx_read64_int8(uint64_t address); 136210284SjmallettCVMX_FUNCTION uint8_t cvmx_read64_uint8(uint64_t address); 137210284SjmallettCVMX_FUNCTION uint64_t cvmx_read_csr(uint64_t csr_addr); 138210284Sjmallett 139210284SjmallettCVMX_FUNCTION void cvmx_send_single(uint64_t data); 140210284SjmallettCVMX_FUNCTION void cvmx_read_csr_async(uint64_t scraddr, uint64_t csr_addr); 141210284Sjmallett 142210284Sjmallett/** 143215990Sjmallett * Number of the Core on which the program is currently running. 144210284Sjmallett * 145210284Sjmallett * @return Number of cores 146210284Sjmallett */ 147210284SjmallettCVMX_FUNCTION unsigned int cvmx_get_core_num(void); 148210284Sjmallett 149210284Sjmallett/** 150210284Sjmallett * Returns the number of bits set in the provided value. 151210284Sjmallett * Simple wrapper for POP instruction. 152210284Sjmallett * 153210284Sjmallett * @param val 32 bit value to count set bits in 154210284Sjmallett * 155210284Sjmallett * @return Number of bits set 156210284Sjmallett */ 157210284SjmallettCVMX_FUNCTION uint32_t cvmx_pop(uint32_t val); 158210284Sjmallett 159210284Sjmallett/** 160210284Sjmallett * Returns the number of bits set in the provided value. 161210284Sjmallett * Simple wrapper for DPOP instruction. 162210284Sjmallett * 163210284Sjmallett * @param val 64 bit value to count set bits in 164210284Sjmallett * 165210284Sjmallett * @return Number of bits set 166210284Sjmallett */ 167210284SjmallettCVMX_FUNCTION int cvmx_dpop(uint64_t val); 168210284Sjmallett 169210284Sjmallett/** 170215990Sjmallett * @deprecated 171215990Sjmallett * Provide current cycle counter as a return value. Deprecated, use 172215990Sjmallett * cvmx_clock_get_count(CVMX_CLOCK_CORE) to get cycle counter. 173210284Sjmallett * 174210284Sjmallett * @return current cycle counter 175210284Sjmallett */ 176210284SjmallettCVMX_FUNCTION uint64_t cvmx_get_cycle(void); 177210284Sjmallett 178210284Sjmallett/** 179215990Sjmallett * @deprecated 180215990Sjmallett * Reads a chip global cycle counter. This counts SCLK cycles since 181215990Sjmallett * chip reset. The counter is 64 bit. This function is deprecated as the rate 182215990Sjmallett * of the global cycle counter is different between Octeon+ and Octeon2, use 183215990Sjmallett * cvmx_clock_get_count(CVMX_CLOCK_SCLK) instead. For Octeon2, the clock rate 184215990Sjmallett * of SCLK may be differnet than the core clock. 185210284Sjmallett * 186210284Sjmallett * @return Global chip cycle count since chip reset. 187210284Sjmallett */ 188215990SjmallettCVMX_FUNCTION uint64_t cvmx_get_cycle_global(void) __attribute__((deprecated)); 189210284Sjmallett 190210284Sjmallett/** 191215990Sjmallett * Wait for the specified number of core clock cycles 192210284Sjmallett * 193210284Sjmallett * @param cycles 194210284Sjmallett */ 195210284SjmallettCVMX_FUNCTION void cvmx_wait(uint64_t cycles); 196210284Sjmallett 197210284Sjmallett/** 198210284Sjmallett * Wait for the specified number of micro seconds 199210284Sjmallett * 200210284Sjmallett * @param usec micro seconds to wait 201210284Sjmallett */ 202210284SjmallettCVMX_FUNCTION void cvmx_wait_usec(uint64_t usec); 203210284Sjmallett 204210284Sjmallett/** 205215990Sjmallett * Wait for the specified number of io clock cycles 206215990Sjmallett * 207215990Sjmallett * @param cycles 208215990Sjmallett */ 209215990SjmallettCVMX_FUNCTION void cvmx_wait_io(uint64_t cycles); 210215990Sjmallett 211215990Sjmallett/** 212210284Sjmallett * Perform a soft reset of Octeon 213210284Sjmallett * 214210284Sjmallett * @return 215210284Sjmallett */ 216210284SjmallettCVMX_FUNCTION void cvmx_reset_octeon(void); 217210284Sjmallett 218210284Sjmallett/** 219210284Sjmallett * Read a byte of fuse data 220210284Sjmallett * @param byte_addr address to read 221210284Sjmallett * 222210284Sjmallett * @return fuse value: 0 or 1 223210284Sjmallett */ 224210284SjmallettCVMX_FUNCTION uint8_t cvmx_fuse_read_byte(int byte_addr); 225210284Sjmallett 226210284Sjmallett/** 227210284Sjmallett * Read a single fuse bit 228210284Sjmallett * 229210284Sjmallett * @param fuse Fuse number (0-1024) 230210284Sjmallett * 231210284Sjmallett * @return fuse value: 0 or 1 232210284Sjmallett */ 233210284SjmallettCVMX_FUNCTION int cvmx_fuse_read(int fuse); 234210284Sjmallett 235210284Sjmallett#undef CVMX_FUNCTION 236210284Sjmallett 237210284Sjmallett#ifdef __cplusplus 238210284Sjmallett} 239210284Sjmallett#endif 240210284Sjmallett 241210284Sjmallett#endif /* __CVMX_ACCESS_H__ */ 242210284Sjmallett 243