dtrace_subr.c revision 345869
187628Sdwmalone/* 287302Sdwmalone * CDDL HEADER START 31590Srgrimes * 41590Srgrimes * The contents of this file are subject to the terms of the 51590Srgrimes * Common Development and Distribution License, Version 1.0 only 61590Srgrimes * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 * 22 * $FreeBSD: stable/10/sys/cddl/dev/dtrace/amd64/dtrace_subr.c 345869 2019-04-04 02:08:36Z markj $ 23 * 24 */ 25/* 26 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 27 * Use is subject to license terms. 28 */ 29 30/* 31 * Copyright (c) 2011, Joyent, Inc. All rights reserved. 32 */ 33 34#include <sys/param.h> 35#include <sys/systm.h> 36#include <sys/types.h> 37#include <sys/kernel.h> 38#include <sys/malloc.h> 39#include <sys/kmem.h> 40#include <sys/smp.h> 41#include <sys/dtrace_impl.h> 42#include <sys/dtrace_bsd.h> 43#include <machine/clock.h> 44#include <machine/cpufunc.h> 45#include <machine/frame.h> 46#include <machine/psl.h> 47#include <vm/pmap.h> 48 49extern uintptr_t dtrace_in_probe_addr; 50extern int dtrace_in_probe; 51 52extern void dtrace_getnanotime(struct timespec *tsp); 53 54int dtrace_invop(uintptr_t, uintptr_t *, uintptr_t); 55 56typedef struct dtrace_invop_hdlr { 57 int (*dtih_func)(uintptr_t, uintptr_t *, uintptr_t); 58 struct dtrace_invop_hdlr *dtih_next; 59} dtrace_invop_hdlr_t; 60 61dtrace_invop_hdlr_t *dtrace_invop_hdlr; 62 63int 64dtrace_invop(uintptr_t addr, uintptr_t *stack, uintptr_t eax) 65{ 66 dtrace_invop_hdlr_t *hdlr; 67 int rval; 68 69 for (hdlr = dtrace_invop_hdlr; hdlr != NULL; hdlr = hdlr->dtih_next) 70 if ((rval = hdlr->dtih_func(addr, stack, eax)) != 0) 71 return (rval); 72 73 return (0); 74} 75 76void 77dtrace_invop_add(int (*func)(uintptr_t, uintptr_t *, uintptr_t)) 78{ 79 dtrace_invop_hdlr_t *hdlr; 80 81 hdlr = kmem_alloc(sizeof (dtrace_invop_hdlr_t), KM_SLEEP); 82 hdlr->dtih_func = func; 83 hdlr->dtih_next = dtrace_invop_hdlr; 84 dtrace_invop_hdlr = hdlr; 85} 86 87void 88dtrace_invop_remove(int (*func)(uintptr_t, uintptr_t *, uintptr_t)) 89{ 90 dtrace_invop_hdlr_t *hdlr = dtrace_invop_hdlr, *prev = NULL; 91 92 for (;;) { 93 if (hdlr == NULL) 94 panic("attempt to remove non-existent invop handler"); 95 96 if (hdlr->dtih_func == func) 97 break; 98 99 prev = hdlr; 100 hdlr = hdlr->dtih_next; 101 } 102 103 if (prev == NULL) { 104 ASSERT(dtrace_invop_hdlr == hdlr); 105 dtrace_invop_hdlr = hdlr->dtih_next; 106 } else { 107 ASSERT(dtrace_invop_hdlr != hdlr); 108 prev->dtih_next = hdlr->dtih_next; 109 } 110 111 kmem_free(hdlr, 0); 112} 113 114/*ARGSUSED*/ 115void 116dtrace_toxic_ranges(void (*func)(uintptr_t base, uintptr_t limit)) 117{ 118 (*func)(0, (uintptr_t) addr_PTmap); 119} 120 121void 122dtrace_xcall(processorid_t cpu, dtrace_xcall_t func, void *arg) 123{ 124 cpuset_t cpus; 125 126 if (cpu == DTRACE_CPUALL) 127 cpus = all_cpus; 128 else 129 CPU_SETOF(cpu, &cpus); 130 131 smp_rendezvous_cpus(cpus, smp_no_rendevous_barrier, func, 132 smp_no_rendevous_barrier, arg); 133} 134 135static void 136dtrace_sync_func(void) 137{ 138} 139 140void 141dtrace_sync(void) 142{ 143 dtrace_xcall(DTRACE_CPUALL, (dtrace_xcall_t)dtrace_sync_func, NULL); 144} 145 146#ifdef notyet 147int (*dtrace_pid_probe_ptr)(struct regs *); 148int (*dtrace_return_probe_ptr)(struct regs *); 149 150void 151dtrace_user_probe(struct regs *rp, caddr_t addr, processorid_t cpuid) 152{ 153 krwlock_t *rwp; 154 proc_t *p = curproc; 155 extern void trap(struct regs *, caddr_t, processorid_t); 156 157 if (USERMODE(rp->r_cs) || (rp->r_ps & PS_VM)) { 158 if (curthread->t_cred != p->p_cred) { 159 cred_t *oldcred = curthread->t_cred; 160 /* 161 * DTrace accesses t_cred in probe context. t_cred 162 * must always be either NULL, or point to a valid, 163 * allocated cred structure. 164 */ 165 curthread->t_cred = crgetcred(); 166 crfree(oldcred); 167 } 168 } 169 170 if (rp->r_trapno == T_DTRACE_RET) { 171 uint8_t step = curthread->t_dtrace_step; 172 uint8_t ret = curthread->t_dtrace_ret; 173 uintptr_t npc = curthread->t_dtrace_npc; 174 175 if (curthread->t_dtrace_ast) { 176 aston(curthread); 177 curthread->t_sig_check = 1; 178 } 179 180 /* 181 * Clear all user tracing flags. 182 */ 183 curthread->t_dtrace_ft = 0; 184 185 /* 186 * If we weren't expecting to take a return probe trap, kill 187 * the process as though it had just executed an unassigned 188 * trap instruction. 189 */ 190 if (step == 0) { 191 tsignal(curthread, SIGILL); 192 return; 193 } 194 195 /* 196 * If we hit this trap unrelated to a return probe, we're 197 * just here to reset the AST flag since we deferred a signal 198 * until after we logically single-stepped the instruction we 199 * copied out. 200 */ 201 if (ret == 0) { 202 rp->r_pc = npc; 203 return; 204 } 205 206 /* 207 * We need to wait until after we've called the 208 * dtrace_return_probe_ptr function pointer to set %pc. 209 */ 210 rwp = &CPU->cpu_ft_lock; 211 rw_enter(rwp, RW_READER); 212 if (dtrace_return_probe_ptr != NULL) 213 (void) (*dtrace_return_probe_ptr)(rp); 214 rw_exit(rwp); 215 rp->r_pc = npc; 216 217 } else if (rp->r_trapno == T_BPTFLT) { 218 uint8_t instr; 219 rwp = &CPU->cpu_ft_lock; 220 221 /* 222 * The DTrace fasttrap provider uses the breakpoint trap 223 * (int 3). We let DTrace take the first crack at handling 224 * this trap; if it's not a probe that DTrace knowns about, 225 * we call into the trap() routine to handle it like a 226 * breakpoint placed by a conventional debugger. 227 */ 228 rw_enter(rwp, RW_READER); 229 if (dtrace_pid_probe_ptr != NULL && 230 (*dtrace_pid_probe_ptr)(rp) == 0) { 231 rw_exit(rwp); 232 return; 233 } 234 rw_exit(rwp); 235 236 /* 237 * If the instruction that caused the breakpoint trap doesn't 238 * look like an int 3 anymore, it may be that this tracepoint 239 * was removed just after the user thread executed it. In 240 * that case, return to user land to retry the instuction. 241 */ 242 if (fuword8((void *)(rp->r_pc - 1), &instr) == 0 && 243 instr != FASTTRAP_INSTR) { 244 rp->r_pc--; 245 return; 246 } 247 248 trap(rp, addr, cpuid); 249 250 } else { 251 trap(rp, addr, cpuid); 252 } 253} 254 255void 256dtrace_safe_synchronous_signal(void) 257{ 258 kthread_t *t = curthread; 259 struct regs *rp = lwptoregs(ttolwp(t)); 260 size_t isz = t->t_dtrace_npc - t->t_dtrace_pc; 261 262 ASSERT(t->t_dtrace_on); 263 264 /* 265 * If we're not in the range of scratch addresses, we're not actually 266 * tracing user instructions so turn off the flags. If the instruction 267 * we copied out caused a synchonous trap, reset the pc back to its 268 * original value and turn off the flags. 269 */ 270 if (rp->r_pc < t->t_dtrace_scrpc || 271 rp->r_pc > t->t_dtrace_astpc + isz) { 272 t->t_dtrace_ft = 0; 273 } else if (rp->r_pc == t->t_dtrace_scrpc || 274 rp->r_pc == t->t_dtrace_astpc) { 275 rp->r_pc = t->t_dtrace_pc; 276 t->t_dtrace_ft = 0; 277 } 278} 279 280int 281dtrace_safe_defer_signal(void) 282{ 283 kthread_t *t = curthread; 284 struct regs *rp = lwptoregs(ttolwp(t)); 285 size_t isz = t->t_dtrace_npc - t->t_dtrace_pc; 286 287 ASSERT(t->t_dtrace_on); 288 289 /* 290 * If we're not in the range of scratch addresses, we're not actually 291 * tracing user instructions so turn off the flags. 292 */ 293 if (rp->r_pc < t->t_dtrace_scrpc || 294 rp->r_pc > t->t_dtrace_astpc + isz) { 295 t->t_dtrace_ft = 0; 296 return (0); 297 } 298 299 /* 300 * If we have executed the original instruction, but we have performed 301 * neither the jmp back to t->t_dtrace_npc nor the clean up of any 302 * registers used to emulate %rip-relative instructions in 64-bit mode, 303 * we'll save ourselves some effort by doing that here and taking the 304 * signal right away. We detect this condition by seeing if the program 305 * counter is the range [scrpc + isz, astpc). 306 */ 307 if (rp->r_pc >= t->t_dtrace_scrpc + isz && 308 rp->r_pc < t->t_dtrace_astpc) { 309#ifdef __amd64 310 /* 311 * If there is a scratch register and we're on the 312 * instruction immediately after the modified instruction, 313 * restore the value of that scratch register. 314 */ 315 if (t->t_dtrace_reg != 0 && 316 rp->r_pc == t->t_dtrace_scrpc + isz) { 317 switch (t->t_dtrace_reg) { 318 case REG_RAX: 319 rp->r_rax = t->t_dtrace_regv; 320 break; 321 case REG_RCX: 322 rp->r_rcx = t->t_dtrace_regv; 323 break; 324 case REG_R8: 325 rp->r_r8 = t->t_dtrace_regv; 326 break; 327 case REG_R9: 328 rp->r_r9 = t->t_dtrace_regv; 329 break; 330 } 331 } 332#endif 333 rp->r_pc = t->t_dtrace_npc; 334 t->t_dtrace_ft = 0; 335 return (0); 336 } 337 338 /* 339 * Otherwise, make sure we'll return to the kernel after executing 340 * the copied out instruction and defer the signal. 341 */ 342 if (!t->t_dtrace_step) { 343 ASSERT(rp->r_pc < t->t_dtrace_astpc); 344 rp->r_pc += t->t_dtrace_astpc - t->t_dtrace_scrpc; 345 t->t_dtrace_step = 1; 346 } 347 348 t->t_dtrace_ast = 1; 349 350 return (1); 351} 352#endif 353 354static int64_t tgt_cpu_tsc; 355static int64_t hst_cpu_tsc; 356static int64_t tsc_skew[MAXCPU]; 357static uint64_t nsec_scale; 358 359/* See below for the explanation of this macro. */ 360#define SCALE_SHIFT 28 361 362static void 363dtrace_gethrtime_init_cpu(void *arg) 364{ 365 uintptr_t cpu = (uintptr_t) arg; 366 367 if (cpu == curcpu) 368 tgt_cpu_tsc = rdtsc(); 369 else 370 hst_cpu_tsc = rdtsc(); 371} 372 373static void 374dtrace_gethrtime_init(void *arg) 375{ 376 struct pcpu *pc; 377 uint64_t tsc_f; 378 cpuset_t map; 379 int i; 380 381 /* 382 * Get TSC frequency known at this moment. 383 * This should be constant if TSC is invariant. 384 * Otherwise tick->time conversion will be inaccurate, but 385 * will preserve monotonic property of TSC. 386 */ 387 tsc_f = atomic_load_acq_64(&tsc_freq); 388 389 /* 390 * The following line checks that nsec_scale calculated below 391 * doesn't overflow 32-bit unsigned integer, so that it can multiply 392 * another 32-bit integer without overflowing 64-bit. 393 * Thus minimum supported TSC frequency is 62.5MHz. 394 */ 395 KASSERT(tsc_f > (NANOSEC >> (32 - SCALE_SHIFT)), ("TSC frequency is too low")); 396 397 /* 398 * We scale up NANOSEC/tsc_f ratio to preserve as much precision 399 * as possible. 400 * 2^28 factor was chosen quite arbitrarily from practical 401 * considerations: 402 * - it supports TSC frequencies as low as 62.5MHz (see above); 403 * - it provides quite good precision (e < 0.01%) up to THz 404 * (terahertz) values; 405 */ 406 nsec_scale = ((uint64_t)NANOSEC << SCALE_SHIFT) / tsc_f; 407 408 if (vm_guest != VM_GUEST_NO) 409 return; 410 411 /* The current CPU is the reference one. */ 412 sched_pin(); 413 tsc_skew[curcpu] = 0; 414 CPU_FOREACH(i) { 415 if (i == curcpu) 416 continue; 417 418 pc = pcpu_find(i); 419 CPU_SETOF(PCPU_GET(cpuid), &map); 420 CPU_SET(pc->pc_cpuid, &map); 421 422 smp_rendezvous_cpus(map, NULL, 423 dtrace_gethrtime_init_cpu, 424 smp_no_rendevous_barrier, (void *)(uintptr_t) i); 425 426 tsc_skew[i] = tgt_cpu_tsc - hst_cpu_tsc; 427 } 428 sched_unpin(); 429} 430 431SYSINIT(dtrace_gethrtime_init, SI_SUB_SMP, SI_ORDER_ANY, dtrace_gethrtime_init, NULL); 432 433/* 434 * DTrace needs a high resolution time function which can 435 * be called from a probe context and guaranteed not to have 436 * instrumented with probes itself. 437 * 438 * Returns nanoseconds since boot. 439 */ 440uint64_t 441dtrace_gethrtime() 442{ 443 uint64_t tsc; 444 uint32_t lo; 445 uint32_t hi; 446 447 /* 448 * We split TSC value into lower and higher 32-bit halves and separately 449 * scale them with nsec_scale, then we scale them down by 2^28 450 * (see nsec_scale calculations) taking into account 32-bit shift of 451 * the higher half and finally add. 452 */ 453 tsc = rdtsc() - tsc_skew[curcpu]; 454 lo = tsc; 455 hi = tsc >> 32; 456 return (((lo * nsec_scale) >> SCALE_SHIFT) + 457 ((hi * nsec_scale) << (32 - SCALE_SHIFT))); 458} 459 460uint64_t 461dtrace_gethrestime(void) 462{ 463 struct timespec current_time; 464 465 dtrace_getnanotime(¤t_time); 466 467 return (current_time.tv_sec * 1000000000ULL + current_time.tv_nsec); 468} 469 470/* Function to handle DTrace traps during probes. See amd64/amd64/trap.c */ 471int 472dtrace_trap(struct trapframe *frame, u_int type) 473{ 474 uint16_t nofault; 475 476 /* 477 * A trap can occur while DTrace executes a probe. Before 478 * executing the probe, DTrace blocks re-scheduling and sets 479 * a flag in it's per-cpu flags to indicate that it doesn't 480 * want to fault. On returning from the probe, the no-fault 481 * flag is cleared and finally re-scheduling is enabled. 482 * 483 * Check if DTrace has enabled 'no-fault' mode: 484 * 485 */ 486 sched_pin(); 487 nofault = cpu_core[curcpu].cpuc_dtrace_flags & CPU_DTRACE_NOFAULT; 488 sched_unpin(); 489 if (nofault) { 490 KASSERT((read_rflags() & PSL_I) == 0, ("interrupts enabled")); 491 492 /* 493 * There are only a couple of trap types that are expected. 494 * All the rest will be handled in the usual way. 495 */ 496 switch (type) { 497 /* Privilieged instruction fault. */ 498 case T_PRIVINFLT: 499 break; 500 /* General protection fault. */ 501 case T_PROTFLT: 502 /* Flag an illegal operation. */ 503 cpu_core[curcpu].cpuc_dtrace_flags |= CPU_DTRACE_ILLOP; 504 505 /* 506 * Offset the instruction pointer to the instruction 507 * following the one causing the fault. 508 */ 509 frame->tf_rip += dtrace_instr_size((u_char *) frame->tf_rip); 510 return (1); 511 /* Page fault. */ 512 case T_PAGEFLT: 513 /* Flag a bad address. */ 514 cpu_core[curcpu].cpuc_dtrace_flags |= CPU_DTRACE_BADADDR; 515 cpu_core[curcpu].cpuc_dtrace_illval = frame->tf_addr; 516 517 /* 518 * Offset the instruction pointer to the instruction 519 * following the one causing the fault. 520 */ 521 frame->tf_rip += dtrace_instr_size((u_char *) frame->tf_rip); 522 return (1); 523 default: 524 /* Handle all other traps in the usual way. */ 525 break; 526 } 527 } 528 529 /* Handle the trap in the usual way. */ 530 return (0); 531} 532