p2041si.dtsi revision 266364
1193323Sed/* 2193323Sed * P2041 Silicon Device Tree Source 3193323Sed * 4193323Sed * Copyright 2011 Freescale Semiconductor Inc. 5193323Sed * 6193323Sed * Redistribution and use in source and binary forms, with or without 7193323Sed * modification, are permitted provided that the following conditions are met: 8193323Sed * * Redistributions of source code must retain the above copyright 9193323Sed * notice, this list of conditions and the following disclaimer. 10193323Sed * * Redistributions in binary form must reproduce the above copyright 11193323Sed * notice, this list of conditions and the following disclaimer in the 12193323Sed * documentation and/or other materials provided with the distribution. 13193323Sed * * Neither the name of Freescale Semiconductor nor the 14193323Sed * names of its contributors may be used to endorse or promote products 15193323Sed * derived from this software without specific prior written permission. 16193323Sed * 17263508Sdim * 18218893Sdim * ALTERNATIVELY, this software may be distributed under the terms of the 19193323Sed * GNU General Public License ("GPL") as published by the Free Software 20218893Sdim * Foundation, either version 2 of that License or (at your option) any 21249423Sdim * later version. 22249423Sdim * 23249423Sdim * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 24249423Sdim * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25249423Sdim * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26249423Sdim * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 27198090Srdivacky * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28193323Sed * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29249423Sdim * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 30249423Sdim * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31193323Sed * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32193323Sed * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33193323Sed */ 34193323Sed/* $FreeBSD: stable/10/sys/boot/fdt/dts/powerpc/p2041si.dtsi 266364 2014-05-17 21:55:00Z ian $ */ 35193323Sed 36193323Sed/dts-v1/; 37193323Sed 38193323Sed/ { 39193323Sed compatible = "fsl,P2041"; 40193323Sed #address-cells = <2>; 41249423Sdim #size-cells = <2>; 42193323Sed interrupt-parent = <&mpic>; 43193323Sed 44193323Sed aliases { 45193323Sed ccsr = &soc; 46249423Sdim dcsr = &dcsr; 47193323Sed 48193323Sed ethernet0 = &enet0; 49193323Sed ethernet1 = &enet1; 50193323Sed ethernet2 = &enet2; 51193323Sed ethernet3 = &enet3; 52193323Sed ethernet4 = &enet4; 53193323Sed ethernet5 = &enet5; 54193323Sed serial0 = &serial0; 55193323Sed serial1 = &serial1; 56193323Sed serial2 = &serial2; 57193323Sed serial3 = &serial3; 58193323Sed pci0 = &pci0; 59249423Sdim pci1 = &pci1; 60193323Sed pci2 = &pci2; 61193323Sed usb0 = &usb0; 62193323Sed usb1 = &usb1; 63193323Sed dma0 = &dma0; 64193323Sed dma1 = &dma1; 65193323Sed bman = &bman; 66193323Sed qman = &qman; 67193323Sed pme = &pme; 68218893Sdim rman = &rman; 69218893Sdim sdhc = &sdhc; 70249423Sdim msi0 = &msi0; 71218893Sdim msi1 = &msi1; 72218893Sdim msi2 = &msi2; 73218893Sdim 74218893Sdim crypto = &crypto; 75218893Sdim sec_jr0 = &sec_jr0; 76218893Sdim sec_jr1 = &sec_jr1; 77249423Sdim sec_jr2 = &sec_jr2; 78193323Sed sec_jr3 = &sec_jr3; 79193323Sed rtic_a = &rtic_a; 80193323Sed rtic_b = &rtic_b; 81193323Sed rtic_c = &rtic_c; 82193323Sed rtic_d = &rtic_d; 83249423Sdim sec_mon = &sec_mon; 84218893Sdim 85218893Sdim fman0 = &fman0; 86218893Sdim fman0_oh0 = &fman0_oh0; 87218893Sdim fman0_oh1 = &fman0_oh1; 88249423Sdim fman0_oh2 = &fman0_oh2; 89193323Sed fman0_oh3 = &fman0_oh3; 90193323Sed fman0_oh4 = &fman0_oh4; 91193323Sed fman0_oh5 = &fman0_oh5; 92193323Sed fman0_oh6 = &fman0_oh6; 93193323Sed fman0_rx0 = &fman0_rx0; 94193323Sed fman0_rx1 = &fman0_rx1; 95193323Sed fman0_rx2 = &fman0_rx2; 96193323Sed fman0_rx3 = &fman0_rx3; 97193323Sed fman0_rx4 = &fman0_rx4; 98243830Sdim fman0_rx5 = &fman0_rx5; 99193323Sed }; 100193323Sed 101193323Sed cpus { 102193323Sed #address-cells = <1>; 103193323Sed #size-cells = <0>; 104193323Sed 105193323Sed cpu0: PowerPC,e500mc@0 { 106202375Srdivacky device_type = "cpu"; 107193323Sed reg = <0>; 108193323Sed bus-frequency = <749999996>; 109243830Sdim next-level-cache = <&L2_0>; 110202375Srdivacky L2_0: l2-cache { 111202375Srdivacky next-level-cache = <&cpc>; 112193323Sed }; 113193323Sed }; 114193323Sed cpu1: PowerPC,e500mc@1 { 115193323Sed device_type = "cpu"; 116198892Srdivacky reg = <1>; 117212904Sdim next-level-cache = <&L2_1>; 118212904Sdim L2_1: l2-cache { 119249423Sdim next-level-cache = <&cpc>; 120212904Sdim }; 121212904Sdim }; 122193323Sed cpu2: PowerPC,e500mc@2 { 123212904Sdim device_type = "cpu"; 124193323Sed reg = <2>; 125193323Sed next-level-cache = <&L2_2>; 126193323Sed L2_2: l2-cache { 127193323Sed next-level-cache = <&cpc>; 128249423Sdim }; 129193323Sed }; 130218893Sdim cpu3: PowerPC,e500mc@3 { 131193323Sed device_type = "cpu"; 132193323Sed reg = <3>; 133193323Sed next-level-cache = <&L2_3>; 134193323Sed L2_3: l2-cache { 135193323Sed next-level-cache = <&cpc>; 136249423Sdim }; 137193323Sed }; 138193323Sed }; 139193323Sed 140193323Sed dcsr: dcsr@f00000000 { 141193323Sed #address-cells = <1>; 142193323Sed #size-cells = <1>; 143193323Sed compatible = "fsl,dcsr", "simple-bus"; 144193323Sed 145193323Sed dcsr-epu@0 { 146193323Sed compatible = "fsl,dcsr-epu"; 147193323Sed interrupts = <52 2 0 0 148193323Sed 84 2 0 0 149193323Sed 85 2 0 0>; 150193323Sed interrupt-parent = <&mpic>; 151218893Sdim reg = <0x0 0x1000>; 152218893Sdim }; 153249423Sdim dcsr-npc { 154193323Sed compatible = "fsl,dcsr-npc"; 155193323Sed reg = <0x1000 0x1000 0x1000000 0x8000>; 156249423Sdim }; 157193323Sed dcsr-nxc@2000 { 158193323Sed compatible = "fsl,dcsr-nxc"; 159193323Sed reg = <0x2000 0x1000>; 160249423Sdim }; 161224145Sdim dcsr-corenet { 162224145Sdim compatible = "fsl,dcsr-corenet"; 163249423Sdim reg = <0x8000 0x1000 0xB0000 0x1000>; 164193323Sed }; 165193323Sed dcsr-dpaa@9000 { 166193323Sed compatible = "fsl,p2041-dcsr-dpaa", "fsl,dcsr-dpaa"; 167249423Sdim reg = <0x9000 0x1000>; 168193323Sed }; 169193323Sed dcsr-ocn@11000 { 170218893Sdim compatible = "fsl,p2041-dcsr-ocn", "fsl,dcsr-ocn"; 171218893Sdim reg = <0x11000 0x1000>; 172218893Sdim }; 173218893Sdim dcsr-ddr@12000 { 174263508Sdim compatible = "fsl,dcsr-ddr"; 175193323Sed dev-handle = <&ddr>; 176193323Sed reg = <0x12000 0x1000>; 177193323Sed }; 178193323Sed dcsr-nal@18000 { 179193323Sed compatible = "fsl,p2041-dcsr-nal", "fsl,dcsr-nal"; 180249423Sdim reg = <0x18000 0x1000>; 181218893Sdim }; 182218893Sdim dcsr-rcpm@22000 { 183249423Sdim compatible = "fsl,p2041-dcsr-rcpm", "fsl,dcsr-rcpm"; 184218893Sdim reg = <0x22000 0x1000>; 185218893Sdim }; 186218893Sdim dcsr-cpu-sb-proxy@40000 { 187193323Sed compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 188193323Sed cpu-handle = <&cpu0>; 189249423Sdim reg = <0x40000 0x1000>; 190193323Sed }; 191193323Sed dcsr-cpu-sb-proxy@41000 { 192193323Sed compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 193193323Sed cpu-handle = <&cpu1>; 194193323Sed reg = <0x41000 0x1000>; 195193323Sed }; 196193323Sed dcsr-cpu-sb-proxy@42000 { 197193323Sed compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 198193323Sed cpu-handle = <&cpu2>; 199193323Sed reg = <0x42000 0x1000>; 200193323Sed }; 201193323Sed dcsr-cpu-sb-proxy@43000 { 202193323Sed compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 203193323Sed cpu-handle = <&cpu3>; 204193323Sed reg = <0x43000 0x1000>; 205193323Sed }; 206193323Sed }; 207193323Sed 208193323Sed bman-portals@ff4000000 { 209193323Sed #address-cells = <0x1>; 210193323Sed #size-cells = <0x1>; 211193323Sed compatible = "bman-portals"; 212193323Sed ranges = <0x0 0xf 0xfde00000 0x200000>; 213193323Sed bman-portal@0 { 214193323Sed cell-index = <0x0>; 215193323Sed compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; 216193323Sed reg = <0x0 0x4000 0x100000 0x1000>; 217193323Sed interrupts = <105 2 0 0>; 218193323Sed }; 219193323Sed bman-portal@4000 { 220193323Sed cell-index = <0x1>; 221193323Sed compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; 222193323Sed reg = <0x4000 0x4000 0x101000 0x1000>; 223193323Sed interrupts = <107 2 0 0>; 224193323Sed }; 225193323Sed bman-portal@8000 { 226193323Sed cell-index = <2>; 227193323Sed compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; 228193323Sed reg = <0x8000 0x4000 0x102000 0x1000>; 229193323Sed interrupts = <109 2 0 0>; 230193323Sed }; 231193323Sed bman-portal@c000 { 232193323Sed cell-index = <0x3>; 233193323Sed compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; 234193323Sed reg = <0xc000 0x4000 0x103000 0x1000>; 235193323Sed interrupts = <111 2 0 0>; 236193323Sed }; 237193323Sed bman-portal@10000 { 238193323Sed cell-index = <0x4>; 239249423Sdim compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; 240249423Sdim reg = <0x10000 0x4000 0x104000 0x1000>; 241204642Srdivacky interrupts = <113 2 0 0>; 242204642Srdivacky }; 243249423Sdim bman-portal@14000 { 244193323Sed cell-index = <0x5>; 245204642Srdivacky compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; 246204642Srdivacky reg = <0x14000 0x4000 0x105000 0x1000>; 247193323Sed interrupts = <115 2 0 0>; 248193323Sed }; 249193323Sed bman-portal@18000 { 250193323Sed cell-index = <0x6>; 251193323Sed compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; 252193323Sed reg = <0x18000 0x4000 0x106000 0x1000>; 253193323Sed interrupts = <117 2 0 0>; 254193323Sed }; 255193323Sed bman-portal@1c000 { 256193323Sed cell-index = <0x7>; 257193323Sed compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; 258249423Sdim reg = <0x1c000 0x4000 0x107000 0x1000>; 259218893Sdim interrupts = <119 2 0 0>; 260218893Sdim }; 261218893Sdim bman-portal@20000 { 262249423Sdim cell-index = <0x8>; 263218893Sdim compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; 264193323Sed reg = <0x20000 0x4000 0x108000 0x1000>; 265193323Sed interrupts = <121 2 0 0>; 266193323Sed }; 267193323Sed bman-portal@24000 { 268193323Sed cell-index = <0x9>; 269193323Sed compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; 270193323Sed reg = <0x24000 0x4000 0x109000 0x1000>; 271193323Sed interrupts = <123 2 0 0>; 272193323Sed }; 273226633Sdim 274193323Sed buffer-pool@0 { 275193323Sed compatible = "fsl,p2041-bpool", "fsl,bpool"; 276193323Sed fsl,bpid = <0>; 277198090Srdivacky fsl,bpool-cfg = <0 0x100 0 1 0 0x100>; 278198090Srdivacky }; 279218893Sdim }; 280193323Sed 281193323Sed qman-portals@ff4200000 { 282193323Sed #address-cells = <0x1>; 283206274Srdivacky #size-cells = <0x1>; 284218893Sdim compatible = "qman-portals"; 285226633Sdim ranges = <0x0 0xf 0xfdc00000 0x200000>; 286226633Sdim qportal0: qman-portal@0 { 287226633Sdim cell-index = <0x0>; 288249423Sdim compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; 289226633Sdim reg = <0x0 0x4000 0x100000 0x1000>; 290193323Sed interrupts = <104 0x2 0 0>; 291206274Srdivacky fsl,qman-channel-id = <0x0>; 292193323Sed }; 293249423Sdim 294193323Sed qportal1: qman-portal@4000 { 295226633Sdim cell-index = <0x1>; 296206274Srdivacky compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; 297193323Sed reg = <0x4000 0x4000 0x101000 0x1000>; 298193323Sed interrupts = <106 0x2 0 0>; 299193323Sed fsl,qman-channel-id = <0x1>; 300193323Sed }; 301226633Sdim 302226633Sdim qportal2: qman-portal@8000 { 303226633Sdim cell-index = <0x2>; 304226633Sdim compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; 305226633Sdim reg = <0x8000 0x4000 0x102000 0x1000>; 306226633Sdim interrupts = <108 0x2 0 0>; 307193323Sed fsl,qman-channel-id = <0x2>; 308226633Sdim }; 309226633Sdim 310198090Srdivacky qportal3: qman-portal@c000 { 311226633Sdim cell-index = <0x3>; 312226633Sdim compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; 313198090Srdivacky reg = <0xc000 0x4000 0x103000 0x1000>; 314198090Srdivacky interrupts = <110 0x2 0 0>; 315226633Sdim fsl,qman-channel-id = <0x3>; 316226633Sdim }; 317226633Sdim 318226633Sdim qportal4: qman-portal@10000 { 319226633Sdim cell-index = <0x4>; 320199481Srdivacky compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; 321226633Sdim reg = <0x10000 0x4000 0x104000 0x1000>; 322226633Sdim interrupts = <112 0x2 0 0>; 323198090Srdivacky fsl,qman-channel-id = <0x4>; 324226633Sdim }; 325226633Sdim 326198090Srdivacky qportal5: qman-portal@14000 { 327226633Sdim cell-index = <0x5>; 328226633Sdim compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; 329226633Sdim reg = <0x14000 0x4000 0x105000 0x1000>; 330226633Sdim interrupts = <114 0x2 0 0>; 331226633Sdim fsl,qman-channel-id = <0x5>; 332226633Sdim }; 333226633Sdim 334226633Sdim qportal6: qman-portal@18000 { 335198090Srdivacky cell-index = <0x6>; 336198090Srdivacky compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; 337198090Srdivacky reg = <0x18000 0x4000 0x106000 0x1000>; 338218893Sdim interrupts = <116 0x2 0 0>; 339226633Sdim fsl,qman-channel-id = <0x6>; 340193323Sed }; 341193323Sed 342198090Srdivacky qportal7: qman-portal@1c000 { 343226633Sdim cell-index = <0x7>; 344198090Srdivacky compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; 345226633Sdim reg = <0x1c000 0x4000 0x107000 0x1000>; 346226633Sdim interrupts = <118 0x2 0 0>; 347226633Sdim fsl,qman-channel-id = <0x7>; 348226633Sdim }; 349226633Sdim 350226633Sdim qportal8: qman-portal@20000 { 351226633Sdim cell-index = <0x8>; 352226633Sdim compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; 353226633Sdim reg = <0x20000 0x4000 0x108000 0x1000>; 354226633Sdim interrupts = <120 0x2 0 0>; 355226633Sdim fsl,qman-channel-id = <0x8>; 356226633Sdim }; 357226633Sdim 358226633Sdim qportal9: qman-portal@24000 { 359198090Srdivacky cell-index = <0x9>; 360226633Sdim compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; 361226633Sdim reg = <0x24000 0x4000 0x109000 0x1000>; 362226633Sdim interrupts = <122 0x2 0 0>; 363226633Sdim fsl,qman-channel-id = <0x9>; 364226633Sdim }; 365226633Sdim 366198090Srdivacky qpool1: qman-pool@1 { 367226633Sdim cell-index = <1>; 368226633Sdim compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; 369226633Sdim fsl,qman-channel-id = <0x21>; 370226633Sdim }; 371226633Sdim 372226633Sdim qpool2: qman-pool@2 { 373226633Sdim cell-index = <2>; 374198090Srdivacky compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; 375226633Sdim fsl,qman-channel-id = <0x22>; 376226633Sdim }; 377226633Sdim 378226633Sdim qpool3: qman-pool@3 { 379226633Sdim cell-index = <3>; 380226633Sdim compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; 381226633Sdim fsl,qman-channel-id = <0x23>; 382226633Sdim }; 383226633Sdim 384226633Sdim qpool4: qman-pool@4 { 385193323Sed cell-index = <4>; 386226633Sdim compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; 387193323Sed fsl,qman-channel-id = <0x24>; 388198090Srdivacky }; 389198090Srdivacky 390198090Srdivacky qpool5: qman-pool@5 { 391198090Srdivacky cell-index = <5>; 392226633Sdim compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; 393198090Srdivacky fsl,qman-channel-id = <0x25>; 394198090Srdivacky }; 395198090Srdivacky 396198090Srdivacky qpool6: qman-pool@6 { 397198090Srdivacky cell-index = <6>; 398198090Srdivacky compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; 399193323Sed fsl,qman-channel-id = <0x26>; 400193323Sed }; 401193323Sed 402193323Sed qpool7: qman-pool@7 { 403263508Sdim cell-index = <7>; 404263508Sdim compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; 405263508Sdim fsl,qman-channel-id = <0x27>; 406263508Sdim }; 407263508Sdim 408263508Sdim qpool8: qman-pool@8 { 409193323Sed cell-index = <8>; 410193323Sed compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; 411193323Sed fsl,qman-channel-id = <0x28>; 412193323Sed }; 413226633Sdim 414193323Sed qpool9: qman-pool@9 { 415249423Sdim cell-index = <9>; 416193323Sed compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; 417226633Sdim fsl,qman-channel-id = <0x29>; 418193323Sed }; 419193323Sed 420193323Sed qpool10: qman-pool@10 { 421226633Sdim cell-index = <10>; 422193323Sed compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; 423193323Sed fsl,qman-channel-id = <0x2a>; 424226633Sdim }; 425193323Sed 426193323Sed qpool11: qman-pool@11 { 427193323Sed cell-index = <11>; 428193323Sed compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; 429226633Sdim fsl,qman-channel-id = <0x2b>; 430226633Sdim }; 431226633Sdim 432226633Sdim qpool12: qman-pool@12 { 433226633Sdim cell-index = <12>; 434226633Sdim compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; 435226633Sdim fsl,qman-channel-id = <0x2c>; 436226633Sdim }; 437226633Sdim 438226633Sdim qpool13: qman-pool@13 { 439226633Sdim cell-index = <13>; 440226633Sdim compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; 441226633Sdim fsl,qman-channel-id = <0x2d>; 442249423Sdim }; 443234353Sdim 444234353Sdim qpool14: qman-pool@14 { 445226633Sdim cell-index = <14>; 446226633Sdim compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; 447226633Sdim fsl,qman-channel-id = <0x2e>; 448249423Sdim }; 449226633Sdim 450226633Sdim qpool15: qman-pool@15 { 451249423Sdim cell-index = <15>; 452226633Sdim compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; 453234353Sdim fsl,qman-channel-id = <0x2f>; 454226633Sdim }; 455226633Sdim }; 456226633Sdim 457226633Sdim soc: soc@ffe000000 { 458226633Sdim #address-cells = <1>; 459226633Sdim #size-cells = <1>; 460226633Sdim device_type = "soc"; 461226633Sdim compatible = "simple-bus"; 462226633Sdim 463226633Sdim bus-frequency = <0>; // Filled out by kernel. 464226633Sdim 465226633Sdim ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 466234353Sdim reg = <0xf 0xfe000000 0 0x00001000>; 467226633Sdim 468226633Sdim soc-sram-error { 469226633Sdim compatible = "fsl,soc-sram-error"; 470226633Sdim interrupts = <16 2 1 29>; 471226633Sdim }; 472226633Sdim 473226633Sdim corenet-law@0 { 474226633Sdim compatible = "fsl,corenet-law"; 475234353Sdim reg = <0x0 0x1000>; 476226633Sdim fsl,num-laws = <32>; 477226633Sdim }; 478234353Sdim 479193323Sed ddr: memory-controller@8000 { 480193323Sed compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; 481193323Sed reg = <0x8000 0x1000>; 482226633Sdim interrupts = <16 2 1 23>; 483226633Sdim }; 484226633Sdim 485226633Sdim cpc: l3-cache-controller@10000 { 486226633Sdim compatible = "fsl,p2041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache"; 487226633Sdim reg = <0x10000 0x1000>; 488249423Sdim interrupts = <16 2 1 27>; 489226633Sdim }; 490226633Sdim 491226633Sdim corenet-cf@18000 { 492226633Sdim compatible = "fsl,corenet-cf"; 493226633Sdim reg = <0x18000 0x1000>; 494249423Sdim interrupts = <16 2 1 31>; 495226633Sdim fsl,ccf-num-csdids = <32>; 496226633Sdim fsl,ccf-num-snoopids = <32>; 497226633Sdim }; 498226633Sdim 499226633Sdim iommu@20000 { 500226633Sdim compatible = "fsl,pamu-v1.0", "fsl,pamu"; 501226633Sdim reg = <0x20000 0x4000>; 502226633Sdim interrupts = < 503226633Sdim 24 2 0 0 504226633Sdim 16 2 1 30>; 505226633Sdim }; 506226633Sdim 507226633Sdim mpic: pic@40000 { 508226633Sdim clock-frequency = <0>; 509226633Sdim interrupt-controller; 510226633Sdim #address-cells = <0>; 511226633Sdim #interrupt-cells = <4>; 512226633Sdim reg = <0x40000 0x40000>; 513226633Sdim compatible = "fsl,mpic", "chrp,open-pic"; 514226633Sdim device_type = "open-pic"; 515226633Sdim }; 516226633Sdim 517226633Sdim msi0: msi@41600 { 518226633Sdim compatible = "fsl,mpic-msi"; 519226633Sdim reg = <0x41600 0x200>; 520226633Sdim msi-available-ranges = <0 0x100>; 521226633Sdim interrupts = < 522226633Sdim 0xe0 0 0 0 523226633Sdim 0xe1 0 0 0 524226633Sdim 0xe2 0 0 0 525226633Sdim 0xe3 0 0 0 526226633Sdim 0xe4 0 0 0 527226633Sdim 0xe5 0 0 0 528226633Sdim 0xe6 0 0 0 529226633Sdim 0xe7 0 0 0>; 530226633Sdim }; 531226633Sdim 532226633Sdim msi1: msi@41800 { 533226633Sdim compatible = "fsl,mpic-msi"; 534226633Sdim reg = <0x41800 0x200>; 535226633Sdim msi-available-ranges = <0 0x100>; 536226633Sdim interrupts = < 537226633Sdim 0xe8 0 0 0 538226633Sdim 0xe9 0 0 0 539226633Sdim 0xea 0 0 0 540226633Sdim 0xeb 0 0 0 541226633Sdim 0xec 0 0 0 542226633Sdim 0xed 0 0 0 543226633Sdim 0xee 0 0 0 544226633Sdim 0xef 0 0 0>; 545226633Sdim }; 546226633Sdim 547226633Sdim msi2: msi@41a00 { 548226633Sdim compatible = "fsl,mpic-msi"; 549226633Sdim reg = <0x41a00 0x200>; 550226633Sdim msi-available-ranges = <0 0x100>; 551226633Sdim interrupts = < 552226633Sdim 0xf0 0 0 0 553226633Sdim 0xf1 0 0 0 554226633Sdim 0xf2 0 0 0 555226633Sdim 0xf3 0 0 0 556226633Sdim 0xf4 0 0 0 557226633Sdim 0xf5 0 0 0 558226633Sdim 0xf6 0 0 0 559226633Sdim 0xf7 0 0 0>; 560226633Sdim }; 561226633Sdim 562226633Sdim guts: global-utilities@e0000 { 563226633Sdim compatible = "fsl,qoriq-device-config-1.0"; 564226633Sdim reg = <0xe0000 0xe00>; 565226633Sdim fsl,has-rstcr; 566226633Sdim #sleep-cells = <1>; 567226633Sdim fsl,liodn-bits = <12>; 568226633Sdim }; 569226633Sdim 570226633Sdim pins: global-utilities@e0e00 { 571226633Sdim compatible = "fsl,qoriq-pin-control-1.0"; 572226633Sdim reg = <0xe0e00 0x200>; 573226633Sdim #sleep-cells = <2>; 574226633Sdim }; 575226633Sdim 576226633Sdim clockgen: global-utilities@e1000 { 577226633Sdim compatible = "fsl,p2041-clockgen", "fsl,qoriq-clockgen-1.0"; 578226633Sdim reg = <0xe1000 0x1000>; 579226633Sdim clock-frequency = <0>; 580226633Sdim }; 581226633Sdim 582226633Sdim rcpm: global-utilities@e2000 { 583226633Sdim compatible = "fsl,qoriq-rcpm-1.0"; 584226633Sdim reg = <0xe2000 0x1000>; 585226633Sdim #sleep-cells = <1>; 586226633Sdim }; 587226633Sdim 588226633Sdim sfp: sfp@e8000 { 589218893Sdim compatible = "fsl,p2041-sfp", "fsl,qoriq-sfp-1.0"; 590218893Sdim reg = <0xe8000 0x1000>; 591218893Sdim }; 592218893Sdim 593218893Sdim serdes: serdes@ea000 { 594218893Sdim compatible = "fsl,p2041-serdes"; 595218893Sdim reg = <0xea000 0x1000>; 596218893Sdim }; 597218893Sdim 598218893Sdim dma0: dma@100300 { 599218893Sdim #address-cells = <1>; 600249423Sdim #size-cells = <1>; 601218893Sdim compatible = "fsl,p2041-dma", "fsl,eloplus-dma"; 602218893Sdim reg = <0x100300 0x4>; 603218893Sdim ranges = <0x0 0x100100 0x200>; 604239462Sdim cell-index = <0>; 605239462Sdim dma-channel@0 { 606239462Sdim compatible = "fsl,p2041-dma-channel", 607239462Sdim "fsl,eloplus-dma-channel"; 608239462Sdim reg = <0x0 0x80>; 609239462Sdim cell-index = <0>; 610239462Sdim interrupts = <28 2 0 0>; 611239462Sdim }; 612239462Sdim dma-channel@80 { 613239462Sdim compatible = "fsl,p2041-dma-channel", 614239462Sdim "fsl,eloplus-dma-channel"; 615239462Sdim reg = <0x80 0x80>; 616239462Sdim cell-index = <1>; 617239462Sdim interrupts = <29 2 0 0>; 618239462Sdim }; 619239462Sdim dma-channel@100 { 620239462Sdim compatible = "fsl,p2041-dma-channel", 621239462Sdim "fsl,eloplus-dma-channel"; 622239462Sdim reg = <0x100 0x80>; 623239462Sdim cell-index = <2>; 624249423Sdim interrupts = <30 2 0 0>; 625218893Sdim }; 626218893Sdim dma-channel@180 { 627218893Sdim compatible = "fsl,p2041-dma-channel", 628218893Sdim "fsl,eloplus-dma-channel"; 629218893Sdim reg = <0x180 0x80>; 630218893Sdim cell-index = <3>; 631221345Sdim interrupts = <31 2 0 0>; 632243830Sdim }; 633243830Sdim }; 634243830Sdim 635243830Sdim dma1: dma@101300 { 636243830Sdim #address-cells = <1>; 637243830Sdim #size-cells = <1>; 638243830Sdim compatible = "fsl,p2041-dma", "fsl,eloplus-dma"; 639243830Sdim reg = <0x101300 0x4>; 640243830Sdim ranges = <0x0 0x101100 0x200>; 641243830Sdim cell-index = <1>; 642243830Sdim dma-channel@0 { 643243830Sdim compatible = "fsl,p2041-dma-channel", 644243830Sdim "fsl,eloplus-dma-channel"; 645243830Sdim reg = <0x0 0x80>; 646243830Sdim cell-index = <0>; 647243830Sdim interrupts = <32 2 0 0>; 648243830Sdim }; 649243830Sdim dma-channel@80 { 650243830Sdim compatible = "fsl,p2041-dma-channel", 651243830Sdim "fsl,eloplus-dma-channel"; 652243830Sdim reg = <0x80 0x80>; 653243830Sdim cell-index = <1>; 654243830Sdim interrupts = <33 2 0 0>; 655243830Sdim }; 656243830Sdim dma-channel@100 { 657243830Sdim compatible = "fsl,p2041-dma-channel", 658243830Sdim "fsl,eloplus-dma-channel"; 659243830Sdim reg = <0x100 0x80>; 660243830Sdim cell-index = <2>; 661243830Sdim interrupts = <34 2 0 0>; 662243830Sdim }; 663243830Sdim dma-channel@180 { 664243830Sdim compatible = "fsl,p2041-dma-channel", 665243830Sdim "fsl,eloplus-dma-channel"; 666243830Sdim reg = <0x180 0x80>; 667243830Sdim cell-index = <3>; 668243830Sdim interrupts = <35 2 0 0>; 669243830Sdim }; 670243830Sdim }; 671263508Sdim 672263508Sdim spi@110000 { 673263508Sdim #address-cells = <1>; 674263508Sdim #size-cells = <0>; 675263508Sdim compatible = "fsl,p2041-espi", "fsl,mpc8536-espi"; 676263508Sdim reg = <0x110000 0x1000>; 677263508Sdim interrupts = <53 0x2 0 0>; 678263508Sdim fsl,espi-num-chipselects = <4>; 679263508Sdim }; 680263508Sdim 681263508Sdim sdhc: sdhc@114000 { 682263508Sdim compatible = "fsl,p2041-esdhc", "fsl,esdhc"; 683263508Sdim reg = <0x114000 0x1000>; 684263508Sdim interrupts = <48 2 0 0>; 685263508Sdim sdhci,auto-cmd12; 686263508Sdim clock-frequency = <0>; 687263508Sdim }; 688263508Sdim 689263508Sdim i2c@118000 { 690263508Sdim #address-cells = <1>; 691263508Sdim #size-cells = <0>; 692263508Sdim cell-index = <0>; 693263508Sdim compatible = "fsl-i2c"; 694263508Sdim reg = <0x118000 0x100>; 695263508Sdim interrupts = <38 2 0 0>; 696263508Sdim dfsrr; 697263508Sdim }; 698263508Sdim 699263508Sdim i2c@118100 { 700263508Sdim #address-cells = <1>; 701263508Sdim #size-cells = <0>; 702263508Sdim cell-index = <1>; 703263508Sdim compatible = "fsl-i2c"; 704263508Sdim reg = <0x118100 0x100>; 705263508Sdim interrupts = <38 2 0 0>; 706263508Sdim dfsrr; 707263508Sdim }; 708263508Sdim 709263508Sdim i2c@119000 { 710263508Sdim #address-cells = <1>; 711263508Sdim #size-cells = <0>; 712263508Sdim cell-index = <2>; 713263508Sdim compatible = "fsl-i2c"; 714263508Sdim reg = <0x119000 0x100>; 715263508Sdim interrupts = <39 2 0 0>; 716263508Sdim dfsrr; 717263508Sdim }; 718263508Sdim 719263508Sdim i2c@119100 { 720263508Sdim #address-cells = <1>; 721263508Sdim #size-cells = <0>; 722263508Sdim cell-index = <3>; 723263508Sdim compatible = "fsl-i2c"; 724263508Sdim reg = <0x119100 0x100>; 725263508Sdim interrupts = <39 2 0 0>; 726263508Sdim dfsrr; 727263508Sdim }; 728263508Sdim 729263508Sdim serial0: serial@11c500 { 730263508Sdim cell-index = <0>; 731263508Sdim device_type = "serial"; 732263508Sdim compatible = "ns16550"; 733263508Sdim reg = <0x11c500 0x100>; 734263508Sdim clock-frequency = <0>; 735263508Sdim interrupts = <36 2 0 0>; 736263508Sdim }; 737263508Sdim 738263508Sdim serial1: serial@11c600 { 739263508Sdim cell-index = <1>; 740263508Sdim device_type = "serial"; 741263508Sdim compatible = "ns16550"; 742263508Sdim reg = <0x11c600 0x100>; 743263508Sdim clock-frequency = <0>; 744263508Sdim interrupts = <36 2 0 0>; 745263508Sdim }; 746263508Sdim 747263508Sdim serial2: serial@11d500 { 748263508Sdim cell-index = <2>; 749263508Sdim device_type = "serial"; 750263508Sdim compatible = "ns16550"; 751263508Sdim reg = <0x11d500 0x100>; 752263508Sdim clock-frequency = <0>; 753263508Sdim interrupts = <37 2 0 0>; 754263508Sdim }; 755263508Sdim 756263508Sdim serial3: serial@11d600 { 757263508Sdim cell-index = <3>; 758263508Sdim device_type = "serial"; 759263508Sdim compatible = "ns16550"; 760263508Sdim reg = <0x11d600 0x100>; 761263508Sdim clock-frequency = <0>; 762263508Sdim interrupts = <37 2 0 0>; 763263508Sdim }; 764263508Sdim 765263508Sdim gpio0: gpio@130000 { 766263508Sdim compatible = "fsl,p2041-gpio", "fsl,qoriq-gpio"; 767263508Sdim reg = <0x130000 0x1000>; 768263508Sdim interrupts = <55 2 0 0>; 769263508Sdim #gpio-cells = <2>; 770263508Sdim gpio-controller; 771263508Sdim }; 772 773 rman: rman@1e0000 { 774 compatible = "fsl,rman"; 775 #address-cells = <1>; 776 #size-cells = <1>; 777 ranges = <0x0 0x1e0000 0x20000>; 778 reg = <0x1e0000 0x20000>; 779 interrupts = <16 2 1 11>; /* err_irq */ 780 fsl,qman-channels-id = <0x62 0x63>; 781 782 inbound-block@0 { 783 compatible = "fsl,rman-inbound-block"; 784 reg = <0x0 0x800>; 785 }; 786 global-cfg@b00 { 787 compatible = "fsl,rman-global-cfg"; 788 reg = <0xb00 0x500>; 789 }; 790 inbound-block@1000 { 791 compatible = "fsl,rman-inbound-block"; 792 reg = <0x1000 0x800>; 793 }; 794 inbound-block@2000 { 795 compatible = "fsl,rman-inbound-block"; 796 reg = <0x2000 0x800>; 797 }; 798 inbound-block@3000 { 799 compatible = "fsl,rman-inbound-block"; 800 reg = <0x3000 0x800>; 801 }; 802 }; 803 804 usb0: usb@210000 { 805 compatible = "fsl,p2041-usb2-mph", 806 "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; 807 reg = <0x210000 0x1000>; 808 #address-cells = <1>; 809 #size-cells = <0>; 810 interrupts = <44 0x2 0 0>; 811 phy_type = "utmi"; 812 port0; 813 }; 814 815 usb1: usb@211000 { 816 compatible = "fsl,p2041-usb2-dr", 817 "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; 818 reg = <0x211000 0x1000>; 819 #address-cells = <1>; 820 #size-cells = <0>; 821 interrupts = <45 0x2 0 0>; 822 phy_type = "utmi"; 823 }; 824 825 sata@220000 { 826 compatible = "fsl,p2041-sata", "fsl,pq-sata-v2"; 827 reg = <0x220000 0x1000>; 828 interrupts = <68 0x2 0 0>; 829 }; 830 831 sata@221000 { 832 compatible = "fsl,p2041-sata", "fsl,pq-sata-v2"; 833 reg = <0x221000 0x1000>; 834 interrupts = <69 0x2 0 0>; 835 }; 836 837 crypto: crypto@300000 { 838 compatible = "fsl,sec-v4.2", "fsl,sec-v4.0"; 839 #address-cells = <1>; 840 #size-cells = <1>; 841 reg = <0x300000 0x10000>; 842 ranges = <0 0x300000 0x10000>; 843 interrupts = <92 2 0 0>; 844 845 sec_jr0: jr@1000 { 846 compatible = "fsl,sec-v4.2-job-ring", 847 "fsl,sec-v4.0-job-ring"; 848 reg = <0x1000 0x1000>; 849 interrupts = <88 2 0 0>; 850 }; 851 852 sec_jr1: jr@2000 { 853 compatible = "fsl,sec-v4.2-job-ring", 854 "fsl,sec-v4.0-job-ring"; 855 reg = <0x2000 0x1000>; 856 interrupts = <89 2 0 0>; 857 }; 858 859 sec_jr2: jr@3000 { 860 compatible = "fsl,sec-v4.2-job-ring", 861 "fsl,sec-v4.0-job-ring"; 862 reg = <0x3000 0x1000>; 863 interrupts = <90 2 0 0>; 864 }; 865 866 sec_jr3: jr@4000 { 867 compatible = "fsl,sec-v4.2-job-ring", 868 "fsl,sec-v4.0-job-ring"; 869 reg = <0x4000 0x1000>; 870 interrupts = <91 2 0 0>; 871 }; 872 873 rtic@6000 { 874 compatible = "fsl,sec-v4.2-rtic", 875 "fsl,sec-v4.0-rtic"; 876 #address-cells = <1>; 877 #size-cells = <1>; 878 reg = <0x6000 0x100>; 879 ranges = <0x0 0x6100 0xe00>; 880 881 rtic_a: rtic-a@0 { 882 compatible = "fsl,sec-v4.2-rtic-memory", 883 "fsl,sec-v4.0-rtic-memory"; 884 reg = <0x00 0x20 0x100 0x80>; 885 }; 886 887 rtic_b: rtic-b@20 { 888 compatible = "fsl,sec-v4.2-rtic-memory", 889 "fsl,sec-v4.0-rtic-memory"; 890 reg = <0x20 0x20 0x200 0x80>; 891 }; 892 893 rtic_c: rtic-c@40 { 894 compatible = "fsl,sec-v4.2-rtic-memory", 895 "fsl,sec-v4.0-rtic-memory"; 896 reg = <0x40 0x20 0x300 0x80>; 897 }; 898 899 rtic_d: rtic-d@60 { 900 compatible = "fsl,sec-v4.2-rtic-memory", 901 "fsl,sec-v4.0-rtic-memory"; 902 reg = <0x60 0x20 0x500 0x80>; 903 }; 904 }; 905 }; 906 907 sec_mon: sec_mon@314000 { 908 compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon"; 909 reg = <0x314000 0x1000>; 910 interrupts = <93 2 0 0>; 911 }; 912 913 pme: pme@316000 { 914 compatible = "fsl,pme"; 915 reg = <0x316000 0x10000>; 916 /* fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */ 917 /* fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */ 918 interrupts = <16 2 1 5>; 919 }; 920 921 qman: qman@318000 { 922 compatible = "fsl,p2041-qman", "fsl,qman"; 923 reg = <0x318000 0x1000>; 924 interrupts = <16 2 1 3>; 925 /* Commented out, use default allocation */ 926 /* fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */ 927 /* fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */ 928 }; 929 930 bman: bman@31a000 { 931 compatible = "fsl,p2041-bman", "fsl,bman"; 932 reg = <0x31a000 0x1000>; 933 interrupts = <16 2 1 2>; 934 /* Same as fsl,qman-*, use default allocation */ 935 /* fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */ 936 }; 937 938 fman0: fman@400000 { 939 #address-cells = <1>; 940 #size-cells = <1>; 941 cell-index = <0>; 942 compatible = "fsl,p2041-fman", "fsl,fman", "simple-bus"; 943 ranges = <0 0x400000 0x100000>; 944 reg = <0x400000 0x100000>; 945 clock-frequency = <0>; 946 interrupts = < 947 96 2 0 0 948 16 2 1 1>; 949 950 cc@0 { 951 compatible = "fsl,p2041-fman-cc", "fsl,fman-cc"; 952 }; 953 954 parser@c7000 { 955 compatible = "fsl,p2041-fman-parser", "fsl,fman-parser"; 956 reg = <0xc7000 0x1000>; 957 }; 958 959 keygen@c1000 { 960 compatible = "fsl,p2041-fman-keygen", "fsl,fman-keygen"; 961 reg = <0xc1000 0x1000>; 962 }; 963 964 policer@c0000 { 965 compatible = "fsl,p2041-fman-policer", "fsl,fman-policer"; 966 reg = <0xc0000 0x1000>; 967 }; 968 969 muram@0 { 970 compatible = "fsl,p2041-fman-muram", "fsl,fman-muram"; 971 reg = <0x0 0x28000>; 972 }; 973 974 bmi@80000 { 975 compatible = "fsl,p2041-fman-bmi", "fsl,fman-bmi"; 976 reg = <0x80000 0x400>; 977 }; 978 979 qmi@80400 { 980 compatible = "fsl,p2041-fman-qmi", "fsl,fman-qmi"; 981 reg = <0x80400 0x400>; 982 }; 983 984 fman0_rx0: port@88000 { 985 cell-index = <0>; 986 compatible = "fsl,p2041-fman-port-1g-rx", "fsl,fman-port-1g-rx"; 987 reg = <0x88000 0x1000>; 988 }; 989 fman0_rx1: port@89000 { 990 cell-index = <1>; 991 compatible = "fsl,p2041-fman-port-1g-rx", "fsl,fman-port-1g-rx"; 992 reg = <0x89000 0x1000>; 993 }; 994 fman0_rx2: port@8a000 { 995 cell-index = <2>; 996 compatible = "fsl,p2041-fman-port-1g-rx", "fsl,fman-port-1g-rx"; 997 reg = <0x8a000 0x1000>; 998 }; 999 fman0_rx3: port@8b000 { 1000 cell-index = <3>; 1001 compatible = "fsl,p2041-fman-port-1g-rx", "fsl,fman-port-1g-rx"; 1002 reg = <0x8b000 0x1000>; 1003 }; 1004 fman0_rx4: port@8c000 { 1005 cell-index = <4>; 1006 compatible = "fsl,p2041-fman-port-1g-rx", "fsl,fman-port-1g-rx"; 1007 reg = <0x8c000 0x1000>; 1008 }; 1009 fman0_rx5: port@90000 { 1010 cell-index = <0>; 1011 compatible = "fsl,p2041-fman-port-10g-rx", "fsl,fman-port-10g-rx"; 1012 reg = <0x90000 0x1000>; 1013 }; 1014 1015 fman0_tx5: port@b0000 { 1016 cell-index = <0>; 1017 compatible = "fsl,p2041-fman-port-10g-tx", "fsl,fman-port-10g-tx"; 1018 reg = <0xb0000 0x1000>; 1019 fsl,qman-channel-id = <0x40>; 1020 }; 1021 fman0_tx0: port@a8000 { 1022 cell-index = <0>; 1023 compatible = "fsl,p2041-fman-port-1g-tx", "fsl,fman-port-1g-tx"; 1024 reg = <0xa8000 0x1000>; 1025 fsl,qman-channel-id = <0x41>; 1026 }; 1027 fman0_tx1: port@a9000 { 1028 cell-index = <1>; 1029 compatible = "fsl,p2041-fman-port-1g-tx", "fsl,fman-port-1g-tx"; 1030 reg = <0xa9000 0x1000>; 1031 fsl,qman-channel-id = <0x42>; 1032 }; 1033 fman0_tx2: port@aa000 { 1034 cell-index = <2>; 1035 compatible = "fsl,p2041-fman-port-1g-tx", "fsl,fman-port-1g-tx"; 1036 reg = <0xaa000 0x1000>; 1037 fsl,qman-channel-id = <0x43>; 1038 }; 1039 fman0_tx3: port@ab000 { 1040 cell-index = <3>; 1041 compatible = "fsl,p2041-fman-port-1g-tx", "fsl,fman-port-1g-tx"; 1042 reg = <0xab000 0x1000>; 1043 fsl,qman-channel-id = <0x44>; 1044 }; 1045 fman0_tx4: port@ac000 { 1046 cell-index = <4>; 1047 compatible = "fsl,p2041-fman-port-1g-tx", "fsl,fman-port-1g-tx"; 1048 reg = <0xac000 0x1000>; 1049 fsl,qman-channel-id = <0x45>; 1050 }; 1051 1052 fman0_oh0: port@81000 { 1053 cell-index = <0>; 1054 compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; 1055 reg = <0x81000 0x1000>; 1056 fsl,qman-channel-id = <0x46>; 1057 }; 1058 fman0_oh1: port@82000 { 1059 cell-index = <1>; 1060 compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; 1061 reg = <0x82000 0x1000>; 1062 fsl,qman-channel-id = <0x47>; 1063 }; 1064 fman0_oh2: port@83000 { 1065 cell-index = <2>; 1066 compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; 1067 reg = <0x83000 0x1000>; 1068 fsl,qman-channel-id = <0x48>; 1069 }; 1070 fman0_oh3: port@84000 { 1071 cell-index = <3>; 1072 compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; 1073 reg = <0x84000 0x1000>; 1074 fsl,qman-channel-id = <0x49>; 1075 }; 1076 fman0_oh4: port@85000 { 1077 cell-index = <4>; 1078 compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; 1079 reg = <0x85000 0x1000>; 1080 fsl,qman-channel-id = <0x4a>; 1081 }; 1082 fman0_oh5: port@86000 { 1083 cell-index = <5>; 1084 compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; 1085 reg = <0x86000 0x1000>; 1086 fsl,qman-channel-id = <0x4b>; 1087 }; 1088 fman0_oh6: port@87000 { 1089 cell-index = <6>; 1090 compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; 1091 reg = <0x87000 0x1000>; 1092 }; 1093 1094 enet0: ethernet@e0000 { 1095 cell-index = <0>; 1096 compatible = "fsl,p2041-fman-1g-mac", "fsl,fman-1g-mac"; 1097 reg = <0xe0000 0x1000>; 1098 fsl,port-handles = <&fman0_rx0 &fman0_tx0>; 1099 }; 1100 1101 mdio0: mdio@e1120 { 1102 #address-cells = <1>; 1103 #size-cells = <0>; 1104 compatible = "fsl,fman-mdio"; 1105 reg = <0xe1120 0xee0>; 1106 interrupts = <100 1 0 0>; 1107 }; 1108 1109 enet1: ethernet@e2000 { 1110 cell-index = <1>; 1111 compatible = "fsl,p2041-fman-1g-mac", "fsl,fman-1g-mac"; 1112 reg = <0xe2000 0x1000>; 1113 fsl,port-handles = <&fman0_rx1 &fman0_tx1>; 1114 }; 1115 1116 mdio@e3120 { 1117 #address-cells = <1>; 1118 #size-cells = <0>; 1119 compatible = "fsl,fman-tbi"; 1120 reg = <0xe3120 0xee0>; 1121 interrupts = <100 1 0 0>; 1122 }; 1123 1124 enet2: ethernet@e4000 { 1125 cell-index = <2>; 1126 compatible = "fsl,p2041-fman-1g-mac", "fsl,fman-1g-mac"; 1127 reg = <0xe4000 0x1000>; 1128 fsl,port-handles = <&fman0_rx2 &fman0_tx2>; 1129 }; 1130 1131 mdio@e5120 { 1132 #address-cells = <1>; 1133 #size-cells = <0>; 1134 compatible = "fsl,fman-tbi"; 1135 reg = <0xe5120 0xee0>; 1136 interrupts = <100 1 0 0>; 1137 }; 1138 1139 enet3: ethernet@e6000 { 1140 cell-index = <3>; 1141 compatible = "fsl,p2041-fman-1g-mac", "fsl,fman-1g-mac"; 1142 reg = <0xe6000 0x1000>; 1143 fsl,port-handles = <&fman0_rx3 &fman0_tx3>; 1144 }; 1145 1146 mdio@e7120 { 1147 #address-cells = <1>; 1148 #size-cells = <0>; 1149 compatible = "fsl,fman-tbi"; 1150 reg = <0xe7120 0xee0>; 1151 interrupts = <100 1 0 0>; 1152 }; 1153 1154 enet4: ethernet@e8000 { 1155 cell-index = <4>; 1156 compatible = "fsl,p2041-fman-1g-mac", "fsl,fman-1g-mac"; 1157 reg = <0xe8000 0x1000>; 1158 fsl,port-handles = <&fman0_rx4 &fman0_tx4>; 1159 }; 1160 1161 mdio@e9120 { 1162 #address-cells = <1>; 1163 #size-cells = <0>; 1164 compatible = "fsl,fman-tbi"; 1165 reg = <0xe9120 0xee0>; 1166 interrupts = <100 1 0 0>; 1167 }; 1168 1169 enet5: ethernet@f0000 { 1170 cell-index = <0>; 1171 compatible = "fsl,p2041-fman-10g-mac", "fsl,fman-10g-mac"; 1172 reg = <0xf0000 0x1000>; 1173 fsl,port-handles = <&fman0_rx5 &fman0_tx5>; 1174 }; 1175 1176 mdio@f1000 { 1177 #address-cells = <1>; 1178 #size-cells = <0>; 1179 compatible = "fsl,fman-xmdio"; 1180 reg = <0xf1000 0x1000>; 1181 interrupts = <100 1 0 0>; 1182 }; 1183 }; 1184 }; 1185 1186 rapidio@ffe0c0000 { 1187 compatible = "fsl,srio"; 1188 interrupts = <16 2 1 11>; 1189 #address-cells = <2>; 1190 #size-cells = <2>; 1191 ranges; 1192 1193 port1 { 1194 #address-cells = <2>; 1195 #size-cells = <2>; 1196 cell-index = <1>; 1197 }; 1198 1199 port2 { 1200 #address-cells = <2>; 1201 #size-cells = <2>; 1202 cell-index = <2>; 1203 }; 1204 }; 1205 1206 localbus@ffe124000 { 1207 compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus"; 1208 interrupts = <25 2 0 0>; 1209 #address-cells = <2>; 1210 #size-cells = <1>; 1211 }; 1212 1213 pci0: pcie@ffe200000 { 1214 compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2"; 1215 device_type = "pci"; 1216 status = "disabled"; 1217 #size-cells = <2>; 1218 #address-cells = <3>; 1219 bus-range = <0x0 0xff>; 1220 clock-frequency = <33333333>; 1221 fsl,msi = <&msi0>; 1222 interrupts = <16 2 1 15>; 1223 pcie@0 { 1224 reg = <0 0 0 0 0>; 1225 #interrupt-cells = <1>; 1226 #size-cells = <2>; 1227 #address-cells = <3>; 1228 device_type = "pci"; 1229 interrupts = <16 2 1 15>; 1230 interrupt-map-mask = <0xf800 0 0 7>; 1231 interrupt-map = < 1232 /* IDSEL 0x0 */ 1233 0000 0 0 1 &mpic 40 1 0 0 1234 0000 0 0 2 &mpic 1 1 0 0 1235 0000 0 0 3 &mpic 2 1 0 0 1236 0000 0 0 4 &mpic 3 1 0 0 1237 >; 1238 }; 1239 }; 1240 1241 pci1: pcie@ffe201000 { 1242 compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2"; 1243 device_type = "pci"; 1244 status = "okay"; 1245 #size-cells = <2>; 1246 #address-cells = <3>; 1247 bus-range = <0 0xff>; 1248 clock-frequency = <33333333>; 1249 fsl,msi = <&msi1>; 1250 interrupts = <16 2 1 14>; 1251 pcie@0 { 1252 reg = <0 0 0 0 0>; 1253 #interrupt-cells = <1>; 1254 #size-cells = <2>; 1255 #address-cells = <3>; 1256 device_type = "pci"; 1257 interrupts = <16 2 1 14>; 1258 interrupt-map-mask = <0xf800 0 0 7>; 1259 interrupt-map = < 1260 /* IDSEL 0x0 */ 1261 0000 0 0 1 &mpic 41 1 0 0 1262 0000 0 0 2 &mpic 5 1 0 0 1263 0000 0 0 3 &mpic 6 1 0 0 1264 0000 0 0 4 &mpic 7 1 0 0 1265 >; 1266 }; 1267 }; 1268 1269 pci2: pcie@ffe202000 { 1270 compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2"; 1271 device_type = "pci"; 1272 status = "disabled"; 1273 #size-cells = <2>; 1274 #address-cells = <3>; 1275 bus-range = <0x0 0xff>; 1276 clock-frequency = <33333333>; 1277 fsl,msi = <&msi2>; 1278 interrupts = <16 2 1 13>; 1279 pcie@0 { 1280 reg = <0 0 0 0 0>; 1281 #interrupt-cells = <1>; 1282 #size-cells = <2>; 1283 #address-cells = <3>; 1284 device_type = "pci"; 1285 interrupts = <16 2 1 13>; 1286 interrupt-map-mask = <0xf800 0 0 7>; 1287 interrupt-map = < 1288 /* IDSEL 0x0 */ 1289 0000 0 0 1 &mpic 42 1 0 0 1290 0000 0 0 2 &mpic 9 1 0 0 1291 0000 0 0 3 &mpic 10 1 0 0 1292 0000 0 0 4 &mpic 11 1 0 0 1293 >; 1294 }; 1295 }; 1296}; 1297