imx6.dtsi revision 273663
1/*
2 * Copyright (c) 2013 Ian Lepore
3 * Copyright (c) 2012 The FreeBSD Foundation
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * Freescale i.MX6 Common Device Tree Source.
28 * There are enough differences between the Solo, Dual, Quad, and *-lite
29 * flavors of this SoC that eventually we will need a finer-grained breakdown
30 * of some of this stuff.  For now this file works for all of them.  I think.
31 *
32 * $FreeBSD: stable/10/sys/boot/fdt/dts/arm/imx6.dtsi 273663 2014-10-26 02:44:41Z ian $
33 */
34
35/ {
36	cpus {
37		#address-cells = <1>;
38		#size-cells = <0>;
39
40		cpu@0 {
41			device_type = "cpu";
42			compatible = "ARM,MCIMX6";
43			reg = <0x0>;
44			d-cache-line-size = <32>;
45			i-cache-line-size = <32>;
46			d-cache-size = <0x8000>;
47			i-cache-size = <0x8000>;
48			/* TODO: describe L2 cache also */
49			timebase-frequency = <0>;
50			bus-frequency = <0>;
51			clock-frequency = <0>;
52		};
53	};
54
55	aliases {
56		soc = &SOC;
57	};
58
59	SOC: soc@00000000 {
60		compatible = "simple-bus";
61		#address-cells = <1>;
62		#size-cells = <1>;
63		interrupt-parent = <&gic>;
64		ranges = <0x00000000 0x00000000 0x10000000>;
65
66		gic: generic-interrupt-controller@00a00100 {
67			compatible = "arm,gic";
68			interrupt-controller;
69			#interrupt-cells = <1>;
70			reg = <0x00a01000 0x00001000
71			       0x00a00100 0x00000100>;
72		};
73
74		mp_tmr0@00a00200 {
75			compatible = "arm,mpcore-timers";
76			reg = <0x00a00200 0x100
77			       0x00a00600 0x100>;
78			interrupts = <27 29>;
79			interrupt-parent = <&gic>;
80		};
81
82		l2-cache@00a02000 {
83			compatible = "arm,pl310-cache", "arm,pl310";
84			reg = <0xa02000 0x1000>;
85			interrupts = <124>;
86			cache-level = <0x2>;
87			interrupt-parent = < &gic >;
88		};
89
90		aips@02000000 { /* AIPS1 */
91			compatible = "fsl,aips-bus", "simple-bus";
92			#address-cells = <1>;
93			#size-cells = <1>;
94			interrupt-parent = <&gic>;
95			reg = <0x02000000 0x00100000>;
96			ranges;
97
98			/* Required by many devices, so better to stay first */
99			clks: ccm@020c4000 {
100				compatible = "fsl,imx6q-ccm";
101				reg = <0x020c4000 0x4000>;
102				interrupts = <119 120>;
103			};
104
105			/* System Reset Controller */
106			src: src@4006E000 {
107				compatible = "fsl,imx6-src";
108				reg = <0x020D8000 0x100>;
109			};
110
111			sdma: sdma@020ec000 {
112				compatible = "fsl,imx6q-sdma";
113				reg = <0x020ec000 0x4000>;
114				interrupt-parent = <&gic>;
115				interrupts = <34>;
116				status = "disabled";
117			};
118
119			anatop: anatop@020c8000 {
120				compatible = "fsl,imx6q-anatop";
121				reg = <0x020c8000 0x1000>;
122				interrupt-parent = <&gic>;
123				interrupts = <49>;
124			};
125
126			gpt: timer@02098000 {
127				compatible = "fsl,imx6q-gpt", "fsl,imx51-gpt";
128				reg = <0x02098000 0x4000>;
129				interrupt-parent = <&gic>; interrupts = <87>;
130			};
131
132			iomux@020e0000 {
133				compatible = "fsl,imx6q-iomux";
134				reg = <0x020e0000 0x4000>;
135				interrupt-parent = <&gic>;
136				interrupts = <32>;
137			};
138
139			gpio1: gpio@0209c000 {
140				compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
141				reg = <0x0209c000 0x4000>;
142				interrupts = < 98 99 >;
143				gpio-controller;
144				#gpio-cells = <2>;
145				interrupt-controller;
146				#interrupt-cells = <2>;
147				status = "disabled";
148			};
149
150			gpio2: gpio@020a0000 {
151				compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
152				reg = <0x020a0000 0x4000>;
153				interrupts = < 100 101 >;
154				gpio-controller;
155				#gpio-cells = <2>;
156				interrupt-controller;
157				#interrupt-cells = <2>;
158				status = "disabled";
159			};
160
161			gpio3: gpio@020a4000 {
162				compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
163				reg = <0x020a4000 0x4000>;
164				interrupts = < 102 103 >;
165				gpio-controller;
166				#gpio-cells = <2>;
167				interrupt-controller;
168				#interrupt-cells = <2>;
169				status = "disabled";
170			};
171
172			gpio4: gpio@020a8000 {
173				compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
174				reg = <0x020a8000 0x4000>;
175				interrupts = < 104 105 >;
176				gpio-controller;
177				#gpio-cells = <2>;
178				interrupt-controller;
179				#interrupt-cells = <2>;
180				status = "disabled";
181			};
182
183			gpio5: gpio@020ac000 {
184				compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
185				reg = <0x020ac000 0x4000>;
186				interrupts = < 106 107 >;
187				gpio-controller;
188				#gpio-cells = <2>;
189				interrupt-controller;
190				#interrupt-cells = <2>;
191				status = "disabled";
192			};
193
194			gpio6: gpio@020b0000 {
195				compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
196				reg = <0x020b0000 0x4000>;
197				interrupts = < 108 109 >;
198				gpio-controller;
199				#gpio-cells = <2>;
200				interrupt-controller;
201				#interrupt-cells = <2>;
202				status = "disabled";
203			};
204
205			gpio7: gpio@020b4000 {
206				compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
207				reg = <0x020b4000 0x4000>;
208				interrupts = < 110 111 >;
209				gpio-controller;
210				#gpio-cells = <2>;
211				interrupt-controller;
212				#interrupt-cells = <2>;
213				status = "disabled";
214			};
215
216			uart1: serial@02020000 {
217				compatible = "fsl,imx6q-uart";
218				reg = <0x02020000 0x4000>;
219				interrupt-parent = <&gic>;
220				interrupts = <58>;
221				clock-frequency = <80000000>;
222				status = "disabled";
223			};
224
225			uart2: serial@021e8000 {
226				compatible = "fsl,imx6q-uart";
227				reg = <0x021e8000 0x4000>;
228				interrupt-parent = <&gic>;
229				interrupts = <59>;
230				clock-frequency = <80000000>;
231				status = "disabled";
232			};
233
234			uart3: serial@021ec000 {
235				compatible = "fsl,imx6q-uart";
236				reg = <0x021ec000 0x4000>;
237				interrupt-parent = <&gic>;
238				interrupts = <60>;
239				clock-frequency = <80000000>;
240				status = "disabled";
241			};
242
243			uart4: serial@021f0000 {
244				compatible = "fsl,imx6q-uart";
245				reg = <0x021f0000 0x4000>;
246				interrupt-parent = <&gic>;
247				interrupts = <61>;
248				clock-frequency = <80000000>;
249				status = "disabled";
250			};
251
252			uart5: serial@021f4000 {
253				compatible = "fsl,imx6q-uart";
254				reg = <0x021f4000 0x4000>;
255				interrupt-parent = <&gic>;
256				interrupts = <62>;
257				clock-frequency = <80000000>;
258				status = "disabled";
259			};
260
261			usbphy1: usbphy@020c9000 {
262				compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
263				reg = <0x020c9000 0x1000>;
264				interrupts = <44>;
265				status = "disabled";
266			};
267
268			usbphy2: usbphy@020ca000 {
269				compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
270				reg = <0x020ca000 0x1000>;
271				interrupts = <45>;
272				status = "disabled";
273			};
274
275			ecspi1: ecspi@02008000 {
276				compatible = "fsl,imx6q-ecspi";
277				reg = <0x02008000 0x4000>;
278				interrupts = < 63 >;
279				status = "disabled";
280			};
281
282			ecspi2: ecspi@0200C000 {
283				compatible = "fsl,imx6q-ecspi";
284				reg = <0x0200C000 0x4000>;
285				interrupts = < 64 >;
286				status = "disabled";
287			};
288
289			ecspi3: ecspi@02010000 {
290				compatible = "fsl,imx6q-ecspi";
291				reg = <0x02010000 0x4000>;
292				interrupts = < 65 >;
293				status = "disabled";
294			};
295
296			ecspi4: ecspi@02014000 {
297				compatible = "fsl,imx6q-ecspi";
298				reg = <0x02014000 0x4000>;
299				interrupts = < 66 >;
300				status = "disabled";
301			};
302
303			ecspi5: ecspi@02018000 {
304				compatible = "fsl,imx6q-ecspi";
305				reg = <0x02018000 0x4000>;
306				interrupts = < 67 >;
307				status = "disabled";
308			};
309
310			ssi1: ssi@02028000 {
311				compatible = "fsl,imx6q-ssi";
312				reg = <0x02028000 0x4000>;
313				interrupts = < 78 >;
314				status = "disabled";
315			};
316
317			ssi2: ssi@0202C000 {
318				compatible = "fsl,imx6q-ssi";
319				reg = <0x0202C000 0x4000>;
320				interrupts = < 79 >;
321				status = "disabled";
322			};
323
324			ssi3: ssi@02030000 {
325				compatible = "fsl,imx6q-ssi";
326				reg = <0x02030000 0x4000>;
327				interrupts = < 80 >;
328				status = "disabled";
329			};
330		};
331
332		aips@02100000 { /* AIPS2 */
333			compatible = "fsl,aips-bus", "simple-bus";
334			#address-cells = <1>;
335			#size-cells = <1>;
336			interrupt-parent = <&gic>;
337			reg = <0x02100000 0x00100000>;
338			ranges;
339
340			i2c1: i2c@021a0000 {
341				compatible = "fsl,imx6q-i2c";
342				reg = <0x021a0000 0x4000>;
343				interrupts = < 68 >;
344				status = "disabled";
345			};
346
347			i2c2: i2c@021a4000 {
348				compatible = "fsl,imx6q-i2c";
349				reg = <0x021a4000 0x4000>;
350				interrupts = < 69 >;
351				status = "disabled";
352			};
353
354			i2c3: i2c@021ac000 {
355				compatible = "fsl,imx6q-i2c";
356				reg = <0x021a8000 0x4000>;
357				interrupts = < 70 >;
358				status = "disabled";
359			};
360
361			fec1: ethernet@02188000 {
362				compatible = "fsl,imx6q-fec";
363				reg = <0x02188000 0x4000>;
364				interrupts = <150 151>;
365				status = "disabled";
366			};
367
368			usbotg1: usb@02184000 {
369				compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
370				reg = <0x02184000 0x200>;
371				interrupts = <75>;
372				fsl,usbphy = <&usbphy1>;
373				fsl,usbmisc = <&usbmisc 0>;
374				status = "disabled";
375			};
376
377			usbh1: usb@02184200 {
378				compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
379				reg = <0x02184200 0x200>;
380				interrupts = <72>;
381				fsl,usbphy = <&usbphy2>;
382				fsl,usbmisc = <&usbmisc 1>;
383				status = "disabled";
384			};
385
386			usbh2: usb@02184400 {
387				compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
388				reg = <0x02184400 0x200>;
389				interrupts = <73>;
390				fsl,usbmisc = <&usbmisc 2>;
391				status = "disabled";
392			};
393
394			usbh3: usb@02184600 {
395				compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
396				reg = <0x02184600 0x200>;
397				interrupts = <74>;
398				fsl,usbmisc = <&usbmisc 3>;
399				status = "disabled";
400			};
401
402			usbmisc: usbmisc@02184800 {
403				#index-cells = <1>;
404				compatible = "fsl,imx6q-usbmisc";
405				reg = <0x02184800 0x200>;
406				// Not disabled on purpose.
407			};
408
409			usdhc1: usdhc@02190000 {
410				compatible = "fsl,imx6q-usdhc";
411				reg = <0x02190000 0x4000>;
412				interrupt-parent = <&gic>;
413				interrupts = <54>;
414				cd-gpios = <&gpio1 2 0>;
415				bus-width = <0x4>;
416				status ="disabled";
417			};
418
419			usdhc2: usdhc@02194000 {
420				compatible = "fsl,imx6q-usdhc";
421				reg = <0x02194000 0x4000>;
422				interrupt-parent = <&gic>;
423				interrupts = <55>;
424				non-removable;
425				bus-width = <0x4>;
426				status ="disabled";
427			};
428
429			usdhc3: usdhc@02198000 {
430				compatible = "fsl,imx6q-usdhc";
431				reg = <0x02198000 0x4000>;
432				interrupt-parent = <&gic>;
433				interrupts = <56>;
434				cd-gpios = <&gpio3 9 0>;
435				bus-width = <0x4>;
436				status ="disabled";
437			};
438
439			usdhc4: usdhc@0219c000 {
440				compatible = "fsl,imx6q-usdhc";
441				reg = <0x0219c000 0x4000>;
442				interrupt-parent = <&gic>;
443				interrupts = <57>;
444				bus-width = <0x4>;
445				status ="disabled";
446			};
447
448			ocotp0: ocotp@021bc000 {
449				compatible = "fsl,imx6q-ocotp";
450				reg = <0x021bc000 0x4000>;
451			};
452
453			audmux: audmux@021d8000 {
454				compatible = "fsl,imx6q-audmux";
455				reg = <0x021d8000 0x4000>;
456				status = "disabled";
457			};
458		};
459	};
460};
461