imx6.dtsi revision 266251 
1/*
2 * Copyright (c) 2013 Ian Lepore
3 * Copyright (c) 2012 The FreeBSD Foundation
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * Freescale i.MX6 Common Device Tree Source.
28 * There are enough differences between the Solo, Dual, Quad, and *-lite
29 * flavors of this SoC that eventually we will need a finer-grained breakdown
30 * of some of this stuff.  For now this file works for all of them.  I think.
31 *
32 * $FreeBSD: stable/10/sys/boot/fdt/dts/arm/imx6.dtsi 266251 2014-05-16 15:56:34Z ian $
33 */
34
35/ {
36	cpus {
37		#address-cells = <1>;
38		#size-cells = <0>;
39
40		cpu@0 {
41			device_type = "cpu";
42			compatible = "ARM,MCIMX6";
43			reg = <0x0>;
44			d-cache-line-size = <32>;
45			i-cache-line-size = <32>;
46			d-cache-size = <0x8000>;
47			i-cache-size = <0x8000>;
48			/* TODO: describe L2 cache also */
49			timebase-frequency = <0>;
50			bus-frequency = <0>;
51			clock-frequency = <0>;
52		};
53	};
54
55	aliases {
56		soc = &SOC;
57	};
58
59	SOC: soc@00000000 {
60		compatible = "simple-bus";
61		#address-cells = <1>;
62		#size-cells = <1>;
63		interrupt-parent = <&gic>;
64		ranges = <0x00000000 0x00000000 0x10000000>;
65
66		gic: generic-interrupt-controller@00a00100 {
67			compatible = "arm,gic";
68			interrupt-controller;
69			#interrupt-cells = <1>;
70			reg = <0x00a01000 0x00001000
71			       0x00a00100 0x00000100>;
72		};
73
74		l2-cache@00a02000 {
75			compatible = "arm,pl310-cache", "arm,pl310";
76			reg = <0xa02000 0x1000>;
77			interrupts = <124>;
78			cache-level = <0x2>;
79			interrupt-parent = < &gic >;
80		};
81
82		aips@02000000 { /* AIPS1 */
83			compatible = "fsl,aips-bus", "simple-bus";
84			#address-cells = <1>;
85			#size-cells = <1>;
86			interrupt-parent = <&gic>;
87			reg = <0x02000000 0x00100000>;
88			ranges;
89
90			/* Required by many devices, so better to stay first */
91			clks: ccm@020c4000 {
92				compatible = "fsl,imx6q-ccm";
93				reg = <0x020c4000 0x4000>;
94				interrupts = <119 120>;
95			};
96
97			anatop: anatop@020c8000 {
98				compatible = "fsl,imx6q-anatop";
99				reg = <0x020c8000 0x1000>;
100				interrupt-parent = <&gic>;
101				interrupts = <49>;
102			};
103
104			gpt: timer@02098000 {
105				compatible = "fsl,imx6q-gpt", "fsl,imx51-gpt";
106				reg = <0x02098000 0x4000>;
107				interrupt-parent = <&gic>; interrupts = <87>;
108			};
109
110//			iomux@73fa8000 {
111//				compatible = "fsl,imx51-iomux";
112//				reg = <0x73fa8000 0x4000>;
113//				interrupt-parent = <&gic>; interrupts = <7>;
114//				status = "disabled";
115//			};
116
117			gpio1: gpio@0209c000 {
118				compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
119				reg = <0x0209c000 0x4000>;
120				interrupts = <0 66 0x04 0 67 0x04>;
121				gpio-controller;
122				#gpio-cells = <2>;
123				interrupt-controller;
124				#interrupt-cells = <2>;
125			};
126			
127			gpio2: gpio@020a0000 {
128				compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
129				reg = <0x020a0000 0x4000>;
130				interrupts = <0 68 0x04 0 69 0x04>;
131				gpio-controller;
132				#gpio-cells = <2>;
133				interrupt-controller;
134				#interrupt-cells = <2>;
135			};
136			
137			gpio3: gpio@020a4000 {
138				compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
139				reg = <0x020a4000 0x4000>;
140				interrupts = <0 70 0x04 0 71 0x04>;
141				gpio-controller;
142				#gpio-cells = <2>;
143				interrupt-controller;
144				#interrupt-cells = <2>;
145			};
146			
147			gpio4: gpio@020a8000 {
148				compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
149				reg = <0x020a8000 0x4000>;
150				interrupts = <0 72 0x04 0 73 0x04>;
151				gpio-controller;
152				#gpio-cells = <2>;
153				interrupt-controller;
154				#interrupt-cells = <2>;
155			};
156			
157			gpio5: gpio@020ac000 {
158				compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
159				reg = <0x020ac000 0x4000>;
160				interrupts = <0 74 0x04 0 75 0x04>;
161				gpio-controller;
162				#gpio-cells = <2>;
163				interrupt-controller;
164				#interrupt-cells = <2>;
165			};
166			
167			gpio6: gpio@020b0000 {
168				compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
169				reg = <0x020b0000 0x4000>;
170				interrupts = <0 76 0x04 0 77 0x04>;
171				gpio-controller;
172				#gpio-cells = <2>;
173				interrupt-controller;
174				#interrupt-cells = <2>;
175			};
176			
177			gpio7: gpio@020b4000 {
178				compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
179				reg = <0x020b4000 0x4000>;
180				interrupts = <0 78 0x04 0 79 0x04>;
181				gpio-controller;
182				#gpio-cells = <2>;
183				interrupt-controller;
184				#interrupt-cells = <2>;
185			};
186
187			uart1: serial@02020000 {
188				compatible = "fsl,imx6q-uart";
189				reg = <0x02020000 0x4000>;
190				interrupt-parent = <&gic>; 
191				interrupts = <58>;
192				clock-frequency = <80000000>;
193				status = "disabled";
194			};
195
196			uart2: serial@021e8000 {
197				compatible = "fsl,imx6q-uart";
198				reg = <0x021e8000 0x4000>;
199				interrupt-parent = <&gic>; 
200				interrupts = <59>;
201				clock-frequency = <80000000>;
202				status = "disabled";
203			};
204
205			uart3: serial@021ec000 {
206				compatible = "fsl,imx6q-uart";
207				reg = <0x021ec000 0x4000>;
208				interrupt-parent = <&gic>; 
209				interrupts = <60>;
210				clock-frequency = <80000000>;
211				status = "disabled";
212			};
213
214			uart4: serial@021f0000 {
215				compatible = "fsl,imx6q-uart";
216				reg = <0x021f0000 0x4000>;
217				interrupt-parent = <&gic>; 
218				interrupts = <61>;
219				clock-frequency = <80000000>;
220				status = "disabled";
221			};
222
223			uart5: serial@021f4000 {
224				compatible = "fsl,imx6q-uart";
225				reg = <0x021f4000 0x4000>;
226				interrupt-parent = <&gic>; 
227				interrupts = <62>;
228				clock-frequency = <80000000>;
229				status = "disabled";
230			};
231
232			usbphy1: usbphy@020c9000 {
233				compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
234				reg = <0x020c9000 0x1000>;
235				interrupts = <44>;
236				status = "disabled";
237			};
238			
239			usbphy2: usbphy@020ca000 {
240				compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
241				reg = <0x020ca000 0x1000>;
242				interrupts = <45>;
243				status = "disabled";
244			};
245			
246		};
247
248		aips@02100000 { /* AIPS2 */
249			compatible = "fsl,aips-bus", "simple-bus";
250			#address-cells = <1>;
251			#size-cells = <1>;
252			interrupt-parent = <&gic>;
253			reg = <0x02100000 0x00100000>;
254			ranges;
255
256			fec1: ethernet@02188000 {
257				compatible = "fsl,imx6q-fec";
258				reg = <0x02188000 0x4000>;
259				interrupts = <150 151>;
260				status = "disabled";
261			};
262			
263			usbotg1: usb@02184000 {
264				compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
265				reg = <0x02184000 0x200>;
266				interrupts = <75>;
267				fsl,usbphy = <&usbphy1>;
268				fsl,usbmisc = <&usbmisc 0>;
269				status = "disabled";
270			};
271			
272			usbh1: usb@02184200 {
273				compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
274				reg = <0x02184200 0x200>;
275				interrupts = <72>;
276				fsl,usbphy = <&usbphy2>;
277				fsl,usbmisc = <&usbmisc 1>;
278				status = "disabled";
279			};
280			
281			usbh2: usb@02184400 {
282				compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
283				reg = <0x02184400 0x200>;
284				interrupts = <73>;
285				fsl,usbmisc = <&usbmisc 2>;
286				status = "disabled";
287			};
288			
289			usbh3: usb@02184600 {
290				compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
291				reg = <0x02184600 0x200>;
292				interrupts = <74>;
293				fsl,usbmisc = <&usbmisc 3>;
294				status = "disabled";
295			};
296			
297			usbmisc: usbmisc@02184800 {
298				#index-cells = <1>;
299				compatible = "fsl,imx6q-usbmisc";
300				reg = <0x02184800 0x200>;
301				// Not disabled on purpose.
302			};
303
304			usdhc1: usdhc@02190000 {
305				compatible = "fsl,imx6q-usdhc";
306				reg = <0x02190000 0x4000>;
307				interrupt-parent = <&gic>;
308				interrupts = <54>;
309				cd-gpios = <&gpio1 2 0>;
310				bus-width = <0x4>;
311				status ="disabled";
312			};
313
314			usdhc2: usdhc@02194000 {
315				compatible = "fsl,imx6q-usdhc";
316				reg = <0x02194000 0x4000>;
317				interrupt-parent = <&gic>;
318				interrupts = <55>;
319				non-removable;
320				bus-width = <0x4>;
321				status ="disabled";
322			};
323
324			usdhc3: usdhc@02198000 {
325				compatible = "fsl,imx6q-usdhc";
326				reg = <0x02198000 0x4000>;
327				interrupt-parent = <&gic>;
328				interrupts = <56>;
329				cd-gpios = <&gpio3 9 0>;
330				bus-width = <0x4>;
331				status ="disabled";
332			};
333
334			usdhc4: usdhc@0219c000 {
335				compatible = "fsl,imx6q-usdhc";
336				reg = <0x0219c000 0x4000>;
337				interrupt-parent = <&gic>;
338				interrupts = <57>;
339				bus-width = <0x4>;
340				status ="disabled";
341			};
342
343			ocotp0: ocotp@021bc000 {
344				compatible = "fsl,imx6q-ocotp";
345				reg = <0x021bc000 0x4000>;
346			};
347		};
348	};
349};
350