am335x.dtsi revision 273622
1/*-
2 * Copyright (c) 2012 Damjan Marion <dmarion@Freebsd.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 * 
26 * $FreeBSD: stable/10/sys/boot/fdt/dts/arm/am335x.dtsi 273622 2014-10-25 02:00:32Z rpaulo $
27 */
28
29/ {
30	#address-cells = <1>;
31	#size-cells = <1>;
32
33	interrupt-parent = <&AINTC>;
34
35	SOC: am335x {
36		#address-cells = <1>;
37		#size-cells = <1>;
38		compatible = "simple-bus";
39		ranges;
40		bus-frequency = <0>;
41
42		AINTC: interrupt-controller@48200000 {
43			compatible = "ti,aintc";
44			interrupt-controller;
45			#address-cells = <0>;
46			#interrupt-cells = <1>;
47			reg =	< 0x48200000 0x1000 >;
48		};
49
50		scm@44e10000 {
51			compatible = "ti,scm";
52			reg =	< 0x44e10000 0x2000 >;
53		};
54
55		prcm@44E00000 {
56			compatible = "am335x,prcm";
57			#address-cells = <1>;
58			#size-cells = <1>;
59			reg = < 0x44E00000 0x1300 >;
60		};
61
62		dmtimers@44E05000 {
63			compatible = "ti,am335x-dmtimer";
64			#address-cells = <1>;
65			#size-cells = <1>;
66			reg =	< 0x44E05000 0x1000
67				  0x44E31000 0x1000
68				  0x48040000 0x1000
69				  0x48042000 0x1000
70				  0x48044000 0x1000
71				  0x48046000 0x1000
72				  0x48048000 0x1000
73				  0x4804A000 0x1000 >;
74			interrupts = < 66 67 68 69 92 93 94 95 >;
75			interrupt-parent = <&AINTC>;
76		};
77
78		adc0: adc@44E0D000 {
79			compatible = "ti,adc";
80			reg = <0x44E0D000 0x2000>;
81			interrupts = < 16 >;
82			interrupt-parent = <&AINTC>;
83 		};
84
85		wdt1@44E35000 {
86			compatible = "ti,wdt";
87			reg = <0x44E35000 0x1000>;
88			interrupts = <91>;
89			interrupt-parent = <&AINTC>;
90		};
91 		
92		GPIO: gpio {
93			#gpio-cells = <3>;
94			compatible = "ti,gpio";
95			gpio-controller;
96			reg =<	0x44E07000 0x1000
97				0x4804C000 0x1000
98				0x481AC000 0x1000
99				0x481AE000 0x1000 >;
100			interrupts = < 96 97 98 99 32 33 62 63 >;
101			interrupt-parent = <&AINTC>;
102		};
103
104		uart0: serial@44E09000 {
105			compatible = "ti,ns16550";
106			reg = <0x44E09000 0x1000>;
107			reg-shift = <2>;
108			interrupts = < 72 >;
109			interrupt-parent = <&AINTC>;
110 			clock-frequency = < 48000000 >;
111			uart-device-id = < 0 >;
112 		};
113 		
114 		uart1: serial@48022000 {
115 			compatible = "ti,ns16550";
116 			reg = <0x48022000 0x1000>;
117 			reg-shift = <2>;
118 			interrupts = < 73 >;
119 			interrupt-parent = <&AINTC>;
120 			clock-frequency = < 48000000 >; 
121			uart-device-id = < 1 >;
122			status = "disabled";
123 		};
124 		
125 		uart2: serial@48024000 {
126 			compatible = "ti,ns16550";
127 			reg = <0x48024000 0x1000>;
128 			reg-shift = <2>;
129 			interrupts = < 74 >;
130 			interrupt-parent = <&AINTC>;
131 			clock-frequency = < 48000000 >; 
132			uart-device-id = < 2 >;
133			status = "disabled";
134 		};
135 		
136 		uart3: serial@481a6000 {
137 			compatible = "ti,ns16550";
138 			reg = <0x481A6000 0x1000>;
139 			reg-shift = <2>;
140 			interrupts = < 44 >;
141 			interrupt-parent = <&AINTC>;
142 			clock-frequency = < 48000000 >; 
143			uart-device-id = < 3 >;
144			status = "disabled";
145 		};
146 
147 		uart4: serial@481a8000 {
148 			compatible = "ti,ns16550";
149 			reg = <0x481A8000 0x1000>;
150 			reg-shift = <2>;
151 			interrupts = < 45 >;
152 			interrupt-parent = <&AINTC>;
153 			clock-frequency = < 48000000 >; 
154			uart-device-id = < 4 >;
155			status = "disabled";
156 		};
157 
158 		uart5: serial@481aa000 {
159 			compatible = "ti,ns16550";
160 			reg = <0x481AA000 0x1000>;
161 			reg-shift = <2>;
162 			interrupts = < 46 >;
163 			interrupt-parent = <&AINTC>;
164 			clock-frequency = < 48000000 >; 
165			uart-device-id = < 5 >;
166			status = "disabled";
167  		};
168
169		edma3@49000000 {
170			compatible = "ti,edma3";
171			reg =<	0x49000000 0x100000	/* Channel Controller Regs */
172				0x49800000 0x100000	/* Transfer Controller 0 Regs */
173				0x49900000 0x100000	/* Transfer Controller 1 Regs */
174				0x49a00000 0x100000 >;	/* Transfer Controller 2 Regs */
175			interrupts = <12 13 14>;
176			interrupt-parent = <&AINTC>;
177		};
178
179		mmchs0@48060000 {
180			compatible = "ti,omap3-hsmmc", "ti,mmchs";
181			reg =<0x48060000 0x1000 >;
182			interrupts = <64>;
183			interrupt-parent = <&AINTC>;
184			mmchs-device-id = <0>;
185			mmchs-wp-gpio-pin = <0xffffffff>;
186			ti,dual-volt;
187		};
188
189		mmchs1@481D8000 {
190			compatible = "ti,omap3-hsmmc", "ti,mmchs";
191			reg =<0x481D8000 0x1000 >;
192			interrupts = <28>;
193			interrupt-parent = <&AINTC>;
194			mmchs-device-id = <1>;
195			mmchs-wp-gpio-pin = <0xffffffff>;
196			status = "disabled";
197		};
198
199		enet0: ethernet@4A100000 {
200			#address-cells = <1>;
201			#size-cells = <1>;
202			compatible = "ti,cpsw";
203			reg = <0x4A100000 0x4000>;
204			interrupts = <40 41 42 43>;
205			interrupt-parent = <&AINTC>;
206			phy-handle = <&phy0>;
207			mdio@0 {
208				#address-cells = <1>;
209				#size-cells = <0>;
210				compatible = "ti,cpsw-mdio";
211				phy0: ethernet-phy@0 {
212					reg = <0x0>;
213				};
214			};
215		};
216
217		i2c0: i2c@44e0b000 {
218			#address-cells = <1>;
219			#size-cells = <0>;
220			compatible = "ti,i2c";
221			reg =<	0x44e0b000 0x1000 >;
222			interrupts = <70>;
223			interrupt-parent = <&AINTC>;
224			i2c-device-id = <0>;
225		};
226
227		i2c1: i2c@4802a000 {
228			#address-cells = <1>;
229			#size-cells = <0>;
230			compatible = "ti,i2c";
231			reg =<  0x4802a000 0x1000 >;
232			interrupts = <71>;
233			interrupt-parent = <&AINTC>;
234			i2c-device-id = <1>;
235		};
236
237		i2c2: i2c@4819c000 {
238			#address-cells = <1>;
239			#size-cells = <0>;
240			compatible = "ti,i2c";
241			reg =<  0x4819c000 0x1000 >;
242			interrupts = <30>;
243			interrupt-parent = <&AINTC>;
244			i2c-device-id = <2>;
245		};
246
247		pwm@48300000 {
248			compatible = "ti,am335x-pwm";
249			#address-cells = <1>;
250			#size-cells = <1>;
251			reg = < 0x48300000 0x100	/* PWMSS0 */
252				0x48300100 0x80		/* eCAP0 */
253				0x48300180 0x80		/* eQEP0 */
254				0x48300200 0x60		/* ePWM0 */
255			>;
256			interrupts = <86 58>; /* ePWM0INT, ePWM0_TZINT */
257			interrupt-parent = <&AINTC>;
258			pwm-device-id = <0>;
259		};
260
261		pwm@48302000 {
262			compatible = "ti,am335x-pwm";
263			#address-cells = <1>;
264			#size-cells = <1>;
265			reg = < 0x48302000 0x100	/* PWMSS1 */
266				0x48302100 0x80		/* eCAP1 */
267				0x48302180 0x80		/* eQEP1 */
268				0x48302200 0x60		/* ePWM1 */
269			>;
270			interrupts = <87 59>; /* ePWM1INT, ePWM1_TZINT */
271			interrupt-parent = <&AINTC>;
272			pwm-device-id = <1>;
273		};
274
275		pwm@48304000 {
276			compatible = "ti,am335x-pwm";
277			#address-cells = <1>;
278			#size-cells = <1>;
279			reg = < 0x48304000 0x100	/* PWMSS2 */
280				0x48304100 0x80		/* eCAP2 */
281				0x48304180 0x80		/* eQEP2 */
282				0x48304200 0x60		/* ePWM2 */
283			>;
284			interrupts = <88 60>; /* ePWM2INT, ePWM2_TZINT */
285			interrupt-parent = <&AINTC>;
286			pwm-device-id = <2>;
287		};
288
289		lcd: lcd@4830e000 {
290			#address-cells = <1>;
291			#size-cells = <0>;
292			compatible = "ti,am335x-lcd";
293			reg =<	0x4830e000 0x1000 >;
294			interrupts = <36>;
295			interrupt-parent = <&AINTC>;
296		};
297
298 		usb@47400000 {
299 			#address-cells = <1>;
300 			#size-cells = <0>;
301 			compatible = "ti,musb-am33xx";
302 			reg =<	0x47400000 0x1000	/* USBSS */
303 				0x47401000 0x300	/* USB0 */
304 				0x47401300 0x100 	/* USB0_PHY */
305 				0x47401400 0x400 	/* USB0_CORE */
306 				0x47401800 0x300 	/* USB1 */
307 				0x47401B00 0x100 	/* USB1_PHY */
308 				0x47401C00 0x400 	/* USB1_CORE */
309 			>;
310 			interrupts = <17 18 19>;
311 			interrupt-parent = <&AINTC>;
312 			/* 1 - Host Mode, 0 - Device Mode */
313 			modemask = <2>;
314 		};
315
316		mbox0@480C8000 {
317			compatible = "am335x,system-mbox";
318			reg = < 0x480C8000 0x1000 >;
319			interrupts = <77>;
320			interrupt-parent = <&AINTC>;
321		};
322
323		spinlock0@480CA000 {
324			compatible = "am335x,spinlock";
325			reg = < 0x480CA000 0x1000 >;
326		};
327
328		pruss@4A300000 {
329			compatible = "ti,pruss-v2";
330			reg = <0x4A300000 0x80000>;
331 			interrupt-parent = <&AINTC>;
332			interrupts = <20 21 22 23 24 25 26 27>;
333		};
334	};
335};
336