tzic.c revision 266000 
1/*-
2 * Copyright (c) 2012, 2013 The FreeBSD Foundation
3 * All rights reserved.
4 *
5 * This software was developed by Oleksandr Rybalko under sponsorship
6 * from the FreeBSD Foundation.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1.	Redistributions of source code must retain the above copyright
12 *	notice, this list of conditions and the following disclaimer.
13 * 2.	Redistributions in binary form must reproduce the above copyright
14 *	notice, this list of conditions and the following disclaimer in the
15 *	documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30#include <sys/cdefs.h>
31__FBSDID("$FreeBSD: stable/10/sys/arm/freescale/imx/tzic.c 266000 2014-05-14 01:53:20Z ian $");
32
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/bus.h>
36#include <sys/kernel.h>
37#include <sys/ktr.h>
38#include <sys/module.h>
39#include <sys/rman.h>
40#include <sys/pcpu.h>
41#include <sys/proc.h>
42#include <sys/cpuset.h>
43#include <sys/lock.h>
44#include <sys/mutex.h>
45#include <machine/bus.h>
46#include <machine/intr.h>
47
48#include <dev/fdt/fdt_common.h>
49#include <dev/ofw/openfirm.h>
50#include <dev/ofw/ofw_bus.h>
51#include <dev/ofw/ofw_bus_subr.h>
52
53#include <arm/freescale/imx/imx51_tzicreg.h>
54
55struct tzic_softc {
56	struct resource *	tzic_res[3];
57	bus_space_tag_t		tzic_bst;
58	bus_space_handle_t	tzic_bsh;
59	uint8_t			ver;
60};
61
62static struct resource_spec tzic_spec[] = {
63	{ SYS_RES_MEMORY,	0,	RF_ACTIVE },
64	{ -1, 0 }
65};
66
67static struct tzic_softc *tzic_sc = NULL;
68
69#define	tzic_read_4(reg)		\
70    bus_space_read_4(tzic_sc->tzic_bst, tzic_sc->tzic_bsh, reg)
71#define	tzic_write_4(reg, val)		\
72    bus_space_write_4(tzic_sc->tzic_bst, tzic_sc->tzic_bsh, reg, val)
73
74static void tzic_post_filter(void *);
75
76static int
77tzic_probe(device_t dev)
78{
79	if (ofw_bus_is_compatible(dev, "fsl,tzic")) {
80		device_set_desc(dev, "TrustZone Interrupt Controller");
81		return (BUS_PROBE_DEFAULT);
82	}
83	return (ENXIO);
84}
85
86static int
87tzic_attach(device_t dev)
88{
89	struct		tzic_softc *sc = device_get_softc(dev);
90	int		i;
91	uint32_t	reg;
92
93	if (tzic_sc)
94		return (ENXIO);
95
96	if (bus_alloc_resources(dev, tzic_spec, sc->tzic_res)) {
97		device_printf(dev, "could not allocate resources\n");
98		return (ENXIO);
99	}
100
101	arm_post_filter = tzic_post_filter;
102
103	/* Distributor Interface */
104	sc->tzic_bst = rman_get_bustag(sc->tzic_res[0]);
105	sc->tzic_bsh = rman_get_bushandle(sc->tzic_res[0]);
106
107	tzic_sc = sc;
108
109	reg = tzic_read_4(TZIC_INTCNTL);
110	tzic_write_4(TZIC_INTCNTL, INTCNTL_NSEN_MASK|INTCNTL_NSEN|INTCNTL_EN);
111	reg = tzic_read_4(TZIC_INTCNTL);
112	tzic_write_4(TZIC_PRIOMASK, 0x1f);
113	reg = tzic_read_4(TZIC_PRIOMASK);
114
115	tzic_write_4(TZIC_SYNCCTRL, 0x02);
116	reg = tzic_read_4(TZIC_SYNCCTRL);
117
118	/* route all interrupts to IRQ.  secure interrupts are for FIQ */
119	for (i = 0; i < 4; i++)
120		tzic_write_4(TZIC_INTSEC(i), 0xffffffff);
121
122	/* disable all interrupts */
123	for (i = 0; i < 4; i++)
124		tzic_write_4(TZIC_ENCLEAR(i), 0xffffffff);
125
126	return (0);
127}
128
129static device_method_t tzic_methods[] = {
130	DEVMETHOD(device_probe,		tzic_probe),
131	DEVMETHOD(device_attach,	tzic_attach),
132	{ 0, 0 }
133};
134
135static driver_t tzic_driver = {
136	"tzic",
137	tzic_methods,
138	sizeof(struct tzic_softc),
139};
140
141static devclass_t tzic_devclass;
142
143/*
144 * Memory space of controller located outside of device range, so let him to
145 * attach not only to simplebus, but nexus also.
146 */
147EARLY_DRIVER_MODULE(tzic, nexus, tzic_driver, tzic_devclass, 0, 0,
148    BUS_PASS_INTERRUPT);
149EARLY_DRIVER_MODULE(tzic, simplebus, tzic_driver, tzic_devclass, 0, 0,
150    BUS_PASS_INTERRUPT);
151
152static void
153tzic_post_filter(void *arg)
154{
155
156}
157
158int
159arm_get_next_irq(int last_irq)
160{
161	uint32_t pending;
162	int i, b;
163
164	for (i = 0; i < 4; i++) {
165		pending = tzic_read_4(TZIC_PND(i));
166		for (b = 0; pending != 0 && b < 32; b++)
167			if (pending & (1 << b)) {
168				return (i * 32 + b);
169			}
170	}
171
172	return (-1);
173}
174
175void
176arm_mask_irq(uintptr_t nb)
177{
178
179	tzic_write_4(TZIC_ENCLEAR(nb / 32), (1UL <<(nb % 32)));
180}
181
182void
183arm_unmask_irq(uintptr_t nb)
184{
185
186	tzic_write_4(TZIC_ENSET(nb / 32), (1UL <<(nb % 32)));
187}
188