imx6_machdep.c revision 266348
1159248Srwatson/*- 2159248Srwatson * Copyright (c) 2013 Ian Lepore <ian@freebsd.org> 3159248Srwatson * All rights reserved. 4159248Srwatson * 5159248Srwatson * Redistribution and use in source and binary forms, with or without 6159248Srwatson * modification, are permitted provided that the following conditions 7159248Srwatson * are met: 8159248Srwatson * 1. Redistributions of source code must retain the above copyright 9159248Srwatson * notice, this list of conditions and the following disclaimer. 10159248Srwatson * 2. Redistributions in binary form must reproduce the above copyright 11159248Srwatson * notice, this list of conditions and the following disclaimer in the 12159248Srwatson * documentation and/or other materials provided with the distribution. 13159248Srwatson * 14159248Srwatson * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15159248Srwatson * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16159248Srwatson * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17159248Srwatson * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18159248Srwatson * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19159248Srwatson * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20159248Srwatson * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21159248Srwatson * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22159248Srwatson * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23159248Srwatson * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24159248Srwatson * SUCH DAMAGE. 25159248Srwatson */ 26159248Srwatson 27159248Srwatson#include "opt_platform.h" 28161630Srwatson 29159248Srwatson#include <sys/cdefs.h> 30159248Srwatson__FBSDID("$FreeBSD: stable/10/sys/arm/freescale/imx/imx6_machdep.c 266348 2014-05-17 20:22:22Z ian $"); 31159248Srwatson 32159248Srwatson#include <sys/param.h> 33159248Srwatson#include <sys/systm.h> 34159248Srwatson#include <sys/bus.h> 35159248Srwatson#include <sys/reboot.h> 36159248Srwatson 37159248Srwatson#include <vm/vm.h> 38159248Srwatson 39159248Srwatson#include <machine/bus.h> 40159248Srwatson#include <machine/devmap.h> 41159248Srwatson#include <machine/machdep.h> 42159248Srwatson 43159248Srwatson#include <arm/arm/mpcore_timervar.h> 44159248Srwatson#include <arm/freescale/imx/imx6_anatopreg.h> 45159248Srwatson#include <arm/freescale/imx/imx6_anatopvar.h> 46159248Srwatson#include <arm/freescale/imx/imx_machdep.h> 47159248Srwatson 48159248Srwatsonvm_offset_t 49159248Srwatsoninitarm_lastaddr(void) 50159248Srwatson{ 51159248Srwatson 52159248Srwatson return (arm_devmap_lastaddr()); 53159248Srwatson} 54159248Srwatson 55159248Srwatsonvoid 56161630Srwatsoninitarm_early_init(void) 57159248Srwatson{ 58159248Srwatson 59159248Srwatson /* Inform the MPCore timer driver that its clock is variable. */ 60161630Srwatson arm_tmr_change_frequency(ARM_TMR_FREQUENCY_VARIES); 61159248Srwatson} 62159248Srwatson 63159248Srwatsonvoid 64159248Srwatsoninitarm_gpio_init(void) 65159248Srwatson{ 66159248Srwatson 67159248Srwatson} 68159248Srwatson 69159248Srwatsonvoid 70159248Srwatsoninitarm_late_init(void) 71159248Srwatson{ 72159248Srwatson 73159248Srwatson} 74159248Srwatson 75159248Srwatson/* 76159248Srwatson * Set up static device mappings. 77159248Srwatson * 78159248Srwatson * This attempts to cover the most-used devices with 1MB section mappings, which 79159248Srwatson * is good for performance (uses fewer TLB entries for device access). 80 * 81 * ARMMP covers the interrupt controller, MPCore timers, global timer, and the 82 * L2 cache controller. Most of the 1MB range is unused reserved space. 83 * 84 * AIPS1/AIPS2 cover most of the on-chip devices such as uart, spi, i2c, etc. 85 * 86 * Notably not mapped right now are HDMI, GPU, and other devices below ARMMP in 87 * the memory map. When we get support for graphics it might make sense to 88 * static map some of that area. Be careful with other things in that area such 89 * as OCRAM that probably shouldn't be mapped as PTE_DEVICE memory. 90 */ 91int 92initarm_devmap_init(void) 93{ 94 const uint32_t IMX6_ARMMP_PHYS = 0x00a00000; 95 const uint32_t IMX6_ARMMP_SIZE = 0x00100000; 96 const uint32_t IMX6_AIPS1_PHYS = 0x02000000; 97 const uint32_t IMX6_AIPS1_SIZE = 0x00100000; 98 const uint32_t IMX6_AIPS2_PHYS = 0x02100000; 99 const uint32_t IMX6_AIPS2_SIZE = 0x00100000; 100 101 arm_devmap_add_entry(IMX6_ARMMP_PHYS, IMX6_ARMMP_SIZE); 102 arm_devmap_add_entry(IMX6_AIPS1_PHYS, IMX6_AIPS1_SIZE); 103 arm_devmap_add_entry(IMX6_AIPS2_PHYS, IMX6_AIPS2_SIZE); 104 105 return (0); 106} 107 108void 109cpu_reset(void) 110{ 111 const uint32_t IMX6_WDOG_CR_PHYS = 0x020bc000; 112 113 imx_wdog_cpu_reset(IMX6_WDOG_CR_PHYS); 114} 115 116/* 117 * Determine what flavor of imx6 we're running on. 118 * 119 * This code is based on the way u-boot does it. Information found on the web 120 * indicates that Freescale themselves were the original source of this logic, 121 * including the strange check for number of CPUs in the SCU configuration 122 * register, which is apparently needed on some revisions of the SOLO. 123 * 124 * According to the documentation, there is such a thing as an i.MX6 Dual 125 * (non-lite flavor). However, Freescale doesn't seem to have assigned it a 126 * number or provided any logic to handle it in their detection code. 127 * 128 * Note that the ANALOG_DIGPROG and SCU configuration registers are not 129 * documented in the chip reference manual. (SCU configuration is mentioned, 130 * but not mapped out in detail.) I think the bottom two bits of the scu config 131 * register may be ncpu-1. 132 * 133 * This hasn't been tested yet on a dual[-lite]. 134 * 135 * On a solo: 136 * digprog = 0x00610001 137 * hwsoc = 0x00000062 138 * scu config = 0x00000500 139 * On a quad: 140 * digprog = 0x00630002 141 * hwsoc = 0x00000063 142 * scu config = 0x00005503 143 */ 144u_int imx_soc_type() 145{ 146 uint32_t digprog, hwsoc; 147 uint32_t *pcr; 148 const vm_offset_t SCU_CONFIG_PHYSADDR = 0x00a00004; 149#define HWSOC_MX6SL 0x60 150#define HWSOC_MX6DL 0x61 151#define HWSOC_MX6SOLO 0x62 152#define HWSOC_MX6Q 0x63 153 154 digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG_SL); 155 hwsoc = (digprog >> IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT) & 156 IMX6_ANALOG_DIGPROG_SOCTYPE_MASK; 157 158 if (hwsoc != HWSOC_MX6SL) { 159 digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG); 160 hwsoc = (digprog & IMX6_ANALOG_DIGPROG_SOCTYPE_MASK) >> 161 IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT; 162 /*printf("digprog = 0x%08x\n", digprog);*/ 163 if (hwsoc == HWSOC_MX6DL) { 164 pcr = arm_devmap_ptov(SCU_CONFIG_PHYSADDR, 4); 165 if (pcr != NULL) { 166 /*printf("scu config = 0x%08x\n", *pcr);*/ 167 if ((*pcr & 0x03) == 0) { 168 hwsoc = HWSOC_MX6SOLO; 169 } 170 } 171 } 172 } 173 /* printf("hwsoc 0x%08x\n", hwsoc); */ 174 175 switch (hwsoc) { 176 case HWSOC_MX6SL: 177 return (IMXSOC_6SL); 178 case HWSOC_MX6SOLO: 179 return (IMXSOC_6S); 180 case HWSOC_MX6DL: 181 return (IMXSOC_6DL); 182 case HWSOC_MX6Q : 183 return (IMXSOC_6Q); 184 default: 185 printf("imx_soc_type: Don't understand hwsoc 0x%02x, " 186 "digprog 0x%08x; assuming IMXSOC_6Q\n", hwsoc, digprog); 187 break; 188 } 189 190 return (IMXSOC_6Q); 191} 192 193/* 194 * Early putc routine for EARLY_PRINTF support. To use, add to kernel config: 195 * option SOCDEV_PA=0x02000000 196 * option SOCDEV_VA=0x02000000 197 * option EARLY_PRINTF 198 * Resist the temptation to change the #if 0 to #ifdef EARLY_PRINTF here. It 199 * makes sense now, but if multiple SOCs do that it will make early_putc another 200 * duplicate symbol to be eliminated on the path to a generic kernel. 201 */ 202#if 0 203static void 204imx6_early_putc(int c) 205{ 206 volatile uint32_t * UART_STAT_REG = (uint32_t *)0x02020098; 207 volatile uint32_t * UART_TX_REG = (uint32_t *)0x02020040; 208 const uint32_t UART_TXRDY = (1 << 3); 209 210 while ((*UART_STAT_REG & UART_TXRDY) == 0) 211 continue; 212 *UART_TX_REG = c; 213} 214early_putc_t *early_putc = imx6_early_putc; 215#endif 216 217