imx6_machdep.c revision 266201
1/*-
2 * Copyright (c) 2013 Ian Lepore <ian@freebsd.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include "opt_platform.h"
28
29#include <sys/cdefs.h>
30__FBSDID("$FreeBSD: stable/10/sys/arm/freescale/imx/imx6_machdep.c 266201 2014-05-15 22:50:06Z ian $");
31
32#include <sys/param.h>
33#include <sys/systm.h>
34#include <sys/bus.h>
35#include <sys/reboot.h>
36
37#include <vm/vm.h>
38
39#include <machine/bus.h>
40#include <machine/devmap.h>
41#include <machine/machdep.h>
42
43#include <arm/freescale/imx/imx6_anatopreg.h>
44#include <arm/freescale/imx/imx6_anatopvar.h>
45#include <arm/freescale/imx/imx_machdep.h>
46
47vm_offset_t
48initarm_lastaddr(void)
49{
50
51	return (arm_devmap_lastaddr());
52}
53
54void
55initarm_early_init(void)
56{
57
58}
59
60void
61initarm_gpio_init(void)
62{
63
64}
65
66void
67initarm_late_init(void)
68{
69
70}
71
72/*
73 * Set up static device mappings.
74 *
75 * This attempts to cover the most-used devices with 1MB section mappings, which
76 * is good for performance (uses fewer TLB entries for device access).
77 *
78 * ARMMP covers the interrupt controller, MPCore timers, global timer, and the
79 * L2 cache controller.  Most of the 1MB range is unused reserved space.
80 *
81 * AIPS1/AIPS2 cover most of the on-chip devices such as uart, spi, i2c, etc.
82 *
83 * Notably not mapped right now are HDMI, GPU, and other devices below ARMMP in
84 * the memory map.  When we get support for graphics it might make sense to
85 * static map some of that area.  Be careful with other things in that area such
86 * as OCRAM that probably shouldn't be mapped as PTE_DEVICE memory.
87 */
88int
89initarm_devmap_init(void)
90{
91	const uint32_t IMX6_ARMMP_PHYS = 0x00a00000;
92	const uint32_t IMX6_ARMMP_SIZE = 0x00100000;
93	const uint32_t IMX6_AIPS1_PHYS = 0x02000000;
94	const uint32_t IMX6_AIPS1_SIZE = 0x00100000;
95	const uint32_t IMX6_AIPS2_PHYS = 0x02100000;
96	const uint32_t IMX6_AIPS2_SIZE = 0x00100000;
97
98	arm_devmap_add_entry(IMX6_ARMMP_PHYS, IMX6_ARMMP_SIZE);
99	arm_devmap_add_entry(IMX6_AIPS1_PHYS, IMX6_AIPS1_SIZE);
100	arm_devmap_add_entry(IMX6_AIPS2_PHYS, IMX6_AIPS2_SIZE);
101
102	return (0);
103}
104
105void
106cpu_reset(void)
107{
108	const uint32_t IMX6_WDOG_CR_PHYS = 0x020bc000;
109
110	imx_wdog_cpu_reset(IMX6_WDOG_CR_PHYS);
111}
112
113/*
114 * Determine what flavor of imx6 we're running on.
115 *
116 * This code is based on the way u-boot does it.  Information found on the web
117 * indicates that Freescale themselves were the original source of this logic,
118 * including the strange check for number of CPUs in the SCU configuration
119 * register, which is apparently needed on some revisions of the SOLO.
120 *
121 * According to the documentation, there is such a thing as an i.MX6 Dual
122 * (non-lite flavor).  However, Freescale doesn't seem to have assigned it a
123 * number or provided any logic to handle it in their detection code.
124 *
125 * Note that the ANALOG_DIGPROG and SCU configuration registers are not
126 * documented in the chip reference manual.  (SCU configuration is mentioned,
127 * but not mapped out in detail.)  I think the bottom two bits of the scu config
128 * register may be ncpu-1.
129 *
130 * This hasn't been tested yet on a dual[-lite].
131 *
132 * On a solo:
133 *      digprog    = 0x00610001
134 *      hwsoc      = 0x00000062
135 *      scu config = 0x00000500
136 * On a quad:
137 *      digprog    = 0x00630002
138 *      hwsoc      = 0x00000063
139 *      scu config = 0x00005503
140 */
141u_int imx_soc_type()
142{
143	uint32_t digprog, hwsoc;
144	uint32_t *pcr;
145	const vm_offset_t SCU_CONFIG_PHYSADDR = 0x00a00004;
146#define	HWSOC_MX6SL	0x60
147#define	HWSOC_MX6DL	0x61
148#define	HWSOC_MX6SOLO	0x62
149#define	HWSOC_MX6Q	0x63
150
151	digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG_SL);
152	hwsoc = (digprog >> IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT) &
153	    IMX6_ANALOG_DIGPROG_SOCTYPE_MASK;
154
155	if (hwsoc != HWSOC_MX6SL) {
156		digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG);
157		hwsoc = (digprog & IMX6_ANALOG_DIGPROG_SOCTYPE_MASK) >>
158		    IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT;
159		/*printf("digprog = 0x%08x\n", digprog);*/
160		if (hwsoc == HWSOC_MX6DL) {
161			pcr = arm_devmap_ptov(SCU_CONFIG_PHYSADDR, 4);
162			if (pcr != NULL) {
163				/*printf("scu config = 0x%08x\n", *pcr);*/
164				if ((*pcr & 0x03) == 0) {
165					hwsoc = HWSOC_MX6SOLO;
166				}
167			}
168		}
169	}
170	/* printf("hwsoc 0x%08x\n", hwsoc); */
171
172	switch (hwsoc) {
173	case HWSOC_MX6SL:
174		return (IMXSOC_6SL);
175	case HWSOC_MX6SOLO:
176		return (IMXSOC_6S);
177	case HWSOC_MX6DL:
178		return (IMXSOC_6DL);
179	case HWSOC_MX6Q :
180		return (IMXSOC_6Q);
181	default:
182		printf("imx_soc_type: Don't understand hwsoc 0x%02x, "
183		    "digprog 0x%08x; assuming IMXSOC_6Q\n", hwsoc, digprog);
184		break;
185	}
186
187	return (IMXSOC_6Q);
188}
189
190/*
191 * Early putc routine for EARLY_PRINTF support.  To use, add to kernel config:
192 *   option SOCDEV_PA=0x02000000
193 *   option SOCDEV_VA=0x02000000
194 *   option EARLY_PRINTF
195 * Resist the temptation to change the #if 0 to #ifdef EARLY_PRINTF here. It
196 * makes sense now, but if multiple SOCs do that it will make early_putc another
197 * duplicate symbol to be eliminated on the path to a generic kernel.
198 */
199#if 0
200static void
201imx6_early_putc(int c)
202{
203	volatile uint32_t * UART_STAT_REG = (uint32_t *)0x02020098;
204	volatile uint32_t * UART_TX_REG   = (uint32_t *)0x02020040;
205	const uint32_t      UART_TXRDY    = (1 << 3);
206
207	while ((*UART_STAT_REG & UART_TXRDY) == 0)
208		continue;
209	*UART_TX_REG = c;
210}
211early_putc_t *early_putc = imx6_early_putc;
212#endif
213
214