imx6_machdep.c revision 259355
1/*- 2 * Copyright (c) 2013 Ian Lepore <ian@freebsd.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include "opt_platform.h" 28 29#include <sys/cdefs.h> 30__FBSDID("$FreeBSD: stable/10/sys/arm/freescale/imx/imx6_machdep.c 259355 2013-12-13 22:41:57Z ian $"); 31 32#include <sys/param.h> 33#include <sys/systm.h> 34#include <sys/bus.h> 35#include <sys/reboot.h> 36 37#include <machine/bus.h> 38#include <vm/vm.h> 39#include <vm/pmap.h> 40#include <arm/freescale/imx/imx6_anatopreg.h> 41#include <arm/freescale/imx/imx6_anatopvar.h> 42#include <arm/freescale/imx/imx_machdep.h> 43 44/* 45 * Set up static device mappings. Note that for imx this is called from 46 * initarm_lastaddr() so that it can return the lowest address used for static 47 * device mapping, maximizing kva space. 48 * 49 * This attempts to cover the most-used devices with 1MB section mappings, which 50 * is good for performance (uses fewer TLB entries for device access). 51 * 52 * ARMMP covers the interrupt controller, MPCore timers, global timer, and the 53 * L2 cache controller. Most of the 1MB range is unused reserved space. 54 * 55 * AIPS1/AIPS2 cover most of the on-chip devices such as uart, spi, i2c, etc. 56 * 57 * Notably not mapped right now are HDMI, GPU, and other devices below ARMMP in 58 * the memory map. When we get support for graphics it might make sense to 59 * static map some of that area. Be careful with other things in that area such 60 * as OCRAM that probably shouldn't be mapped as PTE_DEVICE memory. 61 */ 62void 63imx_devmap_init(void) 64{ 65 const uint32_t IMX6_ARMMP_PHYS = 0x00a00000; 66 const uint32_t IMX6_ARMMP_SIZE = 0x00100000; 67 const uint32_t IMX6_AIPS1_PHYS = 0x02000000; 68 const uint32_t IMX6_AIPS1_SIZE = 0x00100000; 69 const uint32_t IMX6_AIPS2_PHYS = 0x02100000; 70 const uint32_t IMX6_AIPS2_SIZE = 0x00100000; 71 72 imx_devmap_addentry(IMX6_ARMMP_PHYS, IMX6_ARMMP_SIZE); 73 imx_devmap_addentry(IMX6_AIPS1_PHYS, IMX6_AIPS1_SIZE); 74 imx_devmap_addentry(IMX6_AIPS2_PHYS, IMX6_AIPS2_SIZE); 75} 76 77void 78cpu_reset(void) 79{ 80 const uint32_t IMX6_WDOG_CR_PHYS = 0x020bc000; 81 82 imx_wdog_cpu_reset(IMX6_WDOG_CR_PHYS); 83} 84 85/* 86 * Determine what flavor of imx6 we're running on. 87 * 88 * This code is based on the way u-boot does it. Information found on the web 89 * indicates that Freescale themselves were the original source of this logic, 90 * including the strange check for number of CPUs in the SCU configuration 91 * register, which is apparently needed on some revisions of the SOLO. 92 * 93 * According to the documentation, there is such a thing as an i.MX6 Dual 94 * (non-lite flavor). However, Freescale doesn't seem to have assigned it a 95 * number or provided any logic to handle it in their detection code. 96 * 97 * Note that the ANALOG_DIGPROG and SCU configuration registers are not 98 * documented in the chip reference manual. (SCU configuration is mentioned, 99 * but not mapped out in detail.) I think the bottom two bits of the scu config 100 * register may be ncpu-1. 101 * 102 * This hasn't been tested yet on a dual[-lite]. 103 * 104 * On a solo: 105 * digprog = 0x00610001 106 * hwsoc = 0x00000062 107 * scu config = 0x00000500 108 * On a quad: 109 * digprog = 0x00630002 110 * hwsoc = 0x00000063 111 * scu config = 0x00005503 112 */ 113u_int imx_soc_type() 114{ 115 const struct pmap_devmap *pd; 116 uint32_t digprog, hwsoc; 117 uint32_t *pcr; 118 const uint32_t HWSOC_MX6SL = 0x60; 119 const uint32_t HWSOC_MX6DL = 0x61; 120 const uint32_t HWSOC_MX6SOLO = 0x62; 121 const uint32_t HWSOC_MX6Q = 0x63; 122 const vm_offset_t SCU_CONFIG_PHYSADDR = 0x00a00004; 123 124 digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG_SL); 125 hwsoc = (digprog >> IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT) & 126 IMX6_ANALOG_DIGPROG_SOCTYPE_MASK; 127 128 if (hwsoc != HWSOC_MX6SL) { 129 digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG); 130 hwsoc = (digprog & IMX6_ANALOG_DIGPROG_SOCTYPE_MASK) >> 131 IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT; 132 /*printf("digprog = 0x%08x\n", digprog);*/ 133 if (hwsoc == HWSOC_MX6DL) { 134 pd = pmap_devmap_find_pa(SCU_CONFIG_PHYSADDR, 4); 135 if (pd != NULL) { 136 pcr = (uint32_t *)(pd->pd_va + 137 (SCU_CONFIG_PHYSADDR - pd->pd_pa)); 138 /*printf("scu config = 0x%08x\n", *pcr);*/ 139 if ((*pcr & 0x03) == 0) { 140 hwsoc = HWSOC_MX6SOLO; 141 } 142 } 143 } 144 } 145 /* printf("hwsoc 0x%08x\n", hwsoc); */ 146 147 switch (hwsoc) { 148 case HWSOC_MX6SL: 149 return (IMXSOC_6SL); 150 case HWSOC_MX6SOLO: 151 return (IMXSOC_6S); 152 case HWSOC_MX6DL: 153 return (IMXSOC_6DL); 154 case HWSOC_MX6Q : 155 return (IMXSOC_6Q); 156 default: 157 printf("imx_soc_type: Don't understand hwsoc 0x%02x, " 158 "digprog 0x%08x; assuming IMXSOC_6Q\n", hwsoc, digprog); 159 break; 160 } 161 162 return (IMXSOC_6Q); 163} 164 165