machdep.c revision 294683
1/*	$NetBSD: arm32_machdep.c,v 1.44 2004/03/24 15:34:47 atatat Exp $	*/
2
3/*-
4 * Copyright (c) 2004 Olivier Houchard
5 * Copyright (c) 1994-1998 Mark Brinicombe.
6 * Copyright (c) 1994 Brini.
7 * All rights reserved.
8 *
9 * This code is derived from software written for Brini by Mark Brinicombe
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 *    notice, this list of conditions and the following disclaimer in the
18 *    documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 *    must display the following acknowledgement:
21 *	This product includes software developed by Mark Brinicombe
22 *	for the NetBSD Project.
23 * 4. The name of the company nor the name of the author may be used to
24 *    endorse or promote products derived from this software without specific
25 *    prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
28 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
29 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
30 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
31 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
32 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
33 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * SUCH DAMAGE.
38 *
39 * Machine dependant functions for kernel setup
40 *
41 * Created      : 17/09/94
42 * Updated	: 18/04/01 updated for new wscons
43 */
44
45#include "opt_compat.h"
46#include "opt_ddb.h"
47#include "opt_platform.h"
48#include "opt_sched.h"
49#include "opt_timer.h"
50
51#include <sys/cdefs.h>
52__FBSDID("$FreeBSD: stable/10/sys/arm/arm/machdep.c 294683 2016-01-24 21:04:06Z ian $");
53
54#include <sys/param.h>
55#include <sys/proc.h>
56#include <sys/systm.h>
57#include <sys/bio.h>
58#include <sys/buf.h>
59#include <sys/bus.h>
60#include <sys/cons.h>
61#include <sys/cpu.h>
62#include <sys/exec.h>
63#include <sys/imgact.h>
64#include <sys/kdb.h>
65#include <sys/kernel.h>
66#include <sys/ktr.h>
67#include <sys/linker.h>
68#include <sys/lock.h>
69#include <sys/malloc.h>
70#include <sys/msgbuf.h>
71#include <sys/mutex.h>
72#include <sys/pcpu.h>
73#include <sys/ptrace.h>
74#include <sys/rwlock.h>
75#include <sys/sched.h>
76#include <sys/signalvar.h>
77#include <sys/syscallsubr.h>
78#include <sys/sysctl.h>
79#include <sys/sysent.h>
80#include <sys/sysproto.h>
81#include <sys/uio.h>
82
83#include <vm/vm.h>
84#include <vm/pmap.h>
85#include <vm/vm_map.h>
86#include <vm/vm_object.h>
87#include <vm/vm_page.h>
88#include <vm/vm_pager.h>
89
90#include <machine/armreg.h>
91#include <machine/atags.h>
92#include <machine/cpu.h>
93#include <machine/cpuinfo.h>
94#include <machine/devmap.h>
95#include <machine/frame.h>
96#include <machine/intr.h>
97#include <machine/machdep.h>
98#include <machine/md_var.h>
99#include <machine/metadata.h>
100#include <machine/pcb.h>
101#include <machine/physmem.h>
102#include <machine/reg.h>
103#include <machine/trap.h>
104#include <machine/undefined.h>
105#include <machine/vfp.h>
106#include <machine/vmparam.h>
107#include <machine/sysarch.h>
108
109#ifdef FDT
110#include <dev/fdt/fdt_common.h>
111#include <dev/ofw/openfirm.h>
112#endif
113
114#ifdef DEBUG
115#define	debugf(fmt, args...) printf(fmt, ##args)
116#else
117#define	debugf(fmt, args...)
118#endif
119
120struct pcpu __pcpu[MAXCPU];
121struct pcpu *pcpup = &__pcpu[0];
122
123static struct trapframe proc0_tf;
124uint32_t cpu_reset_address = 0;
125int cold = 1;
126vm_offset_t vector_page;
127
128int (*_arm_memcpy)(void *, void *, int, int) = NULL;
129int (*_arm_bzero)(void *, int, int) = NULL;
130int _min_memcpy_size = 0;
131int _min_bzero_size = 0;
132
133extern int *end;
134#ifdef DDB
135extern vm_offset_t ksym_start, ksym_end;
136#endif
137
138#ifdef FDT
139/*
140 * This is the number of L2 page tables required for covering max
141 * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf,
142 * stacks etc.), uprounded to be divisible by 4.
143 */
144#define KERNEL_PT_MAX	78
145
146static struct pv_addr kernel_pt_table[KERNEL_PT_MAX];
147
148vm_paddr_t pmap_pa;
149
150struct pv_addr systempage;
151static struct pv_addr msgbufpv;
152struct pv_addr irqstack;
153struct pv_addr undstack;
154struct pv_addr abtstack;
155static struct pv_addr kernelstack;
156
157#endif
158
159#if defined(LINUX_BOOT_ABI)
160#define LBABI_MAX_BANKS	10
161
162uint32_t board_id;
163struct arm_lbabi_tag *atag_list;
164char linux_command_line[LBABI_MAX_COMMAND_LINE + 1];
165char atags[LBABI_MAX_COMMAND_LINE * 2];
166uint32_t memstart[LBABI_MAX_BANKS];
167uint32_t memsize[LBABI_MAX_BANKS];
168uint32_t membanks;
169#endif
170
171static uint32_t board_revision;
172/* hex representation of uint64_t */
173static char board_serial[32];
174
175SYSCTL_NODE(_hw, OID_AUTO, board, CTLFLAG_RD, 0, "Board attributes");
176SYSCTL_UINT(_hw_board, OID_AUTO, revision, CTLFLAG_RD,
177    &board_revision, 0, "Board revision");
178SYSCTL_STRING(_hw_board, OID_AUTO, serial, CTLFLAG_RD,
179    board_serial, 0, "Board serial");
180
181int vfp_exists;
182SYSCTL_INT(_hw, HW_FLOATINGPT, floatingpoint, CTLFLAG_RD,
183    &vfp_exists, 0, "Floating point support enabled");
184
185void
186board_set_serial(uint64_t serial)
187{
188
189	snprintf(board_serial, sizeof(board_serial)-1,
190		    "%016jx", serial);
191}
192
193void
194board_set_revision(uint32_t revision)
195{
196
197	board_revision = revision;
198}
199
200void
201sendsig(catcher, ksi, mask)
202	sig_t catcher;
203	ksiginfo_t *ksi;
204	sigset_t *mask;
205{
206	struct thread *td;
207	struct proc *p;
208	struct trapframe *tf;
209	struct sigframe *fp, frame;
210	struct sigacts *psp;
211	int onstack;
212	int sig;
213	int code;
214
215	td = curthread;
216	p = td->td_proc;
217	PROC_LOCK_ASSERT(p, MA_OWNED);
218	sig = ksi->ksi_signo;
219	code = ksi->ksi_code;
220	psp = p->p_sigacts;
221	mtx_assert(&psp->ps_mtx, MA_OWNED);
222	tf = td->td_frame;
223	onstack = sigonstack(tf->tf_usr_sp);
224
225	CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm,
226	    catcher, sig);
227
228	/* Allocate and validate space for the signal handler context. */
229	if ((td->td_pflags & TDP_ALTSTACK) != 0 && !(onstack) &&
230	    SIGISMEMBER(psp->ps_sigonstack, sig)) {
231		fp = (struct sigframe *)(td->td_sigstk.ss_sp +
232		    td->td_sigstk.ss_size);
233#if defined(COMPAT_43)
234		td->td_sigstk.ss_flags |= SS_ONSTACK;
235#endif
236	} else
237		fp = (struct sigframe *)td->td_frame->tf_usr_sp;
238
239	/* make room on the stack */
240	fp--;
241
242	/* make the stack aligned */
243	fp = (struct sigframe *)STACKALIGN(fp);
244	/* Populate the siginfo frame. */
245	get_mcontext(td, &frame.sf_uc.uc_mcontext, 0);
246	frame.sf_si = ksi->ksi_info;
247	frame.sf_uc.uc_sigmask = *mask;
248	frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK )
249	    ? ((onstack) ? SS_ONSTACK : 0) : SS_DISABLE;
250	frame.sf_uc.uc_stack = td->td_sigstk;
251	mtx_unlock(&psp->ps_mtx);
252	PROC_UNLOCK(td->td_proc);
253
254	/* Copy the sigframe out to the user's stack. */
255	if (copyout(&frame, fp, sizeof(*fp)) != 0) {
256		/* Process has trashed its stack. Kill it. */
257		CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp);
258		PROC_LOCK(p);
259		sigexit(td, SIGILL);
260	}
261
262	/*
263	 * Build context to run handler in.  We invoke the handler
264	 * directly, only returning via the trampoline.  Note the
265	 * trampoline version numbers are coordinated with machine-
266	 * dependent code in libc.
267	 */
268
269	tf->tf_r0 = sig;
270	tf->tf_r1 = (register_t)&fp->sf_si;
271	tf->tf_r2 = (register_t)&fp->sf_uc;
272
273	/* the trampoline uses r5 as the uc address */
274	tf->tf_r5 = (register_t)&fp->sf_uc;
275	tf->tf_pc = (register_t)catcher;
276	tf->tf_usr_sp = (register_t)fp;
277	tf->tf_usr_lr = (register_t)(PS_STRINGS - *(p->p_sysent->sv_szsigcode));
278
279	CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_usr_lr,
280	    tf->tf_usr_sp);
281
282	PROC_LOCK(p);
283	mtx_lock(&psp->ps_mtx);
284}
285
286struct kva_md_info kmi;
287
288/*
289 * arm32_vector_init:
290 *
291 *	Initialize the vector page, and select whether or not to
292 *	relocate the vectors.
293 *
294 *	NOTE: We expect the vector page to be mapped at its expected
295 *	destination.
296 */
297
298extern unsigned int page0[], page0_data[];
299void
300arm_vector_init(vm_offset_t va, int which)
301{
302	unsigned int *vectors = (int *) va;
303	unsigned int *vectors_data = vectors + (page0_data - page0);
304	int vec;
305
306	/*
307	 * Loop through the vectors we're taking over, and copy the
308	 * vector's insn and data word.
309	 */
310	for (vec = 0; vec < ARM_NVEC; vec++) {
311		if ((which & (1 << vec)) == 0) {
312			/* Don't want to take over this vector. */
313			continue;
314		}
315		vectors[vec] = page0[vec];
316		vectors_data[vec] = page0_data[vec];
317	}
318
319	/* Now sync the vectors. */
320	cpu_icache_sync_range(va, (ARM_NVEC * 2) * sizeof(u_int));
321
322	vector_page = va;
323
324	if (va == ARM_VECTORS_HIGH) {
325		/*
326		 * Assume the MD caller knows what it's doing here, and
327		 * really does want the vector page relocated.
328		 *
329		 * Note: This has to be done here (and not just in
330		 * cpu_setup()) because the vector page needs to be
331		 * accessible *before* cpu_startup() is called.
332		 * Think ddb(9) ...
333		 *
334		 * NOTE: If the CPU control register is not readable,
335		 * this will totally fail!  We'll just assume that
336		 * any system that has high vector support has a
337		 * readable CPU control register, for now.  If we
338		 * ever encounter one that does not, we'll have to
339		 * rethink this.
340		 */
341		cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC);
342	}
343}
344
345static void
346cpu_startup(void *dummy)
347{
348	struct pcb *pcb = thread0.td_pcb;
349	const unsigned int mbyte = 1024 * 1024;
350#ifdef ARM_TP_ADDRESS
351#ifndef ARM_CACHE_LOCK_ENABLE
352	vm_page_t m;
353#endif
354#endif
355
356	identify_arm_cpu();
357
358	vm_ksubmap_init(&kmi);
359
360	/*
361	 * Display the RAM layout.
362	 */
363	printf("real memory  = %ju (%ju MB)\n",
364	    (uintmax_t)arm32_ptob(realmem),
365	    (uintmax_t)arm32_ptob(realmem) / mbyte);
366	printf("avail memory = %ju (%ju MB)\n",
367	    (uintmax_t)arm32_ptob(cnt.v_free_count),
368	    (uintmax_t)arm32_ptob(cnt.v_free_count) / mbyte);
369	if (bootverbose) {
370		arm_physmem_print_tables();
371		arm_devmap_print_table();
372	}
373
374	bufinit();
375	vm_pager_bufferinit();
376	pcb->pcb_regs.sf_sp = (u_int)thread0.td_kstack +
377	    USPACE_SVC_STACK_TOP;
378	vector_page_setprot(VM_PROT_READ);
379	pmap_set_pcb_pagedir(pmap_kernel(), pcb);
380	pmap_postinit();
381#ifdef ARM_TP_ADDRESS
382#ifdef ARM_CACHE_LOCK_ENABLE
383	pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS);
384	arm_lock_cache_line(ARM_TP_ADDRESS);
385#else
386	m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO);
387	pmap_kenter_user(ARM_TP_ADDRESS, VM_PAGE_TO_PHYS(m));
388#endif
389	*(uint32_t *)ARM_RAS_START = 0;
390	*(uint32_t *)ARM_RAS_END = 0xffffffff;
391#endif
392}
393
394SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
395
396/*
397 * Flush the D-cache for non-DMA I/O so that the I-cache can
398 * be made coherent later.
399 */
400void
401cpu_flush_dcache(void *ptr, size_t len)
402{
403
404	cpu_dcache_wb_range((uintptr_t)ptr, len);
405#ifdef ARM_L2_PIPT
406	cpu_l2cache_wb_range((uintptr_t)vtophys(ptr), len);
407#else
408	cpu_l2cache_wb_range((uintptr_t)ptr, len);
409#endif
410}
411
412/* Get current clock frequency for the given cpu id. */
413int
414cpu_est_clockrate(int cpu_id, uint64_t *rate)
415{
416
417	return (ENXIO);
418}
419
420void
421cpu_idle(int busy)
422{
423
424	CTR2(KTR_SPARE2, "cpu_idle(%d) at %d", busy, curcpu);
425	spinlock_enter();
426#ifndef NO_EVENTTIMERS
427	if (!busy)
428		cpu_idleclock();
429#endif
430	if (!sched_runnable())
431		cpu_sleep(0);
432#ifndef NO_EVENTTIMERS
433	if (!busy)
434		cpu_activeclock();
435#endif
436	spinlock_exit();
437	CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done", busy, curcpu);
438}
439
440int
441cpu_idle_wakeup(int cpu)
442{
443
444	return (0);
445}
446
447/*
448 * Most ARM platforms don't need to do anything special to init their clocks
449 * (they get intialized during normal device attachment), and by not defining a
450 * cpu_initclocks() function they get this generic one.  Any platform that needs
451 * to do something special can just provide their own implementation, which will
452 * override this one due to the weak linkage.
453 */
454void
455arm_generic_initclocks(void)
456{
457
458#ifndef NO_EVENTTIMERS
459#ifdef SMP
460	if (PCPU_GET(cpuid) == 0)
461		cpu_initclocks_bsp();
462	else
463		cpu_initclocks_ap();
464#else
465	cpu_initclocks_bsp();
466#endif
467#endif
468}
469__weak_reference(arm_generic_initclocks, cpu_initclocks);
470
471int
472fill_regs(struct thread *td, struct reg *regs)
473{
474	struct trapframe *tf = td->td_frame;
475	bcopy(&tf->tf_r0, regs->r, sizeof(regs->r));
476	regs->r_sp = tf->tf_usr_sp;
477	regs->r_lr = tf->tf_usr_lr;
478	regs->r_pc = tf->tf_pc;
479	regs->r_cpsr = tf->tf_spsr;
480	return (0);
481}
482int
483fill_fpregs(struct thread *td, struct fpreg *regs)
484{
485	bzero(regs, sizeof(*regs));
486	return (0);
487}
488
489int
490set_regs(struct thread *td, struct reg *regs)
491{
492	struct trapframe *tf = td->td_frame;
493
494	bcopy(regs->r, &tf->tf_r0, sizeof(regs->r));
495	tf->tf_usr_sp = regs->r_sp;
496	tf->tf_usr_lr = regs->r_lr;
497	tf->tf_pc = regs->r_pc;
498	tf->tf_spsr &=  ~PSR_FLAGS;
499	tf->tf_spsr |= regs->r_cpsr & PSR_FLAGS;
500	return (0);
501}
502
503int
504set_fpregs(struct thread *td, struct fpreg *regs)
505{
506	return (0);
507}
508
509int
510fill_dbregs(struct thread *td, struct dbreg *regs)
511{
512	return (0);
513}
514int
515set_dbregs(struct thread *td, struct dbreg *regs)
516{
517	return (0);
518}
519
520
521static int
522ptrace_read_int(struct thread *td, vm_offset_t addr, u_int32_t *v)
523{
524	struct iovec iov;
525	struct uio uio;
526
527	PROC_LOCK_ASSERT(td->td_proc, MA_NOTOWNED);
528	iov.iov_base = (caddr_t) v;
529	iov.iov_len = sizeof(u_int32_t);
530	uio.uio_iov = &iov;
531	uio.uio_iovcnt = 1;
532	uio.uio_offset = (off_t)addr;
533	uio.uio_resid = sizeof(u_int32_t);
534	uio.uio_segflg = UIO_SYSSPACE;
535	uio.uio_rw = UIO_READ;
536	uio.uio_td = td;
537	return proc_rwmem(td->td_proc, &uio);
538}
539
540static int
541ptrace_write_int(struct thread *td, vm_offset_t addr, u_int32_t v)
542{
543	struct iovec iov;
544	struct uio uio;
545
546	PROC_LOCK_ASSERT(td->td_proc, MA_NOTOWNED);
547	iov.iov_base = (caddr_t) &v;
548	iov.iov_len = sizeof(u_int32_t);
549	uio.uio_iov = &iov;
550	uio.uio_iovcnt = 1;
551	uio.uio_offset = (off_t)addr;
552	uio.uio_resid = sizeof(u_int32_t);
553	uio.uio_segflg = UIO_SYSSPACE;
554	uio.uio_rw = UIO_WRITE;
555	uio.uio_td = td;
556	return proc_rwmem(td->td_proc, &uio);
557}
558
559int
560ptrace_single_step(struct thread *td)
561{
562	struct proc *p;
563	int error;
564
565	KASSERT(td->td_md.md_ptrace_instr == 0,
566	 ("Didn't clear single step"));
567	p = td->td_proc;
568	PROC_UNLOCK(p);
569	error = ptrace_read_int(td, td->td_frame->tf_pc + 4,
570	    &td->td_md.md_ptrace_instr);
571	if (error)
572		goto out;
573	error = ptrace_write_int(td, td->td_frame->tf_pc + 4,
574	    PTRACE_BREAKPOINT);
575	if (error)
576		td->td_md.md_ptrace_instr = 0;
577	td->td_md.md_ptrace_addr = td->td_frame->tf_pc + 4;
578out:
579	PROC_LOCK(p);
580	return (error);
581}
582
583int
584ptrace_clear_single_step(struct thread *td)
585{
586	struct proc *p;
587
588	if (td->td_md.md_ptrace_instr) {
589		p = td->td_proc;
590		PROC_UNLOCK(p);
591		ptrace_write_int(td, td->td_md.md_ptrace_addr,
592		    td->td_md.md_ptrace_instr);
593		PROC_LOCK(p);
594		td->td_md.md_ptrace_instr = 0;
595	}
596	return (0);
597}
598
599int
600ptrace_set_pc(struct thread *td, unsigned long addr)
601{
602	td->td_frame->tf_pc = addr;
603	return (0);
604}
605
606void
607cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
608{
609}
610
611void
612spinlock_enter(void)
613{
614	struct thread *td;
615	register_t cspr;
616
617	td = curthread;
618	if (td->td_md.md_spinlock_count == 0) {
619		cspr = disable_interrupts(PSR_I | PSR_F);
620		td->td_md.md_spinlock_count = 1;
621		td->td_md.md_saved_cspr = cspr;
622	} else
623		td->td_md.md_spinlock_count++;
624	critical_enter();
625}
626
627void
628spinlock_exit(void)
629{
630	struct thread *td;
631	register_t cspr;
632
633	td = curthread;
634	critical_exit();
635	cspr = td->td_md.md_saved_cspr;
636	td->td_md.md_spinlock_count--;
637	if (td->td_md.md_spinlock_count == 0)
638		restore_interrupts(cspr);
639}
640
641/*
642 * Clear registers on exec
643 */
644void
645exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
646{
647	struct trapframe *tf = td->td_frame;
648
649	memset(tf, 0, sizeof(*tf));
650	tf->tf_usr_sp = stack;
651	tf->tf_usr_lr = imgp->entry_addr;
652	tf->tf_svc_lr = 0x77777777;
653	tf->tf_pc = imgp->entry_addr;
654	tf->tf_spsr = PSR_USR32_MODE;
655}
656
657/*
658 * Get machine context.
659 */
660int
661get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret)
662{
663	struct trapframe *tf = td->td_frame;
664	__greg_t *gr = mcp->__gregs;
665
666	if (clear_ret & GET_MC_CLEAR_RET)
667		gr[_REG_R0] = 0;
668	else
669		gr[_REG_R0]   = tf->tf_r0;
670	gr[_REG_R1]   = tf->tf_r1;
671	gr[_REG_R2]   = tf->tf_r2;
672	gr[_REG_R3]   = tf->tf_r3;
673	gr[_REG_R4]   = tf->tf_r4;
674	gr[_REG_R5]   = tf->tf_r5;
675	gr[_REG_R6]   = tf->tf_r6;
676	gr[_REG_R7]   = tf->tf_r7;
677	gr[_REG_R8]   = tf->tf_r8;
678	gr[_REG_R9]   = tf->tf_r9;
679	gr[_REG_R10]  = tf->tf_r10;
680	gr[_REG_R11]  = tf->tf_r11;
681	gr[_REG_R12]  = tf->tf_r12;
682	gr[_REG_SP]   = tf->tf_usr_sp;
683	gr[_REG_LR]   = tf->tf_usr_lr;
684	gr[_REG_PC]   = tf->tf_pc;
685	gr[_REG_CPSR] = tf->tf_spsr;
686
687	return (0);
688}
689
690/*
691 * Set machine context.
692 *
693 * However, we don't set any but the user modifiable flags, and we won't
694 * touch the cs selector.
695 */
696int
697set_mcontext(struct thread *td, mcontext_t *mcp)
698{
699	struct trapframe *tf = td->td_frame;
700	const __greg_t *gr = mcp->__gregs;
701
702	tf->tf_r0 = gr[_REG_R0];
703	tf->tf_r1 = gr[_REG_R1];
704	tf->tf_r2 = gr[_REG_R2];
705	tf->tf_r3 = gr[_REG_R3];
706	tf->tf_r4 = gr[_REG_R4];
707	tf->tf_r5 = gr[_REG_R5];
708	tf->tf_r6 = gr[_REG_R6];
709	tf->tf_r7 = gr[_REG_R7];
710	tf->tf_r8 = gr[_REG_R8];
711	tf->tf_r9 = gr[_REG_R9];
712	tf->tf_r10 = gr[_REG_R10];
713	tf->tf_r11 = gr[_REG_R11];
714	tf->tf_r12 = gr[_REG_R12];
715	tf->tf_usr_sp = gr[_REG_SP];
716	tf->tf_usr_lr = gr[_REG_LR];
717	tf->tf_pc = gr[_REG_PC];
718	tf->tf_spsr = gr[_REG_CPSR];
719
720	return (0);
721}
722
723/*
724 * MPSAFE
725 */
726int
727sys_sigreturn(td, uap)
728	struct thread *td;
729	struct sigreturn_args /* {
730		const struct __ucontext *sigcntxp;
731	} */ *uap;
732{
733	ucontext_t uc;
734	int spsr;
735
736	if (uap == NULL)
737		return (EFAULT);
738	if (copyin(uap->sigcntxp, &uc, sizeof(uc)))
739		return (EFAULT);
740	/*
741	 * Make sure the processor mode has not been tampered with and
742	 * interrupts have not been disabled.
743	 */
744	spsr = uc.uc_mcontext.__gregs[_REG_CPSR];
745	if ((spsr & PSR_MODE) != PSR_USR32_MODE ||
746	    (spsr & (PSR_I | PSR_F)) != 0)
747		return (EINVAL);
748		/* Restore register context. */
749	set_mcontext(td, &uc.uc_mcontext);
750
751	/* Restore signal mask. */
752	kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0);
753
754	return (EJUSTRETURN);
755}
756
757
758/*
759 * Construct a PCB from a trapframe. This is called from kdb_trap() where
760 * we want to start a backtrace from the function that caused us to enter
761 * the debugger. We have the context in the trapframe, but base the trace
762 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
763 * enough for a backtrace.
764 */
765void
766makectx(struct trapframe *tf, struct pcb *pcb)
767{
768	pcb->pcb_regs.sf_r4 = tf->tf_r4;
769	pcb->pcb_regs.sf_r5 = tf->tf_r5;
770	pcb->pcb_regs.sf_r6 = tf->tf_r6;
771	pcb->pcb_regs.sf_r7 = tf->tf_r7;
772	pcb->pcb_regs.sf_r8 = tf->tf_r8;
773	pcb->pcb_regs.sf_r9 = tf->tf_r9;
774	pcb->pcb_regs.sf_r10 = tf->tf_r10;
775	pcb->pcb_regs.sf_r11 = tf->tf_r11;
776	pcb->pcb_regs.sf_r12 = tf->tf_r12;
777	pcb->pcb_regs.sf_pc = tf->tf_pc;
778	pcb->pcb_regs.sf_lr = tf->tf_usr_lr;
779	pcb->pcb_regs.sf_sp = tf->tf_usr_sp;
780}
781
782/*
783 * Fake up a boot descriptor table
784 */
785vm_offset_t
786fake_preload_metadata(struct arm_boot_params *abp __unused)
787{
788#ifdef DDB
789	vm_offset_t zstart = 0, zend = 0;
790#endif
791	vm_offset_t lastaddr;
792	int i = 0;
793	static uint32_t fake_preload[35];
794
795	fake_preload[i++] = MODINFO_NAME;
796	fake_preload[i++] = strlen("kernel") + 1;
797	strcpy((char*)&fake_preload[i++], "kernel");
798	i += 1;
799	fake_preload[i++] = MODINFO_TYPE;
800	fake_preload[i++] = strlen("elf kernel") + 1;
801	strcpy((char*)&fake_preload[i++], "elf kernel");
802	i += 2;
803	fake_preload[i++] = MODINFO_ADDR;
804	fake_preload[i++] = sizeof(vm_offset_t);
805	fake_preload[i++] = KERNVIRTADDR;
806	fake_preload[i++] = MODINFO_SIZE;
807	fake_preload[i++] = sizeof(uint32_t);
808	fake_preload[i++] = (uint32_t)&end - KERNVIRTADDR;
809#ifdef DDB
810	if (*(uint32_t *)KERNVIRTADDR == MAGIC_TRAMP_NUMBER) {
811		fake_preload[i++] = MODINFO_METADATA|MODINFOMD_SSYM;
812		fake_preload[i++] = sizeof(vm_offset_t);
813		fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 4);
814		fake_preload[i++] = MODINFO_METADATA|MODINFOMD_ESYM;
815		fake_preload[i++] = sizeof(vm_offset_t);
816		fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 8);
817		lastaddr = *(uint32_t *)(KERNVIRTADDR + 8);
818		zend = lastaddr;
819		zstart = *(uint32_t *)(KERNVIRTADDR + 4);
820		ksym_start = zstart;
821		ksym_end = zend;
822	} else
823#endif
824		lastaddr = (vm_offset_t)&end;
825	fake_preload[i++] = 0;
826	fake_preload[i] = 0;
827	preload_metadata = (void *)fake_preload;
828
829	init_static_kenv(NULL, 0);
830
831	return (lastaddr);
832}
833
834void
835pcpu0_init(void)
836{
837#if __ARM_ARCH >= 6
838	set_curthread(&thread0);
839#endif
840	pcpu_init(pcpup, 0, sizeof(struct pcpu));
841	PCPU_SET(curthread, &thread0);
842#ifdef VFP
843	PCPU_SET(cpu, 0);
844#endif
845}
846
847#if defined(LINUX_BOOT_ABI)
848vm_offset_t
849linux_parse_boot_param(struct arm_boot_params *abp)
850{
851	struct arm_lbabi_tag *walker;
852	uint32_t revision;
853	uint64_t serial;
854
855	/*
856	 * Linux boot ABI: r0 = 0, r1 is the board type (!= 0) and r2
857	 * is atags or dtb pointer.  If all of these aren't satisfied,
858	 * then punt.
859	 */
860	if (!(abp->abp_r0 == 0 && abp->abp_r1 != 0 && abp->abp_r2 != 0))
861		return 0;
862
863	board_id = abp->abp_r1;
864	walker = (struct arm_lbabi_tag *)
865	    (abp->abp_r2 + KERNVIRTADDR - abp->abp_physaddr);
866
867	/* xxx - Need to also look for binary device tree */
868	if (ATAG_TAG(walker) != ATAG_CORE)
869		return 0;
870
871	atag_list = walker;
872	while (ATAG_TAG(walker) != ATAG_NONE) {
873		switch (ATAG_TAG(walker)) {
874		case ATAG_CORE:
875			break;
876		case ATAG_MEM:
877			arm_physmem_hardware_region(walker->u.tag_mem.start,
878			    walker->u.tag_mem.size);
879			break;
880		case ATAG_INITRD2:
881			break;
882		case ATAG_SERIAL:
883			serial = walker->u.tag_sn.low |
884			    ((uint64_t)walker->u.tag_sn.high << 32);
885			board_set_serial(serial);
886			break;
887		case ATAG_REVISION:
888			revision = walker->u.tag_rev.rev;
889			board_set_revision(revision);
890			break;
891		case ATAG_CMDLINE:
892			/* XXX open question: Parse this for boothowto? */
893			bcopy(walker->u.tag_cmd.command, linux_command_line,
894			      ATAG_SIZE(walker));
895			break;
896		default:
897			break;
898		}
899		walker = ATAG_NEXT(walker);
900	}
901
902	/* Save a copy for later */
903	bcopy(atag_list, atags,
904	    (char *)walker - (char *)atag_list + ATAG_SIZE(walker));
905
906	init_static_kenv(NULL, 0);
907
908	return fake_preload_metadata(abp);
909}
910#endif
911
912#if defined(FREEBSD_BOOT_LOADER)
913vm_offset_t
914freebsd_parse_boot_param(struct arm_boot_params *abp)
915{
916	vm_offset_t lastaddr = 0;
917	void *mdp;
918	void *kmdp;
919
920	/*
921	 * Mask metadata pointer: it is supposed to be on page boundary. If
922	 * the first argument (mdp) doesn't point to a valid address the
923	 * bootloader must have passed us something else than the metadata
924	 * ptr, so we give up.  Also give up if we cannot find metadta section
925	 * the loader creates that we get all this data out of.
926	 */
927
928	if ((mdp = (void *)(abp->abp_r0 & ~PAGE_MASK)) == NULL)
929		return 0;
930	preload_metadata = mdp;
931	kmdp = preload_search_by_type("elf kernel");
932	if (kmdp == NULL)
933		return 0;
934
935	boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
936	init_static_kenv(MD_FETCH(kmdp, MODINFOMD_ENVP, char *), 0);
937	lastaddr = MD_FETCH(kmdp, MODINFOMD_KERNEND, vm_offset_t);
938#ifdef DDB
939	ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
940	ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
941#endif
942	return lastaddr;
943}
944#endif
945
946vm_offset_t
947default_parse_boot_param(struct arm_boot_params *abp)
948{
949	vm_offset_t lastaddr;
950
951#if defined(LINUX_BOOT_ABI)
952	if ((lastaddr = linux_parse_boot_param(abp)) != 0)
953		return lastaddr;
954#endif
955#if defined(FREEBSD_BOOT_LOADER)
956	if ((lastaddr = freebsd_parse_boot_param(abp)) != 0)
957		return lastaddr;
958#endif
959	/* Fall back to hardcoded metadata. */
960	lastaddr = fake_preload_metadata(abp);
961
962	return lastaddr;
963}
964
965/*
966 * Stub version of the boot parameter parsing routine.  We are
967 * called early in initarm, before even VM has been initialized.
968 * This routine needs to preserve any data that the boot loader
969 * has passed in before the kernel starts to grow past the end
970 * of the BSS, traditionally the place boot-loaders put this data.
971 *
972 * Since this is called so early, things that depend on the vm system
973 * being setup (including access to some SoC's serial ports), about
974 * all that can be done in this routine is to copy the arguments.
975 *
976 * This is the default boot parameter parsing routine.  Individual
977 * kernels/boards can override this weak function with one of their
978 * own.  We just fake metadata...
979 */
980__weak_reference(default_parse_boot_param, parse_boot_param);
981
982/*
983 * Initialize proc0
984 */
985void
986init_proc0(vm_offset_t kstack)
987{
988	proc_linkup0(&proc0, &thread0);
989	thread0.td_kstack = kstack;
990	thread0.td_pcb = (struct pcb *)
991		(thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
992	thread0.td_pcb->pcb_flags = 0;
993	thread0.td_pcb->pcb_vfpcpu = -1;
994	thread0.td_pcb->pcb_vfpstate.fpscr = VFPSCR_DN | VFPSCR_FZ;
995	thread0.td_frame = &proc0_tf;
996	pcpup->pc_curpcb = thread0.td_pcb;
997}
998
999void
1000set_stackptrs(int cpu)
1001{
1002
1003	set_stackptr(PSR_IRQ32_MODE,
1004	    irqstack.pv_va + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
1005	set_stackptr(PSR_ABT32_MODE,
1006	    abtstack.pv_va + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
1007	set_stackptr(PSR_UND32_MODE,
1008	    undstack.pv_va + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
1009}
1010
1011#ifdef FDT
1012static char *
1013kenv_next(char *cp)
1014{
1015
1016	if (cp != NULL) {
1017		while (*cp != 0)
1018			cp++;
1019		cp++;
1020		if (*cp == 0)
1021			cp = NULL;
1022	}
1023	return (cp);
1024}
1025
1026static void
1027print_kenv(void)
1028{
1029	int len;
1030	char *cp;
1031
1032	debugf("loader passed (static) kenv:\n");
1033	if (kern_envp == NULL) {
1034		debugf(" no env, null ptr\n");
1035		return;
1036	}
1037	debugf(" kern_envp = 0x%08x\n", (uint32_t)kern_envp);
1038
1039	len = 0;
1040	for (cp = kern_envp; cp != NULL; cp = kenv_next(cp))
1041		debugf(" %x %s\n", (uint32_t)cp, cp);
1042}
1043
1044void *
1045initarm(struct arm_boot_params *abp)
1046{
1047	struct mem_region mem_regions[FDT_MEM_REGIONS];
1048	struct pv_addr kernel_l1pt;
1049	struct pv_addr dpcpu;
1050	vm_offset_t dtbp, freemempos, l2_start, lastaddr;
1051	uint32_t memsize, l2size;
1052	char *env;
1053	void *kmdp;
1054	u_int l1pagetable;
1055	int i, j, err_devmap, mem_regions_sz;
1056
1057	lastaddr = parse_boot_param(abp);
1058	arm_physmem_kernaddr = abp->abp_physaddr;
1059
1060	memsize = 0;
1061
1062	cpuinfo_init();
1063	set_cpufuncs();
1064
1065	/*
1066	 * Find the dtb passed in by the boot loader.
1067	 */
1068	kmdp = preload_search_by_type("elf kernel");
1069	if (kmdp != NULL)
1070		dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
1071	else
1072		dtbp = (vm_offset_t)NULL;
1073
1074#if defined(FDT_DTB_STATIC)
1075	/*
1076	 * In case the device tree blob was not retrieved (from metadata) try
1077	 * to use the statically embedded one.
1078	 */
1079	if (dtbp == (vm_offset_t)NULL)
1080		dtbp = (vm_offset_t)&fdt_static_dtb;
1081#endif
1082
1083	if (OF_install(OFW_FDT, 0) == FALSE)
1084		panic("Cannot install FDT");
1085
1086	if (OF_init((void *)dtbp) != 0)
1087		panic("OF_init failed with the found device tree");
1088
1089	/* Grab physical memory regions information from device tree. */
1090	if (fdt_get_mem_regions(mem_regions, &mem_regions_sz, &memsize) != 0)
1091		panic("Cannot get physical memory regions");
1092	arm_physmem_hardware_regions(mem_regions, mem_regions_sz);
1093
1094	/* Grab reserved memory regions information from device tree. */
1095	if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0)
1096		arm_physmem_exclude_regions(mem_regions, mem_regions_sz,
1097		    EXFLAG_NODUMP | EXFLAG_NOALLOC);
1098
1099	/* Platform-specific initialisation */
1100	initarm_early_init();
1101
1102	pcpu0_init();
1103
1104	/* Do basic tuning, hz etc */
1105	init_param1();
1106
1107	/* Calculate number of L2 tables needed for mapping vm_page_array */
1108	l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page);
1109	l2size = (l2size >> L1_S_SHIFT) + 1;
1110
1111	/*
1112	 * Add one table for end of kernel map, one for stacks, msgbuf and
1113	 * L1 and L2 tables map and one for vectors map.
1114	 */
1115	l2size += 3;
1116
1117	/* Make it divisible by 4 */
1118	l2size = (l2size + 3) & ~3;
1119
1120	freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK;
1121
1122	/* Define a macro to simplify memory allocation */
1123#define valloc_pages(var, np)						\
1124	alloc_pages((var).pv_va, (np));					\
1125	(var).pv_pa = (var).pv_va + (abp->abp_physaddr - KERNVIRTADDR);
1126
1127#define alloc_pages(var, np)						\
1128	(var) = freemempos;						\
1129	freemempos += (np * PAGE_SIZE);					\
1130	memset((char *)(var), 0, ((np) * PAGE_SIZE));
1131
1132	while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
1133		freemempos += PAGE_SIZE;
1134	valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
1135
1136	for (i = 0, j = 0; i < l2size; ++i) {
1137		if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
1138			valloc_pages(kernel_pt_table[i],
1139			    L2_TABLE_SIZE / PAGE_SIZE);
1140			j = i;
1141		} else {
1142			kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va +
1143			    L2_TABLE_SIZE_REAL * (i - j);
1144			kernel_pt_table[i].pv_pa =
1145			    kernel_pt_table[i].pv_va - KERNVIRTADDR +
1146			    abp->abp_physaddr;
1147
1148		}
1149	}
1150	/*
1151	 * Allocate a page for the system page mapped to 0x00000000
1152	 * or 0xffff0000. This page will just contain the system vectors
1153	 * and can be shared by all processes.
1154	 */
1155	valloc_pages(systempage, 1);
1156
1157	/* Allocate dynamic per-cpu area. */
1158	valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
1159	dpcpu_init((void *)dpcpu.pv_va, 0);
1160
1161	/* Allocate stacks for all modes */
1162	valloc_pages(irqstack, IRQ_STACK_SIZE * MAXCPU);
1163	valloc_pages(abtstack, ABT_STACK_SIZE * MAXCPU);
1164	valloc_pages(undstack, UND_STACK_SIZE * MAXCPU);
1165	valloc_pages(kernelstack, KSTACK_PAGES * MAXCPU);
1166	valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
1167
1168	/*
1169	 * Now we start construction of the L1 page table
1170	 * We start by mapping the L2 page tables into the L1.
1171	 * This means that we can replace L1 mappings later on if necessary
1172	 */
1173	l1pagetable = kernel_l1pt.pv_va;
1174
1175	/*
1176	 * Try to map as much as possible of kernel text and data using
1177	 * 1MB section mapping and for the rest of initial kernel address
1178	 * space use L2 coarse tables.
1179	 *
1180	 * Link L2 tables for mapping remainder of kernel (modulo 1MB)
1181	 * and kernel structures
1182	 */
1183	l2_start = lastaddr & ~(L1_S_OFFSET);
1184	for (i = 0 ; i < l2size - 1; i++)
1185		pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE,
1186		    &kernel_pt_table[i]);
1187
1188	pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE;
1189
1190	/* Map kernel code and data */
1191	pmap_map_chunk(l1pagetable, KERNVIRTADDR, abp->abp_physaddr,
1192	   (((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK,
1193	    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
1194
1195	/* Map L1 directory and allocated L2 page tables */
1196	pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
1197	    L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
1198
1199	pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va,
1200	    kernel_pt_table[0].pv_pa,
1201	    L2_TABLE_SIZE_REAL * l2size,
1202	    VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
1203
1204	/* Map allocated DPCPU, stacks and msgbuf */
1205	pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa,
1206	    freemempos - dpcpu.pv_va,
1207	    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
1208
1209	/* Link and map the vector page */
1210	pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH,
1211	    &kernel_pt_table[l2size - 1]);
1212	pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
1213	    VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE, PTE_CACHE);
1214
1215	/* Establish static device mappings. */
1216	err_devmap = initarm_devmap_init();
1217	arm_devmap_bootstrap(l1pagetable, NULL);
1218	vm_max_kernel_address = initarm_lastaddr();
1219
1220	cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | DOMAIN_CLIENT);
1221	pmap_pa = kernel_l1pt.pv_pa;
1222	setttb(kernel_l1pt.pv_pa);
1223	cpu_tlb_flushID();
1224	cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2));
1225
1226	/*
1227	 * Now that proper page tables are installed, call cpu_setup() to enable
1228	 * instruction and data caches and other chip-specific features.
1229	 */
1230	cpu_setup("");
1231
1232	/*
1233	 * Only after the SOC registers block is mapped we can perform device
1234	 * tree fixups, as they may attempt to read parameters from hardware.
1235	 */
1236	OF_interpret("perform-fixup", 0);
1237
1238	initarm_gpio_init();
1239
1240	cninit();
1241
1242	debugf("initarm: console initialized\n");
1243	debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp);
1244	debugf(" boothowto = 0x%08x\n", boothowto);
1245	debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp);
1246	print_kenv();
1247
1248	env = getenv("kernelname");
1249	if (env != NULL)
1250		strlcpy(kernelname, env, sizeof(kernelname));
1251
1252	if (err_devmap != 0)
1253		printf("WARNING: could not fully configure devmap, error=%d\n",
1254		    err_devmap);
1255
1256	initarm_late_init();
1257
1258	/*
1259	 * Pages were allocated during the secondary bootstrap for the
1260	 * stacks for different CPU modes.
1261	 * We must now set the r13 registers in the different CPU modes to
1262	 * point to these stacks.
1263	 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
1264	 * of the stack memory.
1265	 */
1266	cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE);
1267
1268	set_stackptrs(0);
1269
1270	/*
1271	 * We must now clean the cache again....
1272	 * Cleaning may be done by reading new data to displace any
1273	 * dirty data in the cache. This will have happened in setttb()
1274	 * but since we are boot strapping the addresses used for the read
1275	 * may have just been remapped and thus the cache could be out
1276	 * of sync. A re-clean after the switch will cure this.
1277	 * After booting there are no gross relocations of the kernel thus
1278	 * this problem will not occur after initarm().
1279	 */
1280	cpu_idcache_wbinv_all();
1281
1282	undefined_init();
1283
1284	init_proc0(kernelstack.pv_va);
1285
1286	arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
1287	pmap_bootstrap(freemempos, &kernel_l1pt);
1288	msgbufp = (void *)msgbufpv.pv_va;
1289	msgbufinit(msgbufp, msgbufsize);
1290	mutex_init();
1291
1292	/*
1293	 * Exclude the kernel (and all the things we allocated which immediately
1294	 * follow the kernel) from the VM allocation pool but not from crash
1295	 * dumps.  virtual_avail is a global variable which tracks the kva we've
1296	 * "allocated" while setting up pmaps.
1297	 *
1298	 * Prepare the list of physical memory available to the vm subsystem.
1299	 */
1300	arm_physmem_exclude_region(abp->abp_physaddr,
1301	    (virtual_avail - KERNVIRTADDR), EXFLAG_NOALLOC);
1302	arm_physmem_init_kernel_globals();
1303
1304	init_param2(physmem);
1305	kdb_init();
1306
1307	return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
1308	    sizeof(struct pcb)));
1309}
1310#endif
1311