machdep.c revision 278347
1/* $NetBSD: arm32_machdep.c,v 1.44 2004/03/24 15:34:47 atatat Exp $ */ 2 3/*- 4 * Copyright (c) 2004 Olivier Houchard 5 * Copyright (c) 1994-1998 Mark Brinicombe. 6 * Copyright (c) 1994 Brini. 7 * All rights reserved. 8 * 9 * This code is derived from software written for Brini by Mark Brinicombe 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Mark Brinicombe 22 * for the NetBSD Project. 23 * 4. The name of the company nor the name of the author may be used to 24 * endorse or promote products derived from this software without specific 25 * prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 28 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 29 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 30 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 31 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 32 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 33 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * Machine dependant functions for kernel setup 40 * 41 * Created : 17/09/94 42 * Updated : 18/04/01 updated for new wscons 43 */ 44 45#include "opt_compat.h" 46#include "opt_ddb.h" 47#include "opt_platform.h" 48#include "opt_sched.h" 49#include "opt_timer.h" 50 51#include <sys/cdefs.h> 52__FBSDID("$FreeBSD: stable/10/sys/arm/arm/machdep.c 278347 2015-02-07 08:47:15Z kib $"); 53 54#include <sys/param.h> 55#include <sys/proc.h> 56#include <sys/systm.h> 57#include <sys/bio.h> 58#include <sys/buf.h> 59#include <sys/bus.h> 60#include <sys/cons.h> 61#include <sys/cpu.h> 62#include <sys/exec.h> 63#include <sys/imgact.h> 64#include <sys/kdb.h> 65#include <sys/kernel.h> 66#include <sys/ktr.h> 67#include <sys/linker.h> 68#include <sys/lock.h> 69#include <sys/malloc.h> 70#include <sys/msgbuf.h> 71#include <sys/mutex.h> 72#include <sys/pcpu.h> 73#include <sys/ptrace.h> 74#include <sys/rwlock.h> 75#include <sys/sched.h> 76#include <sys/signalvar.h> 77#include <sys/syscallsubr.h> 78#include <sys/sysctl.h> 79#include <sys/sysent.h> 80#include <sys/sysproto.h> 81#include <sys/uio.h> 82 83#include <vm/vm.h> 84#include <vm/pmap.h> 85#include <vm/vm_map.h> 86#include <vm/vm_object.h> 87#include <vm/vm_page.h> 88#include <vm/vm_pager.h> 89 90#include <machine/armreg.h> 91#include <machine/atags.h> 92#include <machine/cpu.h> 93#include <machine/devmap.h> 94#include <machine/frame.h> 95#include <machine/intr.h> 96#include <machine/machdep.h> 97#include <machine/md_var.h> 98#include <machine/metadata.h> 99#include <machine/pcb.h> 100#include <machine/physmem.h> 101#include <machine/reg.h> 102#include <machine/trap.h> 103#include <machine/undefined.h> 104#include <machine/vfp.h> 105#include <machine/vmparam.h> 106#include <machine/sysarch.h> 107 108#ifdef FDT 109#include <dev/fdt/fdt_common.h> 110#include <dev/ofw/openfirm.h> 111#endif 112 113#ifdef DEBUG 114#define debugf(fmt, args...) printf(fmt, ##args) 115#else 116#define debugf(fmt, args...) 117#endif 118 119struct pcpu __pcpu[MAXCPU]; 120struct pcpu *pcpup = &__pcpu[0]; 121 122static struct trapframe proc0_tf; 123uint32_t cpu_reset_address = 0; 124int cold = 1; 125vm_offset_t vector_page; 126 127int (*_arm_memcpy)(void *, void *, int, int) = NULL; 128int (*_arm_bzero)(void *, int, int) = NULL; 129int _min_memcpy_size = 0; 130int _min_bzero_size = 0; 131 132extern int *end; 133#ifdef DDB 134extern vm_offset_t ksym_start, ksym_end; 135#endif 136 137#ifdef FDT 138/* 139 * This is the number of L2 page tables required for covering max 140 * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf, 141 * stacks etc.), uprounded to be divisible by 4. 142 */ 143#define KERNEL_PT_MAX 78 144 145static struct pv_addr kernel_pt_table[KERNEL_PT_MAX]; 146 147vm_paddr_t pmap_pa; 148 149struct pv_addr systempage; 150static struct pv_addr msgbufpv; 151struct pv_addr irqstack; 152struct pv_addr undstack; 153struct pv_addr abtstack; 154static struct pv_addr kernelstack; 155 156#endif 157 158#if defined(LINUX_BOOT_ABI) 159#define LBABI_MAX_BANKS 10 160 161uint32_t board_id; 162struct arm_lbabi_tag *atag_list; 163char linux_command_line[LBABI_MAX_COMMAND_LINE + 1]; 164char atags[LBABI_MAX_COMMAND_LINE * 2]; 165uint32_t memstart[LBABI_MAX_BANKS]; 166uint32_t memsize[LBABI_MAX_BANKS]; 167uint32_t membanks; 168#endif 169 170static uint32_t board_revision; 171/* hex representation of uint64_t */ 172static char board_serial[32]; 173 174SYSCTL_NODE(_hw, OID_AUTO, board, CTLFLAG_RD, 0, "Board attributes"); 175SYSCTL_UINT(_hw_board, OID_AUTO, revision, CTLFLAG_RD, 176 &board_revision, 0, "Board revision"); 177SYSCTL_STRING(_hw_board, OID_AUTO, serial, CTLFLAG_RD, 178 board_serial, 0, "Board serial"); 179 180int vfp_exists; 181SYSCTL_INT(_hw, HW_FLOATINGPT, floatingpoint, CTLFLAG_RD, 182 &vfp_exists, 0, "Floating point support enabled"); 183 184void 185board_set_serial(uint64_t serial) 186{ 187 188 snprintf(board_serial, sizeof(board_serial)-1, 189 "%016jx", serial); 190} 191 192void 193board_set_revision(uint32_t revision) 194{ 195 196 board_revision = revision; 197} 198 199void 200sendsig(catcher, ksi, mask) 201 sig_t catcher; 202 ksiginfo_t *ksi; 203 sigset_t *mask; 204{ 205 struct thread *td; 206 struct proc *p; 207 struct trapframe *tf; 208 struct sigframe *fp, frame; 209 struct sigacts *psp; 210 int onstack; 211 int sig; 212 int code; 213 214 td = curthread; 215 p = td->td_proc; 216 PROC_LOCK_ASSERT(p, MA_OWNED); 217 sig = ksi->ksi_signo; 218 code = ksi->ksi_code; 219 psp = p->p_sigacts; 220 mtx_assert(&psp->ps_mtx, MA_OWNED); 221 tf = td->td_frame; 222 onstack = sigonstack(tf->tf_usr_sp); 223 224 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm, 225 catcher, sig); 226 227 /* Allocate and validate space for the signal handler context. */ 228 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !(onstack) && 229 SIGISMEMBER(psp->ps_sigonstack, sig)) { 230 fp = (struct sigframe *)(td->td_sigstk.ss_sp + 231 td->td_sigstk.ss_size); 232#if defined(COMPAT_43) 233 td->td_sigstk.ss_flags |= SS_ONSTACK; 234#endif 235 } else 236 fp = (struct sigframe *)td->td_frame->tf_usr_sp; 237 238 /* make room on the stack */ 239 fp--; 240 241 /* make the stack aligned */ 242 fp = (struct sigframe *)STACKALIGN(fp); 243 /* Populate the siginfo frame. */ 244 get_mcontext(td, &frame.sf_uc.uc_mcontext, 0); 245 frame.sf_si = ksi->ksi_info; 246 frame.sf_uc.uc_sigmask = *mask; 247 frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK ) 248 ? ((onstack) ? SS_ONSTACK : 0) : SS_DISABLE; 249 frame.sf_uc.uc_stack = td->td_sigstk; 250 mtx_unlock(&psp->ps_mtx); 251 PROC_UNLOCK(td->td_proc); 252 253 /* Copy the sigframe out to the user's stack. */ 254 if (copyout(&frame, fp, sizeof(*fp)) != 0) { 255 /* Process has trashed its stack. Kill it. */ 256 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp); 257 PROC_LOCK(p); 258 sigexit(td, SIGILL); 259 } 260 261 /* Translate the signal if appropriate. */ 262 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 263 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 264 265 /* 266 * Build context to run handler in. We invoke the handler 267 * directly, only returning via the trampoline. Note the 268 * trampoline version numbers are coordinated with machine- 269 * dependent code in libc. 270 */ 271 272 tf->tf_r0 = sig; 273 tf->tf_r1 = (register_t)&fp->sf_si; 274 tf->tf_r2 = (register_t)&fp->sf_uc; 275 276 /* the trampoline uses r5 as the uc address */ 277 tf->tf_r5 = (register_t)&fp->sf_uc; 278 tf->tf_pc = (register_t)catcher; 279 tf->tf_usr_sp = (register_t)fp; 280 tf->tf_usr_lr = (register_t)(PS_STRINGS - *(p->p_sysent->sv_szsigcode)); 281 282 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_usr_lr, 283 tf->tf_usr_sp); 284 285 PROC_LOCK(p); 286 mtx_lock(&psp->ps_mtx); 287} 288 289struct kva_md_info kmi; 290 291/* 292 * arm32_vector_init: 293 * 294 * Initialize the vector page, and select whether or not to 295 * relocate the vectors. 296 * 297 * NOTE: We expect the vector page to be mapped at its expected 298 * destination. 299 */ 300 301extern unsigned int page0[], page0_data[]; 302void 303arm_vector_init(vm_offset_t va, int which) 304{ 305 unsigned int *vectors = (int *) va; 306 unsigned int *vectors_data = vectors + (page0_data - page0); 307 int vec; 308 309 /* 310 * Loop through the vectors we're taking over, and copy the 311 * vector's insn and data word. 312 */ 313 for (vec = 0; vec < ARM_NVEC; vec++) { 314 if ((which & (1 << vec)) == 0) { 315 /* Don't want to take over this vector. */ 316 continue; 317 } 318 vectors[vec] = page0[vec]; 319 vectors_data[vec] = page0_data[vec]; 320 } 321 322 /* Now sync the vectors. */ 323 cpu_icache_sync_range(va, (ARM_NVEC * 2) * sizeof(u_int)); 324 325 vector_page = va; 326 327 if (va == ARM_VECTORS_HIGH) { 328 /* 329 * Assume the MD caller knows what it's doing here, and 330 * really does want the vector page relocated. 331 * 332 * Note: This has to be done here (and not just in 333 * cpu_setup()) because the vector page needs to be 334 * accessible *before* cpu_startup() is called. 335 * Think ddb(9) ... 336 * 337 * NOTE: If the CPU control register is not readable, 338 * this will totally fail! We'll just assume that 339 * any system that has high vector support has a 340 * readable CPU control register, for now. If we 341 * ever encounter one that does not, we'll have to 342 * rethink this. 343 */ 344 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC); 345 } 346} 347 348static void 349cpu_startup(void *dummy) 350{ 351 struct pcb *pcb = thread0.td_pcb; 352 const unsigned int mbyte = 1024 * 1024; 353#ifdef ARM_TP_ADDRESS 354#ifndef ARM_CACHE_LOCK_ENABLE 355 vm_page_t m; 356#endif 357#endif 358 359 identify_arm_cpu(); 360 361 vm_ksubmap_init(&kmi); 362 363 /* 364 * Display the RAM layout. 365 */ 366 printf("real memory = %ju (%ju MB)\n", 367 (uintmax_t)arm32_ptob(realmem), 368 (uintmax_t)arm32_ptob(realmem) / mbyte); 369 printf("avail memory = %ju (%ju MB)\n", 370 (uintmax_t)arm32_ptob(cnt.v_free_count), 371 (uintmax_t)arm32_ptob(cnt.v_free_count) / mbyte); 372 if (bootverbose) { 373 arm_physmem_print_tables(); 374 arm_devmap_print_table(); 375 } 376 377 bufinit(); 378 vm_pager_bufferinit(); 379 pcb->un_32.pcb32_sp = (u_int)thread0.td_kstack + 380 USPACE_SVC_STACK_TOP; 381 vector_page_setprot(VM_PROT_READ); 382 pmap_set_pcb_pagedir(pmap_kernel(), pcb); 383 pmap_postinit(); 384#ifdef ARM_TP_ADDRESS 385#ifdef ARM_CACHE_LOCK_ENABLE 386 pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS); 387 arm_lock_cache_line(ARM_TP_ADDRESS); 388#else 389 m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO); 390 pmap_kenter_user(ARM_TP_ADDRESS, VM_PAGE_TO_PHYS(m)); 391#endif 392 *(uint32_t *)ARM_RAS_START = 0; 393 *(uint32_t *)ARM_RAS_END = 0xffffffff; 394#endif 395} 396 397SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); 398 399/* 400 * Flush the D-cache for non-DMA I/O so that the I-cache can 401 * be made coherent later. 402 */ 403void 404cpu_flush_dcache(void *ptr, size_t len) 405{ 406 407 cpu_dcache_wb_range((uintptr_t)ptr, len); 408#ifdef ARM_L2_PIPT 409 cpu_l2cache_wb_range((uintptr_t)vtophys(ptr), len); 410#else 411 cpu_l2cache_wb_range((uintptr_t)ptr, len); 412#endif 413} 414 415/* Get current clock frequency for the given cpu id. */ 416int 417cpu_est_clockrate(int cpu_id, uint64_t *rate) 418{ 419 420 return (ENXIO); 421} 422 423void 424cpu_idle(int busy) 425{ 426 427 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d", busy, curcpu); 428 spinlock_enter(); 429#ifndef NO_EVENTTIMERS 430 if (!busy) 431 cpu_idleclock(); 432#endif 433 if (!sched_runnable()) 434 cpu_sleep(0); 435#ifndef NO_EVENTTIMERS 436 if (!busy) 437 cpu_activeclock(); 438#endif 439 spinlock_exit(); 440 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done", busy, curcpu); 441} 442 443int 444cpu_idle_wakeup(int cpu) 445{ 446 447 return (0); 448} 449 450/* 451 * Most ARM platforms don't need to do anything special to init their clocks 452 * (they get intialized during normal device attachment), and by not defining a 453 * cpu_initclocks() function they get this generic one. Any platform that needs 454 * to do something special can just provide their own implementation, which will 455 * override this one due to the weak linkage. 456 */ 457void 458arm_generic_initclocks(void) 459{ 460 461#ifndef NO_EVENTTIMERS 462#ifdef SMP 463 if (PCPU_GET(cpuid) == 0) 464 cpu_initclocks_bsp(); 465 else 466 cpu_initclocks_ap(); 467#else 468 cpu_initclocks_bsp(); 469#endif 470#endif 471} 472__weak_reference(arm_generic_initclocks, cpu_initclocks); 473 474int 475fill_regs(struct thread *td, struct reg *regs) 476{ 477 struct trapframe *tf = td->td_frame; 478 bcopy(&tf->tf_r0, regs->r, sizeof(regs->r)); 479 regs->r_sp = tf->tf_usr_sp; 480 regs->r_lr = tf->tf_usr_lr; 481 regs->r_pc = tf->tf_pc; 482 regs->r_cpsr = tf->tf_spsr; 483 return (0); 484} 485int 486fill_fpregs(struct thread *td, struct fpreg *regs) 487{ 488 bzero(regs, sizeof(*regs)); 489 return (0); 490} 491 492int 493set_regs(struct thread *td, struct reg *regs) 494{ 495 struct trapframe *tf = td->td_frame; 496 497 bcopy(regs->r, &tf->tf_r0, sizeof(regs->r)); 498 tf->tf_usr_sp = regs->r_sp; 499 tf->tf_usr_lr = regs->r_lr; 500 tf->tf_pc = regs->r_pc; 501 tf->tf_spsr &= ~PSR_FLAGS; 502 tf->tf_spsr |= regs->r_cpsr & PSR_FLAGS; 503 return (0); 504} 505 506int 507set_fpregs(struct thread *td, struct fpreg *regs) 508{ 509 return (0); 510} 511 512int 513fill_dbregs(struct thread *td, struct dbreg *regs) 514{ 515 return (0); 516} 517int 518set_dbregs(struct thread *td, struct dbreg *regs) 519{ 520 return (0); 521} 522 523 524static int 525ptrace_read_int(struct thread *td, vm_offset_t addr, u_int32_t *v) 526{ 527 struct iovec iov; 528 struct uio uio; 529 530 PROC_LOCK_ASSERT(td->td_proc, MA_NOTOWNED); 531 iov.iov_base = (caddr_t) v; 532 iov.iov_len = sizeof(u_int32_t); 533 uio.uio_iov = &iov; 534 uio.uio_iovcnt = 1; 535 uio.uio_offset = (off_t)addr; 536 uio.uio_resid = sizeof(u_int32_t); 537 uio.uio_segflg = UIO_SYSSPACE; 538 uio.uio_rw = UIO_READ; 539 uio.uio_td = td; 540 return proc_rwmem(td->td_proc, &uio); 541} 542 543static int 544ptrace_write_int(struct thread *td, vm_offset_t addr, u_int32_t v) 545{ 546 struct iovec iov; 547 struct uio uio; 548 549 PROC_LOCK_ASSERT(td->td_proc, MA_NOTOWNED); 550 iov.iov_base = (caddr_t) &v; 551 iov.iov_len = sizeof(u_int32_t); 552 uio.uio_iov = &iov; 553 uio.uio_iovcnt = 1; 554 uio.uio_offset = (off_t)addr; 555 uio.uio_resid = sizeof(u_int32_t); 556 uio.uio_segflg = UIO_SYSSPACE; 557 uio.uio_rw = UIO_WRITE; 558 uio.uio_td = td; 559 return proc_rwmem(td->td_proc, &uio); 560} 561 562int 563ptrace_single_step(struct thread *td) 564{ 565 struct proc *p; 566 int error; 567 568 KASSERT(td->td_md.md_ptrace_instr == 0, 569 ("Didn't clear single step")); 570 p = td->td_proc; 571 PROC_UNLOCK(p); 572 error = ptrace_read_int(td, td->td_frame->tf_pc + 4, 573 &td->td_md.md_ptrace_instr); 574 if (error) 575 goto out; 576 error = ptrace_write_int(td, td->td_frame->tf_pc + 4, 577 PTRACE_BREAKPOINT); 578 if (error) 579 td->td_md.md_ptrace_instr = 0; 580 td->td_md.md_ptrace_addr = td->td_frame->tf_pc + 4; 581out: 582 PROC_LOCK(p); 583 return (error); 584} 585 586int 587ptrace_clear_single_step(struct thread *td) 588{ 589 struct proc *p; 590 591 if (td->td_md.md_ptrace_instr) { 592 p = td->td_proc; 593 PROC_UNLOCK(p); 594 ptrace_write_int(td, td->td_md.md_ptrace_addr, 595 td->td_md.md_ptrace_instr); 596 PROC_LOCK(p); 597 td->td_md.md_ptrace_instr = 0; 598 } 599 return (0); 600} 601 602int 603ptrace_set_pc(struct thread *td, unsigned long addr) 604{ 605 td->td_frame->tf_pc = addr; 606 return (0); 607} 608 609void 610cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 611{ 612} 613 614void 615spinlock_enter(void) 616{ 617 struct thread *td; 618 register_t cspr; 619 620 td = curthread; 621 if (td->td_md.md_spinlock_count == 0) { 622 cspr = disable_interrupts(I32_bit | F32_bit); 623 td->td_md.md_spinlock_count = 1; 624 td->td_md.md_saved_cspr = cspr; 625 } else 626 td->td_md.md_spinlock_count++; 627 critical_enter(); 628} 629 630void 631spinlock_exit(void) 632{ 633 struct thread *td; 634 register_t cspr; 635 636 td = curthread; 637 critical_exit(); 638 cspr = td->td_md.md_saved_cspr; 639 td->td_md.md_spinlock_count--; 640 if (td->td_md.md_spinlock_count == 0) 641 restore_interrupts(cspr); 642} 643 644/* 645 * Clear registers on exec 646 */ 647void 648exec_setregs(struct thread *td, struct image_params *imgp, u_long stack) 649{ 650 struct trapframe *tf = td->td_frame; 651 652 memset(tf, 0, sizeof(*tf)); 653 tf->tf_usr_sp = stack; 654 tf->tf_usr_lr = imgp->entry_addr; 655 tf->tf_svc_lr = 0x77777777; 656 tf->tf_pc = imgp->entry_addr; 657 tf->tf_spsr = PSR_USR32_MODE; 658} 659 660/* 661 * Get machine context. 662 */ 663int 664get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret) 665{ 666 struct trapframe *tf = td->td_frame; 667 __greg_t *gr = mcp->__gregs; 668 669 if (clear_ret & GET_MC_CLEAR_RET) 670 gr[_REG_R0] = 0; 671 else 672 gr[_REG_R0] = tf->tf_r0; 673 gr[_REG_R1] = tf->tf_r1; 674 gr[_REG_R2] = tf->tf_r2; 675 gr[_REG_R3] = tf->tf_r3; 676 gr[_REG_R4] = tf->tf_r4; 677 gr[_REG_R5] = tf->tf_r5; 678 gr[_REG_R6] = tf->tf_r6; 679 gr[_REG_R7] = tf->tf_r7; 680 gr[_REG_R8] = tf->tf_r8; 681 gr[_REG_R9] = tf->tf_r9; 682 gr[_REG_R10] = tf->tf_r10; 683 gr[_REG_R11] = tf->tf_r11; 684 gr[_REG_R12] = tf->tf_r12; 685 gr[_REG_SP] = tf->tf_usr_sp; 686 gr[_REG_LR] = tf->tf_usr_lr; 687 gr[_REG_PC] = tf->tf_pc; 688 gr[_REG_CPSR] = tf->tf_spsr; 689 690 return (0); 691} 692 693/* 694 * Set machine context. 695 * 696 * However, we don't set any but the user modifiable flags, and we won't 697 * touch the cs selector. 698 */ 699int 700set_mcontext(struct thread *td, mcontext_t *mcp) 701{ 702 struct trapframe *tf = td->td_frame; 703 const __greg_t *gr = mcp->__gregs; 704 705 tf->tf_r0 = gr[_REG_R0]; 706 tf->tf_r1 = gr[_REG_R1]; 707 tf->tf_r2 = gr[_REG_R2]; 708 tf->tf_r3 = gr[_REG_R3]; 709 tf->tf_r4 = gr[_REG_R4]; 710 tf->tf_r5 = gr[_REG_R5]; 711 tf->tf_r6 = gr[_REG_R6]; 712 tf->tf_r7 = gr[_REG_R7]; 713 tf->tf_r8 = gr[_REG_R8]; 714 tf->tf_r9 = gr[_REG_R9]; 715 tf->tf_r10 = gr[_REG_R10]; 716 tf->tf_r11 = gr[_REG_R11]; 717 tf->tf_r12 = gr[_REG_R12]; 718 tf->tf_usr_sp = gr[_REG_SP]; 719 tf->tf_usr_lr = gr[_REG_LR]; 720 tf->tf_pc = gr[_REG_PC]; 721 tf->tf_spsr = gr[_REG_CPSR]; 722 723 return (0); 724} 725 726/* 727 * MPSAFE 728 */ 729int 730sys_sigreturn(td, uap) 731 struct thread *td; 732 struct sigreturn_args /* { 733 const struct __ucontext *sigcntxp; 734 } */ *uap; 735{ 736 ucontext_t uc; 737 int spsr; 738 739 if (uap == NULL) 740 return (EFAULT); 741 if (copyin(uap->sigcntxp, &uc, sizeof(uc))) 742 return (EFAULT); 743 /* 744 * Make sure the processor mode has not been tampered with and 745 * interrupts have not been disabled. 746 */ 747 spsr = uc.uc_mcontext.__gregs[_REG_CPSR]; 748 if ((spsr & PSR_MODE) != PSR_USR32_MODE || 749 (spsr & (I32_bit | F32_bit)) != 0) 750 return (EINVAL); 751 /* Restore register context. */ 752 set_mcontext(td, &uc.uc_mcontext); 753 754 /* Restore signal mask. */ 755 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0); 756 757 return (EJUSTRETURN); 758} 759 760 761/* 762 * Construct a PCB from a trapframe. This is called from kdb_trap() where 763 * we want to start a backtrace from the function that caused us to enter 764 * the debugger. We have the context in the trapframe, but base the trace 765 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 766 * enough for a backtrace. 767 */ 768void 769makectx(struct trapframe *tf, struct pcb *pcb) 770{ 771 pcb->un_32.pcb32_r8 = tf->tf_r8; 772 pcb->un_32.pcb32_r9 = tf->tf_r9; 773 pcb->un_32.pcb32_r10 = tf->tf_r10; 774 pcb->un_32.pcb32_r11 = tf->tf_r11; 775 pcb->un_32.pcb32_r12 = tf->tf_r12; 776 pcb->un_32.pcb32_pc = tf->tf_pc; 777 pcb->un_32.pcb32_lr = tf->tf_usr_lr; 778 pcb->un_32.pcb32_sp = tf->tf_usr_sp; 779} 780 781/* 782 * Fake up a boot descriptor table 783 */ 784vm_offset_t 785fake_preload_metadata(struct arm_boot_params *abp __unused) 786{ 787#ifdef DDB 788 vm_offset_t zstart = 0, zend = 0; 789#endif 790 vm_offset_t lastaddr; 791 int i = 0; 792 static uint32_t fake_preload[35]; 793 794 fake_preload[i++] = MODINFO_NAME; 795 fake_preload[i++] = strlen("kernel") + 1; 796 strcpy((char*)&fake_preload[i++], "kernel"); 797 i += 1; 798 fake_preload[i++] = MODINFO_TYPE; 799 fake_preload[i++] = strlen("elf kernel") + 1; 800 strcpy((char*)&fake_preload[i++], "elf kernel"); 801 i += 2; 802 fake_preload[i++] = MODINFO_ADDR; 803 fake_preload[i++] = sizeof(vm_offset_t); 804 fake_preload[i++] = KERNVIRTADDR; 805 fake_preload[i++] = MODINFO_SIZE; 806 fake_preload[i++] = sizeof(uint32_t); 807 fake_preload[i++] = (uint32_t)&end - KERNVIRTADDR; 808#ifdef DDB 809 if (*(uint32_t *)KERNVIRTADDR == MAGIC_TRAMP_NUMBER) { 810 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_SSYM; 811 fake_preload[i++] = sizeof(vm_offset_t); 812 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 4); 813 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_ESYM; 814 fake_preload[i++] = sizeof(vm_offset_t); 815 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 8); 816 lastaddr = *(uint32_t *)(KERNVIRTADDR + 8); 817 zend = lastaddr; 818 zstart = *(uint32_t *)(KERNVIRTADDR + 4); 819 ksym_start = zstart; 820 ksym_end = zend; 821 } else 822#endif 823 lastaddr = (vm_offset_t)&end; 824 fake_preload[i++] = 0; 825 fake_preload[i] = 0; 826 preload_metadata = (void *)fake_preload; 827 828 return (lastaddr); 829} 830 831void 832pcpu0_init(void) 833{ 834#if ARM_ARCH_6 || ARM_ARCH_7A || defined(CPU_MV_PJ4B) 835 set_curthread(&thread0); 836#endif 837 pcpu_init(pcpup, 0, sizeof(struct pcpu)); 838 PCPU_SET(curthread, &thread0); 839#ifdef VFP 840 PCPU_SET(cpu, 0); 841#endif 842} 843 844#if defined(LINUX_BOOT_ABI) 845vm_offset_t 846linux_parse_boot_param(struct arm_boot_params *abp) 847{ 848 struct arm_lbabi_tag *walker; 849 uint32_t revision; 850 uint64_t serial; 851 852 /* 853 * Linux boot ABI: r0 = 0, r1 is the board type (!= 0) and r2 854 * is atags or dtb pointer. If all of these aren't satisfied, 855 * then punt. 856 */ 857 if (!(abp->abp_r0 == 0 && abp->abp_r1 != 0 && abp->abp_r2 != 0)) 858 return 0; 859 860 board_id = abp->abp_r1; 861 walker = (struct arm_lbabi_tag *) 862 (abp->abp_r2 + KERNVIRTADDR - abp->abp_physaddr); 863 864 /* xxx - Need to also look for binary device tree */ 865 if (ATAG_TAG(walker) != ATAG_CORE) 866 return 0; 867 868 atag_list = walker; 869 while (ATAG_TAG(walker) != ATAG_NONE) { 870 switch (ATAG_TAG(walker)) { 871 case ATAG_CORE: 872 break; 873 case ATAG_MEM: 874 arm_physmem_hardware_region(walker->u.tag_mem.start, 875 walker->u.tag_mem.size); 876 break; 877 case ATAG_INITRD2: 878 break; 879 case ATAG_SERIAL: 880 serial = walker->u.tag_sn.low | 881 ((uint64_t)walker->u.tag_sn.high << 32); 882 board_set_serial(serial); 883 break; 884 case ATAG_REVISION: 885 revision = walker->u.tag_rev.rev; 886 board_set_revision(revision); 887 break; 888 case ATAG_CMDLINE: 889 /* XXX open question: Parse this for boothowto? */ 890 bcopy(walker->u.tag_cmd.command, linux_command_line, 891 ATAG_SIZE(walker)); 892 break; 893 default: 894 break; 895 } 896 walker = ATAG_NEXT(walker); 897 } 898 899 /* Save a copy for later */ 900 bcopy(atag_list, atags, 901 (char *)walker - (char *)atag_list + ATAG_SIZE(walker)); 902 903 return fake_preload_metadata(abp); 904} 905#endif 906 907#if defined(FREEBSD_BOOT_LOADER) 908vm_offset_t 909freebsd_parse_boot_param(struct arm_boot_params *abp) 910{ 911 vm_offset_t lastaddr = 0; 912 void *mdp; 913 void *kmdp; 914 915 /* 916 * Mask metadata pointer: it is supposed to be on page boundary. If 917 * the first argument (mdp) doesn't point to a valid address the 918 * bootloader must have passed us something else than the metadata 919 * ptr, so we give up. Also give up if we cannot find metadta section 920 * the loader creates that we get all this data out of. 921 */ 922 923 if ((mdp = (void *)(abp->abp_r0 & ~PAGE_MASK)) == NULL) 924 return 0; 925 preload_metadata = mdp; 926 kmdp = preload_search_by_type("elf kernel"); 927 if (kmdp == NULL) 928 return 0; 929 930 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int); 931 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *); 932 lastaddr = MD_FETCH(kmdp, MODINFOMD_KERNEND, vm_offset_t); 933#ifdef DDB 934 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t); 935 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t); 936#endif 937 preload_addr_relocate = KERNVIRTADDR - abp->abp_physaddr; 938 return lastaddr; 939} 940#endif 941 942vm_offset_t 943default_parse_boot_param(struct arm_boot_params *abp) 944{ 945 vm_offset_t lastaddr; 946 947#if defined(LINUX_BOOT_ABI) 948 if ((lastaddr = linux_parse_boot_param(abp)) != 0) 949 return lastaddr; 950#endif 951#if defined(FREEBSD_BOOT_LOADER) 952 if ((lastaddr = freebsd_parse_boot_param(abp)) != 0) 953 return lastaddr; 954#endif 955 /* Fall back to hardcoded metadata. */ 956 lastaddr = fake_preload_metadata(abp); 957 958 return lastaddr; 959} 960 961/* 962 * Stub version of the boot parameter parsing routine. We are 963 * called early in initarm, before even VM has been initialized. 964 * This routine needs to preserve any data that the boot loader 965 * has passed in before the kernel starts to grow past the end 966 * of the BSS, traditionally the place boot-loaders put this data. 967 * 968 * Since this is called so early, things that depend on the vm system 969 * being setup (including access to some SoC's serial ports), about 970 * all that can be done in this routine is to copy the arguments. 971 * 972 * This is the default boot parameter parsing routine. Individual 973 * kernels/boards can override this weak function with one of their 974 * own. We just fake metadata... 975 */ 976__weak_reference(default_parse_boot_param, parse_boot_param); 977 978/* 979 * Initialize proc0 980 */ 981void 982init_proc0(vm_offset_t kstack) 983{ 984 proc_linkup0(&proc0, &thread0); 985 thread0.td_kstack = kstack; 986 thread0.td_pcb = (struct pcb *) 987 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 988 thread0.td_pcb->pcb_flags = 0; 989 thread0.td_pcb->pcb_vfpcpu = -1; 990 thread0.td_pcb->pcb_vfpstate.fpscr = VFPSCR_DN | VFPSCR_FZ; 991 thread0.td_frame = &proc0_tf; 992 pcpup->pc_curpcb = thread0.td_pcb; 993} 994 995void 996set_stackptrs(int cpu) 997{ 998 999 set_stackptr(PSR_IRQ32_MODE, 1000 irqstack.pv_va + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 1001 set_stackptr(PSR_ABT32_MODE, 1002 abtstack.pv_va + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 1003 set_stackptr(PSR_UND32_MODE, 1004 undstack.pv_va + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 1005} 1006 1007#ifdef FDT 1008static char * 1009kenv_next(char *cp) 1010{ 1011 1012 if (cp != NULL) { 1013 while (*cp != 0) 1014 cp++; 1015 cp++; 1016 if (*cp == 0) 1017 cp = NULL; 1018 } 1019 return (cp); 1020} 1021 1022static void 1023print_kenv(void) 1024{ 1025 int len; 1026 char *cp; 1027 1028 debugf("loader passed (static) kenv:\n"); 1029 if (kern_envp == NULL) { 1030 debugf(" no env, null ptr\n"); 1031 return; 1032 } 1033 debugf(" kern_envp = 0x%08x\n", (uint32_t)kern_envp); 1034 1035 len = 0; 1036 for (cp = kern_envp; cp != NULL; cp = kenv_next(cp)) 1037 debugf(" %x %s\n", (uint32_t)cp, cp); 1038} 1039 1040void * 1041initarm(struct arm_boot_params *abp) 1042{ 1043 struct mem_region mem_regions[FDT_MEM_REGIONS]; 1044 struct pv_addr kernel_l1pt; 1045 struct pv_addr dpcpu; 1046 vm_offset_t dtbp, freemempos, l2_start, lastaddr; 1047 uint32_t memsize, l2size; 1048 char *env; 1049 void *kmdp; 1050 u_int l1pagetable; 1051 int i, j, err_devmap, mem_regions_sz; 1052 1053 lastaddr = parse_boot_param(abp); 1054 arm_physmem_kernaddr = abp->abp_physaddr; 1055 1056 memsize = 0; 1057 set_cpufuncs(); 1058 1059 /* 1060 * Find the dtb passed in by the boot loader. 1061 */ 1062 kmdp = preload_search_by_type("elf kernel"); 1063 if (kmdp != NULL) 1064 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t); 1065 else 1066 dtbp = (vm_offset_t)NULL; 1067 1068#if defined(FDT_DTB_STATIC) 1069 /* 1070 * In case the device tree blob was not retrieved (from metadata) try 1071 * to use the statically embedded one. 1072 */ 1073 if (dtbp == (vm_offset_t)NULL) 1074 dtbp = (vm_offset_t)&fdt_static_dtb; 1075#endif 1076 1077 if (OF_install(OFW_FDT, 0) == FALSE) 1078 panic("Cannot install FDT"); 1079 1080 if (OF_init((void *)dtbp) != 0) 1081 panic("OF_init failed with the found device tree"); 1082 1083 /* Grab physical memory regions information from device tree. */ 1084 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz, &memsize) != 0) 1085 panic("Cannot get physical memory regions"); 1086 arm_physmem_hardware_regions(mem_regions, mem_regions_sz); 1087 1088 /* Grab reserved memory regions information from device tree. */ 1089 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0) 1090 arm_physmem_exclude_regions(mem_regions, mem_regions_sz, 1091 EXFLAG_NODUMP | EXFLAG_NOALLOC); 1092 1093 /* Platform-specific initialisation */ 1094 initarm_early_init(); 1095 1096 pcpu0_init(); 1097 1098 /* Do basic tuning, hz etc */ 1099 init_param1(); 1100 1101 /* Calculate number of L2 tables needed for mapping vm_page_array */ 1102 l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page); 1103 l2size = (l2size >> L1_S_SHIFT) + 1; 1104 1105 /* 1106 * Add one table for end of kernel map, one for stacks, msgbuf and 1107 * L1 and L2 tables map and one for vectors map. 1108 */ 1109 l2size += 3; 1110 1111 /* Make it divisible by 4 */ 1112 l2size = (l2size + 3) & ~3; 1113 1114 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK; 1115 1116 /* Define a macro to simplify memory allocation */ 1117#define valloc_pages(var, np) \ 1118 alloc_pages((var).pv_va, (np)); \ 1119 (var).pv_pa = (var).pv_va + (abp->abp_physaddr - KERNVIRTADDR); 1120 1121#define alloc_pages(var, np) \ 1122 (var) = freemempos; \ 1123 freemempos += (np * PAGE_SIZE); \ 1124 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 1125 1126 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0) 1127 freemempos += PAGE_SIZE; 1128 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 1129 1130 for (i = 0, j = 0; i < l2size; ++i) { 1131 if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) { 1132 valloc_pages(kernel_pt_table[i], 1133 L2_TABLE_SIZE / PAGE_SIZE); 1134 j = i; 1135 } else { 1136 kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va + 1137 L2_TABLE_SIZE_REAL * (i - j); 1138 kernel_pt_table[i].pv_pa = 1139 kernel_pt_table[i].pv_va - KERNVIRTADDR + 1140 abp->abp_physaddr; 1141 1142 } 1143 } 1144 /* 1145 * Allocate a page for the system page mapped to 0x00000000 1146 * or 0xffff0000. This page will just contain the system vectors 1147 * and can be shared by all processes. 1148 */ 1149 valloc_pages(systempage, 1); 1150 1151 /* Allocate dynamic per-cpu area. */ 1152 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE); 1153 dpcpu_init((void *)dpcpu.pv_va, 0); 1154 1155 /* Allocate stacks for all modes */ 1156 valloc_pages(irqstack, IRQ_STACK_SIZE * MAXCPU); 1157 valloc_pages(abtstack, ABT_STACK_SIZE * MAXCPU); 1158 valloc_pages(undstack, UND_STACK_SIZE * MAXCPU); 1159 valloc_pages(kernelstack, KSTACK_PAGES * MAXCPU); 1160 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE); 1161 1162 /* 1163 * Now we start construction of the L1 page table 1164 * We start by mapping the L2 page tables into the L1. 1165 * This means that we can replace L1 mappings later on if necessary 1166 */ 1167 l1pagetable = kernel_l1pt.pv_va; 1168 1169 /* 1170 * Try to map as much as possible of kernel text and data using 1171 * 1MB section mapping and for the rest of initial kernel address 1172 * space use L2 coarse tables. 1173 * 1174 * Link L2 tables for mapping remainder of kernel (modulo 1MB) 1175 * and kernel structures 1176 */ 1177 l2_start = lastaddr & ~(L1_S_OFFSET); 1178 for (i = 0 ; i < l2size - 1; i++) 1179 pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE, 1180 &kernel_pt_table[i]); 1181 1182 pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE; 1183 1184 /* Map kernel code and data */ 1185 pmap_map_chunk(l1pagetable, KERNVIRTADDR, abp->abp_physaddr, 1186 (((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK, 1187 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 1188 1189 /* Map L1 directory and allocated L2 page tables */ 1190 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 1191 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 1192 1193 pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va, 1194 kernel_pt_table[0].pv_pa, 1195 L2_TABLE_SIZE_REAL * l2size, 1196 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 1197 1198 /* Map allocated DPCPU, stacks and msgbuf */ 1199 pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa, 1200 freemempos - dpcpu.pv_va, 1201 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 1202 1203 /* Link and map the vector page */ 1204 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH, 1205 &kernel_pt_table[l2size - 1]); 1206 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa, 1207 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE, PTE_CACHE); 1208 1209 /* Establish static device mappings. */ 1210 err_devmap = initarm_devmap_init(); 1211 arm_devmap_bootstrap(l1pagetable, NULL); 1212 vm_max_kernel_address = initarm_lastaddr(); 1213 1214 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | DOMAIN_CLIENT); 1215 pmap_pa = kernel_l1pt.pv_pa; 1216 setttb(kernel_l1pt.pv_pa); 1217 cpu_tlb_flushID(); 1218 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)); 1219 1220 /* 1221 * Now that proper page tables are installed, call cpu_setup() to enable 1222 * instruction and data caches and other chip-specific features. 1223 */ 1224 cpu_setup(""); 1225 1226 /* 1227 * Only after the SOC registers block is mapped we can perform device 1228 * tree fixups, as they may attempt to read parameters from hardware. 1229 */ 1230 OF_interpret("perform-fixup", 0); 1231 1232 initarm_gpio_init(); 1233 1234 cninit(); 1235 1236 debugf("initarm: console initialized\n"); 1237 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp); 1238 debugf(" boothowto = 0x%08x\n", boothowto); 1239 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp); 1240 print_kenv(); 1241 1242 env = getenv("kernelname"); 1243 if (env != NULL) 1244 strlcpy(kernelname, env, sizeof(kernelname)); 1245 1246 if (err_devmap != 0) 1247 printf("WARNING: could not fully configure devmap, error=%d\n", 1248 err_devmap); 1249 1250 initarm_late_init(); 1251 1252 /* 1253 * Pages were allocated during the secondary bootstrap for the 1254 * stacks for different CPU modes. 1255 * We must now set the r13 registers in the different CPU modes to 1256 * point to these stacks. 1257 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 1258 * of the stack memory. 1259 */ 1260 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE); 1261 1262 set_stackptrs(0); 1263 1264 /* 1265 * We must now clean the cache again.... 1266 * Cleaning may be done by reading new data to displace any 1267 * dirty data in the cache. This will have happened in setttb() 1268 * but since we are boot strapping the addresses used for the read 1269 * may have just been remapped and thus the cache could be out 1270 * of sync. A re-clean after the switch will cure this. 1271 * After booting there are no gross relocations of the kernel thus 1272 * this problem will not occur after initarm(). 1273 */ 1274 cpu_idcache_wbinv_all(); 1275 1276 undefined_init(); 1277 1278 init_proc0(kernelstack.pv_va); 1279 1280 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 1281 pmap_bootstrap(freemempos, &kernel_l1pt); 1282 msgbufp = (void *)msgbufpv.pv_va; 1283 msgbufinit(msgbufp, msgbufsize); 1284 mutex_init(); 1285 1286 /* 1287 * Exclude the kernel (and all the things we allocated which immediately 1288 * follow the kernel) from the VM allocation pool but not from crash 1289 * dumps. virtual_avail is a global variable which tracks the kva we've 1290 * "allocated" while setting up pmaps. 1291 * 1292 * Prepare the list of physical memory available to the vm subsystem. 1293 */ 1294 arm_physmem_exclude_region(abp->abp_physaddr, 1295 (virtual_avail - KERNVIRTADDR), EXFLAG_NOALLOC); 1296 arm_physmem_init_kernel_globals(); 1297 1298 init_param2(physmem); 1299 kdb_init(); 1300 1301 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP - 1302 sizeof(struct pcb))); 1303} 1304#endif 1305