machdep.c revision 266086
1/* $NetBSD: arm32_machdep.c,v 1.44 2004/03/24 15:34:47 atatat Exp $ */ 2 3/*- 4 * Copyright (c) 2004 Olivier Houchard 5 * Copyright (c) 1994-1998 Mark Brinicombe. 6 * Copyright (c) 1994 Brini. 7 * All rights reserved. 8 * 9 * This code is derived from software written for Brini by Mark Brinicombe 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Mark Brinicombe 22 * for the NetBSD Project. 23 * 4. The name of the company nor the name of the author may be used to 24 * endorse or promote products derived from this software without specific 25 * prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 28 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 29 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 30 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 31 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 32 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 33 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * Machine dependant functions for kernel setup 40 * 41 * Created : 17/09/94 42 * Updated : 18/04/01 updated for new wscons 43 */ 44 45#include "opt_compat.h" 46#include "opt_ddb.h" 47#include "opt_platform.h" 48#include "opt_sched.h" 49#include "opt_timer.h" 50 51#include <sys/cdefs.h> 52__FBSDID("$FreeBSD: stable/10/sys/arm/arm/machdep.c 266086 2014-05-14 20:17:31Z ian $"); 53 54#include <sys/param.h> 55#include <sys/proc.h> 56#include <sys/systm.h> 57#include <sys/bio.h> 58#include <sys/buf.h> 59#include <sys/bus.h> 60#include <sys/cons.h> 61#include <sys/cpu.h> 62#include <sys/exec.h> 63#include <sys/imgact.h> 64#include <sys/kdb.h> 65#include <sys/kernel.h> 66#include <sys/ktr.h> 67#include <sys/linker.h> 68#include <sys/lock.h> 69#include <sys/malloc.h> 70#include <sys/msgbuf.h> 71#include <sys/mutex.h> 72#include <sys/pcpu.h> 73#include <sys/ptrace.h> 74#include <sys/rwlock.h> 75#include <sys/sched.h> 76#include <sys/signalvar.h> 77#include <sys/syscallsubr.h> 78#include <sys/sysctl.h> 79#include <sys/sysent.h> 80#include <sys/sysproto.h> 81#include <sys/uio.h> 82 83#include <vm/vm.h> 84#include <vm/pmap.h> 85#include <vm/vm_map.h> 86#include <vm/vm_object.h> 87#include <vm/vm_page.h> 88#include <vm/vm_pager.h> 89 90#include <machine/armreg.h> 91#include <machine/atags.h> 92#include <machine/cpu.h> 93#include <machine/devmap.h> 94#include <machine/frame.h> 95#include <machine/intr.h> 96#include <machine/machdep.h> 97#include <machine/md_var.h> 98#include <machine/metadata.h> 99#include <machine/pcb.h> 100#include <machine/reg.h> 101#include <machine/trap.h> 102#include <machine/undefined.h> 103#include <machine/vmparam.h> 104#include <machine/sysarch.h> 105 106#ifdef FDT 107#include <dev/fdt/fdt_common.h> 108#include <dev/ofw/openfirm.h> 109#endif 110 111#ifdef DEBUG 112#define debugf(fmt, args...) printf(fmt, ##args) 113#else 114#define debugf(fmt, args...) 115#endif 116 117struct pcpu __pcpu[MAXCPU]; 118struct pcpu *pcpup = &__pcpu[0]; 119 120static struct trapframe proc0_tf; 121uint32_t cpu_reset_address = 0; 122int cold = 1; 123vm_offset_t vector_page; 124 125long realmem = 0; 126 127int (*_arm_memcpy)(void *, void *, int, int) = NULL; 128int (*_arm_bzero)(void *, int, int) = NULL; 129int _min_memcpy_size = 0; 130int _min_bzero_size = 0; 131 132extern int *end; 133#ifdef DDB 134extern vm_offset_t ksym_start, ksym_end; 135#endif 136 137#ifdef FDT 138/* 139 * This is the number of L2 page tables required for covering max 140 * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf, 141 * stacks etc.), uprounded to be divisible by 4. 142 */ 143#define KERNEL_PT_MAX 78 144 145static struct pv_addr kernel_pt_table[KERNEL_PT_MAX]; 146 147vm_paddr_t phys_avail[10]; 148vm_paddr_t dump_avail[4]; 149 150extern u_int data_abort_handler_address; 151extern u_int prefetch_abort_handler_address; 152extern u_int undefined_handler_address; 153 154vm_paddr_t pmap_pa; 155 156struct pv_addr systempage; 157static struct pv_addr msgbufpv; 158struct pv_addr irqstack; 159struct pv_addr undstack; 160struct pv_addr abtstack; 161static struct pv_addr kernelstack; 162 163#endif 164 165#if defined(LINUX_BOOT_ABI) 166#define LBABI_MAX_BANKS 10 167 168uint32_t board_id; 169struct arm_lbabi_tag *atag_list; 170char linux_command_line[LBABI_MAX_COMMAND_LINE + 1]; 171char atags[LBABI_MAX_COMMAND_LINE * 2]; 172uint32_t memstart[LBABI_MAX_BANKS]; 173uint32_t memsize[LBABI_MAX_BANKS]; 174uint32_t membanks; 175#endif 176 177static uint32_t board_revision; 178/* hex representation of uint64_t */ 179static char board_serial[32]; 180 181SYSCTL_NODE(_hw, OID_AUTO, board, CTLFLAG_RD, 0, "Board attributes"); 182SYSCTL_UINT(_hw_board, OID_AUTO, revision, CTLFLAG_RD, 183 &board_revision, 0, "Board revision"); 184SYSCTL_STRING(_hw_board, OID_AUTO, serial, CTLFLAG_RD, 185 board_serial, 0, "Board serial"); 186 187int vfp_exists; 188SYSCTL_INT(_hw, HW_FLOATINGPT, floatingpoint, CTLFLAG_RD, 189 &vfp_exists, 0, "Floating point support enabled"); 190 191void 192board_set_serial(uint64_t serial) 193{ 194 195 snprintf(board_serial, sizeof(board_serial)-1, 196 "%016jx", serial); 197} 198 199void 200board_set_revision(uint32_t revision) 201{ 202 203 board_revision = revision; 204} 205 206void 207sendsig(catcher, ksi, mask) 208 sig_t catcher; 209 ksiginfo_t *ksi; 210 sigset_t *mask; 211{ 212 struct thread *td; 213 struct proc *p; 214 struct trapframe *tf; 215 struct sigframe *fp, frame; 216 struct sigacts *psp; 217 int onstack; 218 int sig; 219 int code; 220 221 td = curthread; 222 p = td->td_proc; 223 PROC_LOCK_ASSERT(p, MA_OWNED); 224 sig = ksi->ksi_signo; 225 code = ksi->ksi_code; 226 psp = p->p_sigacts; 227 mtx_assert(&psp->ps_mtx, MA_OWNED); 228 tf = td->td_frame; 229 onstack = sigonstack(tf->tf_usr_sp); 230 231 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm, 232 catcher, sig); 233 234 /* Allocate and validate space for the signal handler context. */ 235 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !(onstack) && 236 SIGISMEMBER(psp->ps_sigonstack, sig)) { 237 fp = (struct sigframe *)(td->td_sigstk.ss_sp + 238 td->td_sigstk.ss_size); 239#if defined(COMPAT_43) 240 td->td_sigstk.ss_flags |= SS_ONSTACK; 241#endif 242 } else 243 fp = (struct sigframe *)td->td_frame->tf_usr_sp; 244 245 /* make room on the stack */ 246 fp--; 247 248 /* make the stack aligned */ 249 fp = (struct sigframe *)STACKALIGN(fp); 250 /* Populate the siginfo frame. */ 251 get_mcontext(td, &frame.sf_uc.uc_mcontext, 0); 252 frame.sf_si = ksi->ksi_info; 253 frame.sf_uc.uc_sigmask = *mask; 254 frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK ) 255 ? ((onstack) ? SS_ONSTACK : 0) : SS_DISABLE; 256 frame.sf_uc.uc_stack = td->td_sigstk; 257 mtx_unlock(&psp->ps_mtx); 258 PROC_UNLOCK(td->td_proc); 259 260 /* Copy the sigframe out to the user's stack. */ 261 if (copyout(&frame, fp, sizeof(*fp)) != 0) { 262 /* Process has trashed its stack. Kill it. */ 263 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp); 264 PROC_LOCK(p); 265 sigexit(td, SIGILL); 266 } 267 268 /* Translate the signal if appropriate. */ 269 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 270 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 271 272 /* 273 * Build context to run handler in. We invoke the handler 274 * directly, only returning via the trampoline. Note the 275 * trampoline version numbers are coordinated with machine- 276 * dependent code in libc. 277 */ 278 279 tf->tf_r0 = sig; 280 tf->tf_r1 = (register_t)&fp->sf_si; 281 tf->tf_r2 = (register_t)&fp->sf_uc; 282 283 /* the trampoline uses r5 as the uc address */ 284 tf->tf_r5 = (register_t)&fp->sf_uc; 285 tf->tf_pc = (register_t)catcher; 286 tf->tf_usr_sp = (register_t)fp; 287 tf->tf_usr_lr = (register_t)(PS_STRINGS - *(p->p_sysent->sv_szsigcode)); 288 289 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_usr_lr, 290 tf->tf_usr_sp); 291 292 PROC_LOCK(p); 293 mtx_lock(&psp->ps_mtx); 294} 295 296struct kva_md_info kmi; 297 298/* 299 * arm32_vector_init: 300 * 301 * Initialize the vector page, and select whether or not to 302 * relocate the vectors. 303 * 304 * NOTE: We expect the vector page to be mapped at its expected 305 * destination. 306 */ 307 308extern unsigned int page0[], page0_data[]; 309void 310arm_vector_init(vm_offset_t va, int which) 311{ 312 unsigned int *vectors = (int *) va; 313 unsigned int *vectors_data = vectors + (page0_data - page0); 314 int vec; 315 316 /* 317 * Loop through the vectors we're taking over, and copy the 318 * vector's insn and data word. 319 */ 320 for (vec = 0; vec < ARM_NVEC; vec++) { 321 if ((which & (1 << vec)) == 0) { 322 /* Don't want to take over this vector. */ 323 continue; 324 } 325 vectors[vec] = page0[vec]; 326 vectors_data[vec] = page0_data[vec]; 327 } 328 329 /* Now sync the vectors. */ 330 cpu_icache_sync_range(va, (ARM_NVEC * 2) * sizeof(u_int)); 331 332 vector_page = va; 333 334 if (va == ARM_VECTORS_HIGH) { 335 /* 336 * Assume the MD caller knows what it's doing here, and 337 * really does want the vector page relocated. 338 * 339 * Note: This has to be done here (and not just in 340 * cpu_setup()) because the vector page needs to be 341 * accessible *before* cpu_startup() is called. 342 * Think ddb(9) ... 343 * 344 * NOTE: If the CPU control register is not readable, 345 * this will totally fail! We'll just assume that 346 * any system that has high vector support has a 347 * readable CPU control register, for now. If we 348 * ever encounter one that does not, we'll have to 349 * rethink this. 350 */ 351 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC); 352 } 353} 354 355static void 356cpu_startup(void *dummy) 357{ 358 struct pcb *pcb = thread0.td_pcb; 359#ifdef ARM_TP_ADDRESS 360#ifndef ARM_CACHE_LOCK_ENABLE 361 vm_page_t m; 362#endif 363#endif 364 365 identify_arm_cpu(); 366 367 printf("real memory = %ju (%ju MB)\n", (uintmax_t)ptoa(physmem), 368 (uintmax_t)ptoa(physmem) / 1048576); 369 realmem = physmem; 370 371 /* 372 * Display the RAM layout. 373 */ 374 if (bootverbose) { 375 int indx; 376 377 printf("Physical memory chunk(s):\n"); 378 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 379 vm_paddr_t size; 380 381 size = phys_avail[indx + 1] - phys_avail[indx]; 382 printf(" 0x%08jx - 0x%08jx, %ju KBytes (%ju pages)\n", 383 (uintmax_t)phys_avail[indx], 384 (uintmax_t)phys_avail[indx + 1] - 1, 385 (uintmax_t)size / 1024, (uintmax_t)size / PAGE_SIZE); 386 } 387 } 388 389 vm_ksubmap_init(&kmi); 390 391 printf("avail memory = %ju (%ju MB)\n", 392 (uintmax_t)ptoa(cnt.v_free_count), 393 (uintmax_t)ptoa(cnt.v_free_count) / 1048576); 394 395 if (bootverbose) 396 arm_devmap_print_table(); 397 398 bufinit(); 399 vm_pager_bufferinit(); 400 pcb->un_32.pcb32_und_sp = (u_int)thread0.td_kstack + 401 USPACE_UNDEF_STACK_TOP; 402 pcb->un_32.pcb32_sp = (u_int)thread0.td_kstack + 403 USPACE_SVC_STACK_TOP; 404 vector_page_setprot(VM_PROT_READ); 405 pmap_set_pcb_pagedir(pmap_kernel(), pcb); 406 pmap_postinit(); 407#ifdef ARM_TP_ADDRESS 408#ifdef ARM_CACHE_LOCK_ENABLE 409 pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS); 410 arm_lock_cache_line(ARM_TP_ADDRESS); 411#else 412 m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO); 413 pmap_kenter_user(ARM_TP_ADDRESS, VM_PAGE_TO_PHYS(m)); 414#endif 415 *(uint32_t *)ARM_RAS_START = 0; 416 *(uint32_t *)ARM_RAS_END = 0xffffffff; 417#endif 418} 419 420SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); 421 422/* 423 * Flush the D-cache for non-DMA I/O so that the I-cache can 424 * be made coherent later. 425 */ 426void 427cpu_flush_dcache(void *ptr, size_t len) 428{ 429 430 cpu_dcache_wb_range((uintptr_t)ptr, len); 431 cpu_l2cache_wb_range((uintptr_t)ptr, len); 432} 433 434/* Get current clock frequency for the given cpu id. */ 435int 436cpu_est_clockrate(int cpu_id, uint64_t *rate) 437{ 438 439 return (ENXIO); 440} 441 442void 443cpu_idle(int busy) 444{ 445 446 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d", 447 busy, curcpu); 448#ifndef NO_EVENTTIMERS 449 if (!busy) { 450 critical_enter(); 451 cpu_idleclock(); 452 } 453#endif 454 if (!sched_runnable()) 455 cpu_sleep(0); 456#ifndef NO_EVENTTIMERS 457 if (!busy) { 458 cpu_activeclock(); 459 critical_exit(); 460 } 461#endif 462 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done", 463 busy, curcpu); 464} 465 466int 467cpu_idle_wakeup(int cpu) 468{ 469 470 return (0); 471} 472 473int 474fill_regs(struct thread *td, struct reg *regs) 475{ 476 struct trapframe *tf = td->td_frame; 477 bcopy(&tf->tf_r0, regs->r, sizeof(regs->r)); 478 regs->r_sp = tf->tf_usr_sp; 479 regs->r_lr = tf->tf_usr_lr; 480 regs->r_pc = tf->tf_pc; 481 regs->r_cpsr = tf->tf_spsr; 482 return (0); 483} 484int 485fill_fpregs(struct thread *td, struct fpreg *regs) 486{ 487 bzero(regs, sizeof(*regs)); 488 return (0); 489} 490 491int 492set_regs(struct thread *td, struct reg *regs) 493{ 494 struct trapframe *tf = td->td_frame; 495 496 bcopy(regs->r, &tf->tf_r0, sizeof(regs->r)); 497 tf->tf_usr_sp = regs->r_sp; 498 tf->tf_usr_lr = regs->r_lr; 499 tf->tf_pc = regs->r_pc; 500 tf->tf_spsr &= ~PSR_FLAGS; 501 tf->tf_spsr |= regs->r_cpsr & PSR_FLAGS; 502 return (0); 503} 504 505int 506set_fpregs(struct thread *td, struct fpreg *regs) 507{ 508 return (0); 509} 510 511int 512fill_dbregs(struct thread *td, struct dbreg *regs) 513{ 514 return (0); 515} 516int 517set_dbregs(struct thread *td, struct dbreg *regs) 518{ 519 return (0); 520} 521 522 523static int 524ptrace_read_int(struct thread *td, vm_offset_t addr, u_int32_t *v) 525{ 526 struct iovec iov; 527 struct uio uio; 528 529 PROC_LOCK_ASSERT(td->td_proc, MA_NOTOWNED); 530 iov.iov_base = (caddr_t) v; 531 iov.iov_len = sizeof(u_int32_t); 532 uio.uio_iov = &iov; 533 uio.uio_iovcnt = 1; 534 uio.uio_offset = (off_t)addr; 535 uio.uio_resid = sizeof(u_int32_t); 536 uio.uio_segflg = UIO_SYSSPACE; 537 uio.uio_rw = UIO_READ; 538 uio.uio_td = td; 539 return proc_rwmem(td->td_proc, &uio); 540} 541 542static int 543ptrace_write_int(struct thread *td, vm_offset_t addr, u_int32_t v) 544{ 545 struct iovec iov; 546 struct uio uio; 547 548 PROC_LOCK_ASSERT(td->td_proc, MA_NOTOWNED); 549 iov.iov_base = (caddr_t) &v; 550 iov.iov_len = sizeof(u_int32_t); 551 uio.uio_iov = &iov; 552 uio.uio_iovcnt = 1; 553 uio.uio_offset = (off_t)addr; 554 uio.uio_resid = sizeof(u_int32_t); 555 uio.uio_segflg = UIO_SYSSPACE; 556 uio.uio_rw = UIO_WRITE; 557 uio.uio_td = td; 558 return proc_rwmem(td->td_proc, &uio); 559} 560 561int 562ptrace_single_step(struct thread *td) 563{ 564 struct proc *p; 565 int error; 566 567 KASSERT(td->td_md.md_ptrace_instr == 0, 568 ("Didn't clear single step")); 569 p = td->td_proc; 570 PROC_UNLOCK(p); 571 error = ptrace_read_int(td, td->td_frame->tf_pc + 4, 572 &td->td_md.md_ptrace_instr); 573 if (error) 574 goto out; 575 error = ptrace_write_int(td, td->td_frame->tf_pc + 4, 576 PTRACE_BREAKPOINT); 577 if (error) 578 td->td_md.md_ptrace_instr = 0; 579 td->td_md.md_ptrace_addr = td->td_frame->tf_pc + 4; 580out: 581 PROC_LOCK(p); 582 return (error); 583} 584 585int 586ptrace_clear_single_step(struct thread *td) 587{ 588 struct proc *p; 589 590 if (td->td_md.md_ptrace_instr) { 591 p = td->td_proc; 592 PROC_UNLOCK(p); 593 ptrace_write_int(td, td->td_md.md_ptrace_addr, 594 td->td_md.md_ptrace_instr); 595 PROC_LOCK(p); 596 td->td_md.md_ptrace_instr = 0; 597 } 598 return (0); 599} 600 601int 602ptrace_set_pc(struct thread *td, unsigned long addr) 603{ 604 td->td_frame->tf_pc = addr; 605 return (0); 606} 607 608void 609cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 610{ 611} 612 613void 614spinlock_enter(void) 615{ 616 struct thread *td; 617 register_t cspr; 618 619 td = curthread; 620 if (td->td_md.md_spinlock_count == 0) { 621 cspr = disable_interrupts(I32_bit | F32_bit); 622 td->td_md.md_spinlock_count = 1; 623 td->td_md.md_saved_cspr = cspr; 624 } else 625 td->td_md.md_spinlock_count++; 626 critical_enter(); 627} 628 629void 630spinlock_exit(void) 631{ 632 struct thread *td; 633 register_t cspr; 634 635 td = curthread; 636 critical_exit(); 637 cspr = td->td_md.md_saved_cspr; 638 td->td_md.md_spinlock_count--; 639 if (td->td_md.md_spinlock_count == 0) 640 restore_interrupts(cspr); 641} 642 643/* 644 * Clear registers on exec 645 */ 646void 647exec_setregs(struct thread *td, struct image_params *imgp, u_long stack) 648{ 649 struct trapframe *tf = td->td_frame; 650 651 memset(tf, 0, sizeof(*tf)); 652 tf->tf_usr_sp = stack; 653 tf->tf_usr_lr = imgp->entry_addr; 654 tf->tf_svc_lr = 0x77777777; 655 tf->tf_pc = imgp->entry_addr; 656 tf->tf_spsr = PSR_USR32_MODE; 657} 658 659/* 660 * Get machine context. 661 */ 662int 663get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret) 664{ 665 struct trapframe *tf = td->td_frame; 666 __greg_t *gr = mcp->__gregs; 667 668 if (clear_ret & GET_MC_CLEAR_RET) 669 gr[_REG_R0] = 0; 670 else 671 gr[_REG_R0] = tf->tf_r0; 672 gr[_REG_R1] = tf->tf_r1; 673 gr[_REG_R2] = tf->tf_r2; 674 gr[_REG_R3] = tf->tf_r3; 675 gr[_REG_R4] = tf->tf_r4; 676 gr[_REG_R5] = tf->tf_r5; 677 gr[_REG_R6] = tf->tf_r6; 678 gr[_REG_R7] = tf->tf_r7; 679 gr[_REG_R8] = tf->tf_r8; 680 gr[_REG_R9] = tf->tf_r9; 681 gr[_REG_R10] = tf->tf_r10; 682 gr[_REG_R11] = tf->tf_r11; 683 gr[_REG_R12] = tf->tf_r12; 684 gr[_REG_SP] = tf->tf_usr_sp; 685 gr[_REG_LR] = tf->tf_usr_lr; 686 gr[_REG_PC] = tf->tf_pc; 687 gr[_REG_CPSR] = tf->tf_spsr; 688 689 return (0); 690} 691 692/* 693 * Set machine context. 694 * 695 * However, we don't set any but the user modifiable flags, and we won't 696 * touch the cs selector. 697 */ 698int 699set_mcontext(struct thread *td, const mcontext_t *mcp) 700{ 701 struct trapframe *tf = td->td_frame; 702 const __greg_t *gr = mcp->__gregs; 703 704 tf->tf_r0 = gr[_REG_R0]; 705 tf->tf_r1 = gr[_REG_R1]; 706 tf->tf_r2 = gr[_REG_R2]; 707 tf->tf_r3 = gr[_REG_R3]; 708 tf->tf_r4 = gr[_REG_R4]; 709 tf->tf_r5 = gr[_REG_R5]; 710 tf->tf_r6 = gr[_REG_R6]; 711 tf->tf_r7 = gr[_REG_R7]; 712 tf->tf_r8 = gr[_REG_R8]; 713 tf->tf_r9 = gr[_REG_R9]; 714 tf->tf_r10 = gr[_REG_R10]; 715 tf->tf_r11 = gr[_REG_R11]; 716 tf->tf_r12 = gr[_REG_R12]; 717 tf->tf_usr_sp = gr[_REG_SP]; 718 tf->tf_usr_lr = gr[_REG_LR]; 719 tf->tf_pc = gr[_REG_PC]; 720 tf->tf_spsr = gr[_REG_CPSR]; 721 722 return (0); 723} 724 725/* 726 * MPSAFE 727 */ 728int 729sys_sigreturn(td, uap) 730 struct thread *td; 731 struct sigreturn_args /* { 732 const struct __ucontext *sigcntxp; 733 } */ *uap; 734{ 735 struct sigframe sf; 736 struct trapframe *tf; 737 int spsr; 738 739 if (uap == NULL) 740 return (EFAULT); 741 if (copyin(uap->sigcntxp, &sf, sizeof(sf))) 742 return (EFAULT); 743 /* 744 * Make sure the processor mode has not been tampered with and 745 * interrupts have not been disabled. 746 */ 747 spsr = sf.sf_uc.uc_mcontext.__gregs[_REG_CPSR]; 748 if ((spsr & PSR_MODE) != PSR_USR32_MODE || 749 (spsr & (I32_bit | F32_bit)) != 0) 750 return (EINVAL); 751 /* Restore register context. */ 752 tf = td->td_frame; 753 set_mcontext(td, &sf.sf_uc.uc_mcontext); 754 755 /* Restore signal mask. */ 756 kern_sigprocmask(td, SIG_SETMASK, &sf.sf_uc.uc_sigmask, NULL, 0); 757 758 return (EJUSTRETURN); 759} 760 761 762/* 763 * Construct a PCB from a trapframe. This is called from kdb_trap() where 764 * we want to start a backtrace from the function that caused us to enter 765 * the debugger. We have the context in the trapframe, but base the trace 766 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 767 * enough for a backtrace. 768 */ 769void 770makectx(struct trapframe *tf, struct pcb *pcb) 771{ 772 pcb->un_32.pcb32_r8 = tf->tf_r8; 773 pcb->un_32.pcb32_r9 = tf->tf_r9; 774 pcb->un_32.pcb32_r10 = tf->tf_r10; 775 pcb->un_32.pcb32_r11 = tf->tf_r11; 776 pcb->un_32.pcb32_r12 = tf->tf_r12; 777 pcb->un_32.pcb32_pc = tf->tf_pc; 778 pcb->un_32.pcb32_lr = tf->tf_usr_lr; 779 pcb->un_32.pcb32_sp = tf->tf_usr_sp; 780} 781 782/* 783 * Make a standard dump_avail array. Can't make the phys_avail 784 * since we need to do that after we call pmap_bootstrap, but this 785 * is needed before pmap_boostrap. 786 * 787 * ARM_USE_SMALL_ALLOC uses dump_avail, so it must be filled before 788 * calling pmap_bootstrap. 789 */ 790void 791arm_dump_avail_init(vm_offset_t ramsize, size_t max) 792{ 793#ifdef LINUX_BOOT_ABI 794 /* 795 * Linux boot loader passes us the actual banks of memory, so use them 796 * to construct the dump_avail array. 797 */ 798 if (membanks > 0) 799 { 800 int i, j; 801 802 if (max < (membanks + 1) * 2) 803 panic("dump_avail[%d] too small for %d banks\n", 804 max, membanks); 805 for (j = 0, i = 0; i < membanks; i++) { 806 dump_avail[j++] = round_page(memstart[i]); 807 dump_avail[j++] = trunc_page(memstart[i] + memsize[i]); 808 } 809 dump_avail[j++] = 0; 810 dump_avail[j++] = 0; 811 return; 812 } 813#endif 814 if (max < 4) 815 panic("dump_avail too small\n"); 816 817 dump_avail[0] = round_page(PHYSADDR); 818 dump_avail[1] = trunc_page(PHYSADDR + ramsize); 819 dump_avail[2] = 0; 820 dump_avail[3] = 0; 821} 822 823/* 824 * Fake up a boot descriptor table 825 */ 826vm_offset_t 827fake_preload_metadata(struct arm_boot_params *abp __unused) 828{ 829#ifdef DDB 830 vm_offset_t zstart = 0, zend = 0; 831#endif 832 vm_offset_t lastaddr; 833 int i = 0; 834 static uint32_t fake_preload[35]; 835 836 fake_preload[i++] = MODINFO_NAME; 837 fake_preload[i++] = strlen("kernel") + 1; 838 strcpy((char*)&fake_preload[i++], "kernel"); 839 i += 1; 840 fake_preload[i++] = MODINFO_TYPE; 841 fake_preload[i++] = strlen("elf kernel") + 1; 842 strcpy((char*)&fake_preload[i++], "elf kernel"); 843 i += 2; 844 fake_preload[i++] = MODINFO_ADDR; 845 fake_preload[i++] = sizeof(vm_offset_t); 846 fake_preload[i++] = KERNVIRTADDR; 847 fake_preload[i++] = MODINFO_SIZE; 848 fake_preload[i++] = sizeof(uint32_t); 849 fake_preload[i++] = (uint32_t)&end - KERNVIRTADDR; 850#ifdef DDB 851 if (*(uint32_t *)KERNVIRTADDR == MAGIC_TRAMP_NUMBER) { 852 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_SSYM; 853 fake_preload[i++] = sizeof(vm_offset_t); 854 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 4); 855 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_ESYM; 856 fake_preload[i++] = sizeof(vm_offset_t); 857 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 8); 858 lastaddr = *(uint32_t *)(KERNVIRTADDR + 8); 859 zend = lastaddr; 860 zstart = *(uint32_t *)(KERNVIRTADDR + 4); 861 ksym_start = zstart; 862 ksym_end = zend; 863 } else 864#endif 865 lastaddr = (vm_offset_t)&end; 866 fake_preload[i++] = 0; 867 fake_preload[i] = 0; 868 preload_metadata = (void *)fake_preload; 869 870 return (lastaddr); 871} 872 873void 874pcpu0_init(void) 875{ 876#if ARM_ARCH_6 || ARM_ARCH_7A || defined(CPU_MV_PJ4B) 877 set_pcpu(pcpup); 878#endif 879 pcpu_init(pcpup, 0, sizeof(struct pcpu)); 880 PCPU_SET(curthread, &thread0); 881#ifdef VFP 882 PCPU_SET(cpu, 0); 883#endif 884} 885 886#if defined(LINUX_BOOT_ABI) 887vm_offset_t 888linux_parse_boot_param(struct arm_boot_params *abp) 889{ 890 struct arm_lbabi_tag *walker; 891 uint32_t revision; 892 uint64_t serial; 893 894 /* 895 * Linux boot ABI: r0 = 0, r1 is the board type (!= 0) and r2 896 * is atags or dtb pointer. If all of these aren't satisfied, 897 * then punt. 898 */ 899 if (!(abp->abp_r0 == 0 && abp->abp_r1 != 0 && abp->abp_r2 != 0)) 900 return 0; 901 902 board_id = abp->abp_r1; 903 walker = (struct arm_lbabi_tag *) 904 (abp->abp_r2 + KERNVIRTADDR - KERNPHYSADDR); 905 906 /* xxx - Need to also look for binary device tree */ 907 if (ATAG_TAG(walker) != ATAG_CORE) 908 return 0; 909 910 atag_list = walker; 911 while (ATAG_TAG(walker) != ATAG_NONE) { 912 switch (ATAG_TAG(walker)) { 913 case ATAG_CORE: 914 break; 915 case ATAG_MEM: 916 if (membanks < LBABI_MAX_BANKS) { 917 memstart[membanks] = walker->u.tag_mem.start; 918 memsize[membanks] = walker->u.tag_mem.size; 919 } 920 membanks++; 921 break; 922 case ATAG_INITRD2: 923 break; 924 case ATAG_SERIAL: 925 serial = walker->u.tag_sn.low | 926 ((uint64_t)walker->u.tag_sn.high << 32); 927 board_set_serial(serial); 928 break; 929 case ATAG_REVISION: 930 revision = walker->u.tag_rev.rev; 931 board_set_revision(revision); 932 break; 933 case ATAG_CMDLINE: 934 /* XXX open question: Parse this for boothowto? */ 935 bcopy(walker->u.tag_cmd.command, linux_command_line, 936 ATAG_SIZE(walker)); 937 break; 938 default: 939 break; 940 } 941 walker = ATAG_NEXT(walker); 942 } 943 944 /* Save a copy for later */ 945 bcopy(atag_list, atags, 946 (char *)walker - (char *)atag_list + ATAG_SIZE(walker)); 947 948 return fake_preload_metadata(abp); 949} 950#endif 951 952#if defined(FREEBSD_BOOT_LOADER) 953vm_offset_t 954freebsd_parse_boot_param(struct arm_boot_params *abp) 955{ 956 vm_offset_t lastaddr = 0; 957 void *mdp; 958 void *kmdp; 959 960 /* 961 * Mask metadata pointer: it is supposed to be on page boundary. If 962 * the first argument (mdp) doesn't point to a valid address the 963 * bootloader must have passed us something else than the metadata 964 * ptr, so we give up. Also give up if we cannot find metadta section 965 * the loader creates that we get all this data out of. 966 */ 967 968 if ((mdp = (void *)(abp->abp_r0 & ~PAGE_MASK)) == NULL) 969 return 0; 970 preload_metadata = mdp; 971 kmdp = preload_search_by_type("elf kernel"); 972 if (kmdp == NULL) 973 return 0; 974 975 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int); 976 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *); 977 lastaddr = MD_FETCH(kmdp, MODINFOMD_KERNEND, vm_offset_t); 978#ifdef DDB 979 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t); 980 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t); 981#endif 982 preload_addr_relocate = KERNVIRTADDR - KERNPHYSADDR; 983 return lastaddr; 984} 985#endif 986 987vm_offset_t 988default_parse_boot_param(struct arm_boot_params *abp) 989{ 990 vm_offset_t lastaddr; 991 992#if defined(LINUX_BOOT_ABI) 993 if ((lastaddr = linux_parse_boot_param(abp)) != 0) 994 return lastaddr; 995#endif 996#if defined(FREEBSD_BOOT_LOADER) 997 if ((lastaddr = freebsd_parse_boot_param(abp)) != 0) 998 return lastaddr; 999#endif 1000 /* Fall back to hardcoded metadata. */ 1001 lastaddr = fake_preload_metadata(abp); 1002 1003 return lastaddr; 1004} 1005 1006/* 1007 * Stub version of the boot parameter parsing routine. We are 1008 * called early in initarm, before even VM has been initialized. 1009 * This routine needs to preserve any data that the boot loader 1010 * has passed in before the kernel starts to grow past the end 1011 * of the BSS, traditionally the place boot-loaders put this data. 1012 * 1013 * Since this is called so early, things that depend on the vm system 1014 * being setup (including access to some SoC's serial ports), about 1015 * all that can be done in this routine is to copy the arguments. 1016 * 1017 * This is the default boot parameter parsing routine. Individual 1018 * kernels/boards can override this weak function with one of their 1019 * own. We just fake metadata... 1020 */ 1021__weak_reference(default_parse_boot_param, parse_boot_param); 1022 1023/* 1024 * Initialize proc0 1025 */ 1026void 1027init_proc0(vm_offset_t kstack) 1028{ 1029 proc_linkup0(&proc0, &thread0); 1030 thread0.td_kstack = kstack; 1031 thread0.td_pcb = (struct pcb *) 1032 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 1033 thread0.td_pcb->pcb_flags = 0; 1034 thread0.td_frame = &proc0_tf; 1035 pcpup->pc_curpcb = thread0.td_pcb; 1036} 1037 1038void 1039set_stackptrs(int cpu) 1040{ 1041 1042 set_stackptr(PSR_IRQ32_MODE, 1043 irqstack.pv_va + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 1044 set_stackptr(PSR_ABT32_MODE, 1045 abtstack.pv_va + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 1046 set_stackptr(PSR_UND32_MODE, 1047 undstack.pv_va + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 1048} 1049 1050#ifdef FDT 1051static char * 1052kenv_next(char *cp) 1053{ 1054 1055 if (cp != NULL) { 1056 while (*cp != 0) 1057 cp++; 1058 cp++; 1059 if (*cp == 0) 1060 cp = NULL; 1061 } 1062 return (cp); 1063} 1064 1065static void 1066print_kenv(void) 1067{ 1068 int len; 1069 char *cp; 1070 1071 debugf("loader passed (static) kenv:\n"); 1072 if (kern_envp == NULL) { 1073 debugf(" no env, null ptr\n"); 1074 return; 1075 } 1076 debugf(" kern_envp = 0x%08x\n", (uint32_t)kern_envp); 1077 1078 len = 0; 1079 for (cp = kern_envp; cp != NULL; cp = kenv_next(cp)) 1080 debugf(" %x %s\n", (uint32_t)cp, cp); 1081} 1082 1083static void 1084physmap_init(struct mem_region *availmem_regions, int availmem_regions_sz) 1085{ 1086 int i, j, cnt; 1087 vm_offset_t phys_kernelend, kernload; 1088 uint32_t s, e, sz; 1089 struct mem_region *mp, *mp1; 1090 1091 phys_kernelend = KERNPHYSADDR + (virtual_avail - KERNVIRTADDR); 1092 kernload = KERNPHYSADDR; 1093 1094 /* 1095 * Remove kernel physical address range from avail 1096 * regions list. Page align all regions. 1097 * Non-page aligned memory isn't very interesting to us. 1098 * Also, sort the entries for ascending addresses. 1099 */ 1100 sz = 0; 1101 cnt = availmem_regions_sz; 1102 debugf("processing avail regions:\n"); 1103 for (mp = availmem_regions; mp->mr_size; mp++) { 1104 s = mp->mr_start; 1105 e = mp->mr_start + mp->mr_size; 1106 debugf(" %08x-%08x -> ", s, e); 1107 /* Check whether this region holds all of the kernel. */ 1108 if (s < kernload && e > phys_kernelend) { 1109 availmem_regions[cnt].mr_start = phys_kernelend; 1110 availmem_regions[cnt++].mr_size = e - phys_kernelend; 1111 e = kernload; 1112 } 1113 /* Look whether this regions starts within the kernel. */ 1114 if (s >= kernload && s < phys_kernelend) { 1115 if (e <= phys_kernelend) 1116 goto empty; 1117 s = phys_kernelend; 1118 } 1119 /* Now look whether this region ends within the kernel. */ 1120 if (e > kernload && e <= phys_kernelend) { 1121 if (s >= kernload) { 1122 goto empty; 1123 } 1124 e = kernload; 1125 } 1126 /* Now page align the start and size of the region. */ 1127 s = round_page(s); 1128 e = trunc_page(e); 1129 if (e < s) 1130 e = s; 1131 sz = e - s; 1132 debugf("%08x-%08x = %x\n", s, e, sz); 1133 1134 /* Check whether some memory is left here. */ 1135 if (sz == 0) { 1136 empty: 1137 printf("skipping\n"); 1138 bcopy(mp + 1, mp, 1139 (cnt - (mp - availmem_regions)) * sizeof(*mp)); 1140 cnt--; 1141 mp--; 1142 continue; 1143 } 1144 1145 /* Do an insertion sort. */ 1146 for (mp1 = availmem_regions; mp1 < mp; mp1++) 1147 if (s < mp1->mr_start) 1148 break; 1149 if (mp1 < mp) { 1150 bcopy(mp1, mp1 + 1, (char *)mp - (char *)mp1); 1151 mp1->mr_start = s; 1152 mp1->mr_size = sz; 1153 } else { 1154 mp->mr_start = s; 1155 mp->mr_size = sz; 1156 } 1157 } 1158 availmem_regions_sz = cnt; 1159 1160 /* Fill in phys_avail table, based on availmem_regions */ 1161 debugf("fill in phys_avail:\n"); 1162 for (i = 0, j = 0; i < availmem_regions_sz; i++, j += 2) { 1163 1164 debugf(" region: 0x%08x - 0x%08x (0x%08x)\n", 1165 availmem_regions[i].mr_start, 1166 availmem_regions[i].mr_start + availmem_regions[i].mr_size, 1167 availmem_regions[i].mr_size); 1168 1169 /* 1170 * We should not map the page at PA 0x0000000, the VM can't 1171 * handle it, as pmap_extract() == 0 means failure. 1172 */ 1173 if (availmem_regions[i].mr_start > 0 || 1174 availmem_regions[i].mr_size > PAGE_SIZE) { 1175 phys_avail[j] = availmem_regions[i].mr_start; 1176 if (phys_avail[j] == 0) 1177 phys_avail[j] += PAGE_SIZE; 1178 phys_avail[j + 1] = availmem_regions[i].mr_start + 1179 availmem_regions[i].mr_size; 1180 } else 1181 j -= 2; 1182 } 1183 phys_avail[j] = 0; 1184 phys_avail[j + 1] = 0; 1185} 1186 1187void * 1188initarm(struct arm_boot_params *abp) 1189{ 1190 struct mem_region memory_regions[FDT_MEM_REGIONS]; 1191 struct mem_region availmem_regions[FDT_MEM_REGIONS]; 1192 struct mem_region reserved_regions[FDT_MEM_REGIONS]; 1193 struct pv_addr kernel_l1pt; 1194 struct pv_addr dpcpu; 1195 vm_offset_t dtbp, freemempos, l2_start, lastaddr; 1196 uint32_t memsize, l2size; 1197 char *env; 1198 void *kmdp; 1199 u_int l1pagetable; 1200 int i = 0, j = 0, err_devmap = 0; 1201 int memory_regions_sz; 1202 int availmem_regions_sz; 1203 int reserved_regions_sz; 1204 vm_offset_t start, end; 1205 vm_offset_t rstart, rend; 1206 int curr; 1207 1208 lastaddr = parse_boot_param(abp); 1209 memsize = 0; 1210 set_cpufuncs(); 1211 1212 /* 1213 * Find the dtb passed in by the boot loader. 1214 */ 1215 kmdp = preload_search_by_type("elf kernel"); 1216 if (kmdp != NULL) 1217 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t); 1218 else 1219 dtbp = (vm_offset_t)NULL; 1220 1221#if defined(FDT_DTB_STATIC) 1222 /* 1223 * In case the device tree blob was not retrieved (from metadata) try 1224 * to use the statically embedded one. 1225 */ 1226 if (dtbp == (vm_offset_t)NULL) 1227 dtbp = (vm_offset_t)&fdt_static_dtb; 1228#endif 1229 1230 if (OF_install(OFW_FDT, 0) == FALSE) 1231 while (1); 1232 1233 if (OF_init((void *)dtbp) != 0) 1234 while (1); 1235 1236 /* Grab physical memory regions information from device tree. */ 1237 if (fdt_get_mem_regions(memory_regions, &memory_regions_sz, 1238 &memsize) != 0) 1239 while(1); 1240 1241 /* Grab physical memory regions information from device tree. */ 1242 if (fdt_get_reserved_regions(reserved_regions, &reserved_regions_sz) != 0) 1243 reserved_regions_sz = 0; 1244 1245 /* 1246 * Now exclude all the reserved regions 1247 */ 1248 curr = 0; 1249 for (i = 0; i < memory_regions_sz; i++) { 1250 start = memory_regions[i].mr_start; 1251 end = start + memory_regions[i].mr_size; 1252 for (j = 0; j < reserved_regions_sz; j++) { 1253 rstart = reserved_regions[j].mr_start; 1254 rend = rstart + reserved_regions[j].mr_size; 1255 /* 1256 * Restricted region is before available 1257 * Skip restricted region 1258 */ 1259 if (rend <= start) 1260 continue; 1261 /* 1262 * Restricted region is behind available 1263 * No further processing required 1264 */ 1265 if (rstart >= end) 1266 break; 1267 /* 1268 * Restricted region includes memory region 1269 * skip available region 1270 */ 1271 if ((start >= rstart) && (rend >= end)) { 1272 start = rend; 1273 end = rend; 1274 break; 1275 } 1276 /* 1277 * Memory region includes restricted region 1278 */ 1279 if ((rstart > start) && (end > rend)) { 1280 availmem_regions[curr].mr_start = start; 1281 availmem_regions[curr++].mr_size = rstart - start; 1282 start = rend; 1283 break; 1284 } 1285 /* 1286 * Memory region partially overlaps with restricted 1287 */ 1288 if ((rstart >= start) && (rstart <= end)) { 1289 end = rstart; 1290 } 1291 else if ((rend >= start) && (rend <= end)) { 1292 start = rend; 1293 } 1294 } 1295 1296 if (end > start) { 1297 availmem_regions[curr].mr_start = start; 1298 availmem_regions[curr++].mr_size = end - start; 1299 } 1300 } 1301 1302 availmem_regions_sz = curr; 1303 1304 /* Platform-specific initialisation */ 1305 initarm_early_init(); 1306 1307 pcpu0_init(); 1308 1309 /* Do basic tuning, hz etc */ 1310 init_param1(); 1311 1312 /* Calculate number of L2 tables needed for mapping vm_page_array */ 1313 l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page); 1314 l2size = (l2size >> L1_S_SHIFT) + 1; 1315 1316 /* 1317 * Add one table for end of kernel map, one for stacks, msgbuf and 1318 * L1 and L2 tables map and one for vectors map. 1319 */ 1320 l2size += 3; 1321 1322 /* Make it divisible by 4 */ 1323 l2size = (l2size + 3) & ~3; 1324 1325 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK; 1326 1327 /* Define a macro to simplify memory allocation */ 1328#define valloc_pages(var, np) \ 1329 alloc_pages((var).pv_va, (np)); \ 1330 (var).pv_pa = (var).pv_va + (KERNPHYSADDR - KERNVIRTADDR); 1331 1332#define alloc_pages(var, np) \ 1333 (var) = freemempos; \ 1334 freemempos += (np * PAGE_SIZE); \ 1335 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 1336 1337 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0) 1338 freemempos += PAGE_SIZE; 1339 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 1340 1341 for (i = 0; i < l2size; ++i) { 1342 if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) { 1343 valloc_pages(kernel_pt_table[i], 1344 L2_TABLE_SIZE / PAGE_SIZE); 1345 j = i; 1346 } else { 1347 kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va + 1348 L2_TABLE_SIZE_REAL * (i - j); 1349 kernel_pt_table[i].pv_pa = 1350 kernel_pt_table[i].pv_va - KERNVIRTADDR + 1351 KERNPHYSADDR; 1352 1353 } 1354 } 1355 /* 1356 * Allocate a page for the system page mapped to 0x00000000 1357 * or 0xffff0000. This page will just contain the system vectors 1358 * and can be shared by all processes. 1359 */ 1360 valloc_pages(systempage, 1); 1361 1362 /* Allocate dynamic per-cpu area. */ 1363 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE); 1364 dpcpu_init((void *)dpcpu.pv_va, 0); 1365 1366 /* Allocate stacks for all modes */ 1367 valloc_pages(irqstack, IRQ_STACK_SIZE * MAXCPU); 1368 valloc_pages(abtstack, ABT_STACK_SIZE * MAXCPU); 1369 valloc_pages(undstack, UND_STACK_SIZE * MAXCPU); 1370 valloc_pages(kernelstack, KSTACK_PAGES * MAXCPU); 1371 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE); 1372 1373 /* 1374 * Now we start construction of the L1 page table 1375 * We start by mapping the L2 page tables into the L1. 1376 * This means that we can replace L1 mappings later on if necessary 1377 */ 1378 l1pagetable = kernel_l1pt.pv_va; 1379 1380 /* 1381 * Try to map as much as possible of kernel text and data using 1382 * 1MB section mapping and for the rest of initial kernel address 1383 * space use L2 coarse tables. 1384 * 1385 * Link L2 tables for mapping remainder of kernel (modulo 1MB) 1386 * and kernel structures 1387 */ 1388 l2_start = lastaddr & ~(L1_S_OFFSET); 1389 for (i = 0 ; i < l2size - 1; i++) 1390 pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE, 1391 &kernel_pt_table[i]); 1392 1393 pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE; 1394 1395 /* Map kernel code and data */ 1396 pmap_map_chunk(l1pagetable, KERNVIRTADDR, KERNPHYSADDR, 1397 (((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK, 1398 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 1399 1400 1401 /* Map L1 directory and allocated L2 page tables */ 1402 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 1403 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 1404 1405 pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va, 1406 kernel_pt_table[0].pv_pa, 1407 L2_TABLE_SIZE_REAL * l2size, 1408 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 1409 1410 /* Map allocated DPCPU, stacks and msgbuf */ 1411 pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa, 1412 freemempos - dpcpu.pv_va, 1413 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 1414 1415 /* Link and map the vector page */ 1416 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH, 1417 &kernel_pt_table[l2size - 1]); 1418 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa, 1419 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE, PTE_CACHE); 1420 1421 /* Establish static device mappings. */ 1422 err_devmap = initarm_devmap_init(); 1423 arm_devmap_bootstrap(l1pagetable, NULL); 1424 vm_max_kernel_address = initarm_lastaddr(); 1425 1426 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | DOMAIN_CLIENT); 1427 pmap_pa = kernel_l1pt.pv_pa; 1428 setttb(kernel_l1pt.pv_pa); 1429 cpu_tlb_flushID(); 1430 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)); 1431 1432 /* 1433 * Now that proper page tables are installed, call cpu_setup() to enable 1434 * instruction and data caches and other chip-specific features. 1435 */ 1436 cpu_setup(""); 1437 1438 /* 1439 * Only after the SOC registers block is mapped we can perform device 1440 * tree fixups, as they may attempt to read parameters from hardware. 1441 */ 1442 OF_interpret("perform-fixup", 0); 1443 1444 initarm_gpio_init(); 1445 1446 cninit(); 1447 1448 physmem = memsize / PAGE_SIZE; 1449 1450 debugf("initarm: console initialized\n"); 1451 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp); 1452 debugf(" boothowto = 0x%08x\n", boothowto); 1453 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp); 1454 print_kenv(); 1455 1456 env = getenv("kernelname"); 1457 if (env != NULL) 1458 strlcpy(kernelname, env, sizeof(kernelname)); 1459 1460 if (err_devmap != 0) 1461 printf("WARNING: could not fully configure devmap, error=%d\n", 1462 err_devmap); 1463 1464 initarm_late_init(); 1465 1466 /* 1467 * Pages were allocated during the secondary bootstrap for the 1468 * stacks for different CPU modes. 1469 * We must now set the r13 registers in the different CPU modes to 1470 * point to these stacks. 1471 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 1472 * of the stack memory. 1473 */ 1474 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE); 1475 1476 set_stackptrs(0); 1477 1478 /* 1479 * We must now clean the cache again.... 1480 * Cleaning may be done by reading new data to displace any 1481 * dirty data in the cache. This will have happened in setttb() 1482 * but since we are boot strapping the addresses used for the read 1483 * may have just been remapped and thus the cache could be out 1484 * of sync. A re-clean after the switch will cure this. 1485 * After booting there are no gross relocations of the kernel thus 1486 * this problem will not occur after initarm(). 1487 */ 1488 cpu_idcache_wbinv_all(); 1489 1490 /* Set stack for exception handlers */ 1491 data_abort_handler_address = (u_int)data_abort_handler; 1492 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 1493 undefined_handler_address = (u_int)undefinedinstruction_bounce; 1494 undefined_init(); 1495 1496 init_proc0(kernelstack.pv_va); 1497 1498 arm_intrnames_init(); 1499 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 1500 arm_dump_avail_init(memsize, sizeof(dump_avail) / sizeof(dump_avail[0])); 1501 pmap_bootstrap(freemempos, &kernel_l1pt); 1502 msgbufp = (void *)msgbufpv.pv_va; 1503 msgbufinit(msgbufp, msgbufsize); 1504 mutex_init(); 1505 1506 /* 1507 * Prepare map of physical memory regions available to vm subsystem. 1508 */ 1509 physmap_init(availmem_regions, availmem_regions_sz); 1510 1511 init_param2(physmem); 1512 kdb_init(); 1513 1514 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP - 1515 sizeof(struct pcb))); 1516} 1517#endif 1518