1150861Scognet/*- 2150861Scognet * Copyright (c) 2005 Olivier Houchard. All rights reserved. 3150861Scognet * 4150861Scognet * Redistribution and use in source and binary forms, with or without 5150861Scognet * modification, are permitted provided that the following conditions 6150861Scognet * are met: 7150861Scognet * 1. Redistributions of source code must retain the above copyright 8150861Scognet * notice, this list of conditions and the following disclaimer. 9150861Scognet * 2. Redistributions in binary form must reproduce the above copyright 10150861Scognet * notice, this list of conditions and the following disclaimer in the 11150861Scognet * documentation and/or other materials provided with the distribution. 12150861Scognet * 13150861Scognet * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 14150861Scognet * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 15150861Scognet * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 16150861Scognet * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 17150861Scognet * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 18150861Scognet * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 19150861Scognet * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 20150861Scognet * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 21150861Scognet * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 22150861Scognet * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 23150861Scognet */ 24150861Scognet 25225990Smarcel/* 26225990Smarcel * Since we are compiled outside of the normal kernel build process, we 27225990Smarcel * need to include opt_global.h manually. 28225990Smarcel */ 29225990Smarcel#include "opt_global.h" 30225990Smarcel#include "opt_kernname.h" 31225990Smarcel 32150861Scognet#include <sys/cdefs.h> 33150861Scognet__FBSDID("$FreeBSD$"); 34150861Scognet#include <machine/asm.h> 35163871Scognet#include <sys/param.h> 36150861Scognet#include <sys/elf32.h> 37153112Scognet#include <sys/inflate.h> 38150861Scognet#include <machine/elf.h> 39154561Scognet#include <machine/pte.h> 40159084Scognet#include <machine/cpufunc.h> 41159557Scognet#include <machine/armreg.h> 42154561Scognet 43150861Scognetextern char kernel_start[]; 44150861Scognetextern char kernel_end[]; 45150861Scognet 46159557Scognetextern void *_end; 47159557Scognet 48177508Scognetvoid _start(void); 49152743Scognetvoid __start(void); 50171619Scognetvoid __startC(void); 51152743Scognet 52252996Srpauloextern unsigned int cpufunc_id(void); 53252996Srpauloextern void armv6_idcache_wbinv_all(void); 54253005Srpauloextern void armv7_idcache_wbinv_all(void); 55252996Srpauloextern void do_call(void *, void *, void *, int); 56252996Srpaulo 57153112Scognet#define GZ_HEAD 0xa 58152743Scognet 59266311Sian#if defined(CPU_ARM9) 60159557Scognet#define cpu_idcache_wbinv_all arm9_idcache_wbinv_all 61252996Srpauloextern void arm9_idcache_wbinv_all(void); 62207611Skevlo#elif defined(CPU_FA526) || defined(CPU_FA626TE) 63201468Srpaulo#define cpu_idcache_wbinv_all fa526_idcache_wbinv_all 64252996Srpauloextern void fa526_idcache_wbinv_all(void); 65177916Sraj#elif defined(CPU_ARM9E) 66177916Sraj#define cpu_idcache_wbinv_all armv5_ec_idcache_wbinv_all 67252996Srpauloextern void armv5_ec_idcache_wbinv_all(void); 68159084Scognet#elif defined(CPU_ARM10) 69159084Scognet#define cpu_idcache_wbinv_all arm10_idcache_wbinv_all 70252996Srpauloextern void arm10_idcache_wbinv_all(void); 71244480Sgonzo#elif defined(CPU_ARM1136) || defined(CPU_ARM1176) 72239702Sgonzo#define cpu_idcache_wbinv_all armv6_idcache_wbinv_all 73159084Scognet#elif defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \ 74161592Scognet defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) || \ 75161592Scognet defined(CPU_XSCALE_80219) 76159084Scognet#define cpu_idcache_wbinv_all xscale_cache_purgeID 77252996Srpauloextern void xscale_cache_purgeID(void); 78171619Scognet#elif defined(CPU_XSCALE_81342) 79171619Scognet#define cpu_idcache_wbinv_all xscalec3_cache_purgeID 80252996Srpauloextern void xscalec3_cache_purgeID(void); 81239268Sgonzo#elif defined(CPU_MV_PJ4B) 82239268Sgonzo#if !defined(SOC_MV_ARMADAXP) 83239268Sgonzo#define cpu_idcache_wbinv_all armv6_idcache_wbinv_all 84252996Srpauloextern void armv6_idcache_wbinv_all(void); 85239268Sgonzo#else 86239268Sgonzo#define cpu_idcache_wbinv_all() armadaxp_idcache_wbinv_all 87159084Scognet#endif 88239268Sgonzo#endif /* CPU_MV_PJ4B */ 89171619Scognet#ifdef CPU_XSCALE_81342 90171619Scognet#define cpu_l2cache_wbinv_all xscalec3_l2cache_purge 91252996Srpauloextern void xscalec3_l2cache_purge(void); 92183840Sraj#elif defined(SOC_MV_KIRKWOOD) || defined(SOC_MV_DISCOVERY) 93186933Sraj#define cpu_l2cache_wbinv_all sheeva_l2cache_wbinv_all 94252996Srpauloextern void sheeva_l2cache_wbinv_all(void); 95266058Sian#elif defined(CPU_CORTEXA) || defined(CPU_KRAIT) 96239268Sgonzo#define cpu_idcache_wbinv_all armv7_idcache_wbinv_all 97239268Sgonzo#define cpu_l2cache_wbinv_all() 98171619Scognet#else 99171619Scognet#define cpu_l2cache_wbinv_all() 100171619Scognet#endif 101159557Scognet 102252997Srpaulostatic void armadaxp_idcache_wbinv_all(void); 103252997Srpaulo 104159557Scognetint arm_picache_size; 105159557Scognetint arm_picache_line_size; 106159557Scognetint arm_picache_ways; 107159557Scognet 108159557Scognetint arm_pdcache_size; /* and unified */ 109159557Scognetint arm_pdcache_line_size = 32; 110159557Scognetint arm_pdcache_ways; 111159557Scognet 112159557Scognetint arm_pcache_type; 113159557Scognetint arm_pcache_unified; 114159557Scognet 115159557Scognetint arm_dcache_align; 116159557Scognetint arm_dcache_align_mask; 117159557Scognet 118283335Sianint arm_dcache_min_line_size = 32; 119283335Sianint arm_icache_min_line_size = 32; 120283335Sianint arm_idcache_min_line_size = 32; 121283335Sian 122239268Sgonzou_int arm_cache_level; 123239268Sgonzou_int arm_cache_type[14]; 124239268Sgonzou_int arm_cache_loc; 125239268Sgonzo 126159557Scognet/* Additional cache information local to this file. Log2 of some of the 127159557Scognet above numbers. */ 128159557Scognetstatic int arm_dcache_l2_nsets; 129159557Scognetstatic int arm_dcache_l2_assoc; 130159557Scognetstatic int arm_dcache_l2_linesize; 131159557Scognet 132159557Scognet 133159084Scognetint block_userspace_access = 0; 134159557Scognetextern int arm9_dcache_sets_inc; 135159557Scognetextern int arm9_dcache_sets_max; 136159557Scognetextern int arm9_dcache_index_max; 137159557Scognetextern int arm9_dcache_index_inc; 138159084Scognet 139150861Scognetstatic __inline void * 140150861Scognetmemcpy(void *dst, const void *src, int len) 141150861Scognet{ 142150861Scognet const char *s = src; 143150861Scognet char *d = dst; 144153549Scognet 145153112Scognet while (len) { 146166819Scognet if (0 && len >= 4 && !((vm_offset_t)d & 3) && 147153549Scognet !((vm_offset_t)s & 3)) { 148153112Scognet *(uint32_t *)d = *(uint32_t *)s; 149153112Scognet s += 4; 150153112Scognet d += 4; 151153112Scognet len -= 4; 152153112Scognet } else { 153153112Scognet *d++ = *s++; 154153112Scognet len--; 155153112Scognet } 156150861Scognet } 157150861Scognet return (dst); 158150861Scognet} 159150861Scognet 160150861Scognetstatic __inline void 161153112Scognetbzero(void *addr, int count) 162150861Scognet{ 163153112Scognet char *tmp = (char *)addr; 164153112Scognet 165150861Scognet while (count > 0) { 166153112Scognet if (count >= 4 && !((vm_offset_t)tmp & 3)) { 167153112Scognet *(uint32_t *)tmp = 0; 168153112Scognet tmp += 4; 169153112Scognet count -= 4; 170153112Scognet } else { 171153112Scognet *tmp = 0; 172153112Scognet tmp++; 173153112Scognet count--; 174153112Scognet } 175150861Scognet } 176150861Scognet} 177150861Scognet 178159900Scognetstatic void arm9_setup(void); 179159900Scognet 180153112Scognetvoid 181171619Scognet_startC(void) 182153112Scognet{ 183153549Scognet int tmp1; 184159758Scognet unsigned int sp = ((unsigned int)&_end & ~3) + 4; 185266194Sian unsigned int pc, kernphysaddr; 186166819Scognet 187266194Sian /* 188266194Sian * Figure out the physical address the kernel was loaded at. This 189266194Sian * assumes the entry point (this code right here) is in the first page, 190266194Sian * which will always be the case for this trampoline code. 191266194Sian */ 192214648Scognet __asm __volatile("mov %0, pc\n" 193166819Scognet : "=r" (pc)); 194266194Sian kernphysaddr = pc & ~PAGE_MASK; 195266194Sian 196266194Sian#if defined(FLASHADDR) && defined(PHYSADDR) && defined(LOADERRAMADDR) 197166819Scognet if ((FLASHADDR > LOADERRAMADDR && pc >= FLASHADDR) || 198166819Scognet (FLASHADDR < LOADERRAMADDR && pc < LOADERRAMADDR)) { 199166819Scognet /* 200166819Scognet * We're running from flash, so just copy the whole thing 201166819Scognet * from flash to memory. 202166819Scognet * This is far from optimal, we could do the relocation or 203166819Scognet * the unzipping directly from flash to memory to avoid this 204166819Scognet * needless copy, but it would require to know the flash 205166819Scognet * physical address. 206166819Scognet */ 207166819Scognet unsigned int target_addr; 208166819Scognet unsigned int tmp_sp; 209214648Scognet uint32_t src_addr = (uint32_t)&_start - PHYSADDR + FLASHADDR 210214648Scognet + (pc - FLASHADDR - ((uint32_t)&_startC - PHYSADDR)) & 0xfffff000; 211166819Scognet 212166819Scognet target_addr = (unsigned int)&_start - PHYSADDR + LOADERRAMADDR; 213166819Scognet tmp_sp = target_addr + 0x100000 + 214166819Scognet (unsigned int)&_end - (unsigned int)&_start; 215214648Scognet memcpy((char *)target_addr, (char *)src_addr, 216166819Scognet (unsigned int)&_end - (unsigned int)&_start); 217166819Scognet /* Temporary set the sp and jump to the new location. */ 218166819Scognet __asm __volatile( 219166819Scognet "mov sp, %1\n" 220166819Scognet "mov pc, %0\n" 221166819Scognet : : "r" (target_addr), "r" (tmp_sp)); 222166819Scognet 223166819Scognet } 224166819Scognet#endif 225159557Scognet#ifdef KZIP 226159557Scognet sp += KERNSIZE + 0x100; 227159557Scognet sp &= ~(L1_TABLE_SIZE - 1); 228159557Scognet sp += 2 * L1_TABLE_SIZE; 229159557Scognet#endif 230159557Scognet sp += 1024 * 1024; /* Should be enough for a stack */ 231153549Scognet 232153549Scognet __asm __volatile("adr %0, 2f\n" 233153549Scognet "bic %0, %0, #0xff000000\n" 234153549Scognet "and %1, %1, #0xff000000\n" 235153549Scognet "orr %0, %0, %1\n" 236153549Scognet "mrc p15, 0, %1, c1, c0, 0\n" 237153549Scognet "bic %1, %1, #1\n" /* Disable MMU */ 238236991Simp "orr %1, %1, #(4 | 8)\n" /* Add DC enable, 239153549Scognet WBUF enable */ 240153549Scognet "orr %1, %1, #0x1000\n" /* Add IC enable */ 241153549Scognet "orr %1, %1, #(0x800)\n" /* BPRD enable */ 242153549Scognet 243153549Scognet "mcr p15, 0, %1, c1, c0, 0\n" 244153549Scognet "nop\n" 245153549Scognet "nop\n" 246153549Scognet "nop\n" 247153549Scognet "mov pc, %0\n" 248153549Scognet "2: nop\n" 249159557Scognet "mov sp, %2\n" 250266194Sian : "=r" (tmp1), "+r" (kernphysaddr), "+r" (sp)); 251159758Scognet#ifndef KZIP 252159758Scognet#ifdef CPU_ARM9 253159758Scognet /* So that idcache_wbinv works; */ 254159758Scognet if ((cpufunc_id() & 0x0000f000) == 0x00009000) 255159758Scognet arm9_setup(); 256159758Scognet#endif 257159758Scognet#endif 258153112Scognet __start(); 259153112Scognet} 260153112Scognet 261159557Scognetstatic void 262159557Scognetget_cachetype_cp15() 263159557Scognet{ 264239268Sgonzo u_int ctype, isize, dsize, cpuid; 265239268Sgonzo u_int clevel, csize, i, sel; 266159557Scognet u_int multiplier; 267239268Sgonzo u_char type; 268159557Scognet 269159557Scognet __asm __volatile("mrc p15, 0, %0, c0, c0, 1" 270239268Sgonzo : "=r" (ctype)); 271239268Sgonzo 272239268Sgonzo cpuid = cpufunc_id(); 273159557Scognet /* 274159557Scognet * ...and thus spake the ARM ARM: 275159557Scognet * 276239268Sgonzo * If an <opcode2> value corresponding to an unimplemented or 277159557Scognet * reserved ID register is encountered, the System Control 278159557Scognet * processor returns the value of the main ID register. 279159557Scognet */ 280239268Sgonzo if (ctype == cpuid) 281159557Scognet goto out; 282159557Scognet 283239268Sgonzo if (CPU_CT_FORMAT(ctype) == CPU_CT_ARMV7) { 284283335Sian /* Resolve minimal cache line sizes */ 285283335Sian arm_dcache_min_line_size = 1 << (CPU_CT_DMINLINE(ctype) + 2); 286283335Sian arm_icache_min_line_size = 1 << (CPU_CT_IMINLINE(ctype) + 2); 287283335Sian arm_idcache_min_line_size = 288283335Sian (arm_dcache_min_line_size > arm_icache_min_line_size ? 289283335Sian arm_icache_min_line_size : arm_dcache_min_line_size); 290283335Sian 291239268Sgonzo __asm __volatile("mrc p15, 1, %0, c0, c0, 1" 292239268Sgonzo : "=r" (clevel)); 293239268Sgonzo arm_cache_level = clevel; 294239268Sgonzo arm_cache_loc = CPU_CLIDR_LOC(arm_cache_level) + 1; 295239268Sgonzo i = 0; 296239268Sgonzo while ((type = (clevel & 0x7)) && i < 7) { 297239268Sgonzo if (type == CACHE_DCACHE || type == CACHE_UNI_CACHE || 298239268Sgonzo type == CACHE_SEP_CACHE) { 299239268Sgonzo sel = i << 1; 300239268Sgonzo __asm __volatile("mcr p15, 2, %0, c0, c0, 0" 301239268Sgonzo : : "r" (sel)); 302239268Sgonzo __asm __volatile("mrc p15, 1, %0, c0, c0, 0" 303239268Sgonzo : "=r" (csize)); 304239268Sgonzo arm_cache_type[sel] = csize; 305239268Sgonzo } 306239268Sgonzo if (type == CACHE_ICACHE || type == CACHE_SEP_CACHE) { 307239268Sgonzo sel = (i << 1) | 1; 308239268Sgonzo __asm __volatile("mcr p15, 2, %0, c0, c0, 0" 309239268Sgonzo : : "r" (sel)); 310239268Sgonzo __asm __volatile("mrc p15, 1, %0, c0, c0, 0" 311239268Sgonzo : "=r" (csize)); 312239268Sgonzo arm_cache_type[sel] = csize; 313239268Sgonzo } 314239268Sgonzo i++; 315239268Sgonzo clevel >>= 3; 316239268Sgonzo } 317239268Sgonzo } else { 318239268Sgonzo if ((ctype & CPU_CT_S) == 0) 319239268Sgonzo arm_pcache_unified = 1; 320239268Sgonzo 321239268Sgonzo /* 322239268Sgonzo * If you want to know how this code works, go read the ARM ARM. 323239268Sgonzo */ 324239268Sgonzo 325239268Sgonzo arm_pcache_type = CPU_CT_CTYPE(ctype); 326239268Sgonzo 327239268Sgonzo if (arm_pcache_unified == 0) { 328239268Sgonzo isize = CPU_CT_ISIZE(ctype); 329239268Sgonzo multiplier = (isize & CPU_CT_xSIZE_M) ? 3 : 2; 330239268Sgonzo arm_picache_line_size = 1U << (CPU_CT_xSIZE_LEN(isize) + 3); 331239268Sgonzo if (CPU_CT_xSIZE_ASSOC(isize) == 0) { 332239268Sgonzo if (isize & CPU_CT_xSIZE_M) 333239268Sgonzo arm_picache_line_size = 0; /* not present */ 334239268Sgonzo else 335239268Sgonzo arm_picache_ways = 1; 336239268Sgonzo } else { 337239268Sgonzo arm_picache_ways = multiplier << 338239268Sgonzo (CPU_CT_xSIZE_ASSOC(isize) - 1); 339239268Sgonzo } 340239268Sgonzo arm_picache_size = multiplier << (CPU_CT_xSIZE_SIZE(isize) + 8); 341239268Sgonzo } 342239268Sgonzo 343239268Sgonzo dsize = CPU_CT_DSIZE(ctype); 344239268Sgonzo multiplier = (dsize & CPU_CT_xSIZE_M) ? 3 : 2; 345239268Sgonzo arm_pdcache_line_size = 1U << (CPU_CT_xSIZE_LEN(dsize) + 3); 346239268Sgonzo if (CPU_CT_xSIZE_ASSOC(dsize) == 0) { 347239268Sgonzo if (dsize & CPU_CT_xSIZE_M) 348239268Sgonzo arm_pdcache_line_size = 0; /* not present */ 349159557Scognet else 350239268Sgonzo arm_pdcache_ways = 1; 351159557Scognet } else { 352239268Sgonzo arm_pdcache_ways = multiplier << 353239268Sgonzo (CPU_CT_xSIZE_ASSOC(dsize) - 1); 354159557Scognet } 355239268Sgonzo arm_pdcache_size = multiplier << (CPU_CT_xSIZE_SIZE(dsize) + 8); 356239268Sgonzo 357239268Sgonzo arm_dcache_align = arm_pdcache_line_size; 358239268Sgonzo 359239268Sgonzo arm_dcache_l2_assoc = CPU_CT_xSIZE_ASSOC(dsize) + multiplier - 2; 360239268Sgonzo arm_dcache_l2_linesize = CPU_CT_xSIZE_LEN(dsize) + 3; 361239268Sgonzo arm_dcache_l2_nsets = 6 + CPU_CT_xSIZE_SIZE(dsize) - 362239268Sgonzo CPU_CT_xSIZE_ASSOC(dsize) - CPU_CT_xSIZE_LEN(dsize); 363239268Sgonzo 364239268Sgonzo out: 365239268Sgonzo arm_dcache_align_mask = arm_dcache_align - 1; 366159557Scognet } 367159557Scognet} 368159557Scognet 369159557Scognetstatic void 370159557Scognetarm9_setup(void) 371159557Scognet{ 372159557Scognet 373159557Scognet get_cachetype_cp15(); 374159557Scognet arm9_dcache_sets_inc = 1U << arm_dcache_l2_linesize; 375159557Scognet arm9_dcache_sets_max = (1U << (arm_dcache_l2_linesize + 376159557Scognet arm_dcache_l2_nsets)) - arm9_dcache_sets_inc; 377159557Scognet arm9_dcache_index_inc = 1U << (32 - arm_dcache_l2_assoc); 378159557Scognet arm9_dcache_index_max = 0U - arm9_dcache_index_inc; 379159557Scognet} 380159557Scognet 381239268Sgonzostatic void 382239268Sgonzoarmadaxp_idcache_wbinv_all(void) 383239268Sgonzo{ 384239268Sgonzo uint32_t feat; 385159557Scognet 386239268Sgonzo __asm __volatile("mrc p15, 0, %0, c0, c1, 0" : "=r" (feat)); 387239268Sgonzo if (feat & ARM_PFR0_THUMBEE_MASK) 388239268Sgonzo armv7_idcache_wbinv_all(); 389239268Sgonzo else 390239268Sgonzo armv6_idcache_wbinv_all(); 391239268Sgonzo 392239268Sgonzo} 393159868Scognet#ifdef KZIP 394153112Scognetstatic unsigned char *orig_input, *i_input, *i_output; 395153112Scognet 396153112Scognet 397153112Scognetstatic u_int memcnt; /* Memory allocated: blocks */ 398153112Scognetstatic size_t memtot; /* Memory allocated: bytes */ 399153112Scognet/* 400153112Scognet * Library functions required by inflate(). 401153112Scognet */ 402153112Scognet 403153112Scognet#define MEMSIZ 0x8000 404153112Scognet 405153112Scognet/* 406153112Scognet * Allocate memory block. 407153112Scognet */ 408153112Scognetunsigned char * 409153112Scognetkzipmalloc(int size) 410153112Scognet{ 411153112Scognet void *ptr; 412153112Scognet static u_char mem[MEMSIZ]; 413153112Scognet 414153112Scognet if (memtot + size > MEMSIZ) 415153112Scognet return NULL; 416153112Scognet ptr = mem + memtot; 417153112Scognet memtot += size; 418153112Scognet memcnt++; 419153112Scognet return ptr; 420153112Scognet} 421153112Scognet 422153112Scognet/* 423153112Scognet * Free allocated memory block. 424153112Scognet */ 425153112Scognetvoid 426153112Scognetkzipfree(void *ptr) 427153112Scognet{ 428153112Scognet memcnt--; 429153112Scognet if (!memcnt) 430153112Scognet memtot = 0; 431153112Scognet} 432153112Scognet 433153112Scognetvoid 434153112Scognetputstr(char *dummy) 435153112Scognet{ 436153112Scognet} 437153112Scognet 438153112Scognetstatic int 439153112Scognetinput(void *dummy) 440153112Scognet{ 441159084Scognet if ((size_t)(i_input - orig_input) >= KERNCOMPSIZE) { 442153112Scognet return (GZ_EOF); 443153112Scognet } 444153112Scognet return *i_input++; 445153112Scognet} 446153112Scognet 447153112Scognetstatic int 448153112Scognetoutput(void *dummy, unsigned char *ptr, unsigned long len) 449153112Scognet{ 450153112Scognet 451159758Scognet 452153112Scognet memcpy(i_output, ptr, len); 453153112Scognet i_output += len; 454153112Scognet return (0); 455153112Scognet} 456153112Scognet 457153112Scognetstatic void * 458153112Scognetinflate_kernel(void *kernel, void *startaddr) 459153112Scognet{ 460153112Scognet struct inflate infl; 461252996Srpaulo unsigned char slide[GZ_WSIZE]; 462153112Scognet 463153112Scognet orig_input = kernel; 464153549Scognet memcnt = memtot = 0; 465252996Srpaulo i_input = (unsigned char *)kernel + GZ_HEAD; 466153112Scognet if (((char *)kernel)[3] & 0x18) { 467153112Scognet while (*i_input) 468153112Scognet i_input++; 469153112Scognet i_input++; 470153112Scognet } 471153112Scognet i_output = startaddr; 472153112Scognet bzero(&infl, sizeof(infl)); 473153112Scognet infl.gz_input = input; 474153112Scognet infl.gz_output = output; 475153112Scognet infl.gz_slide = slide; 476153112Scognet inflate(&infl); 477153112Scognet return ((char *)(((vm_offset_t)i_output & ~3) + 4)); 478153112Scognet} 479153112Scognet 480153112Scognet#endif 481153112Scognet 482150861Scognetvoid * 483236991Simpload_kernel(unsigned int kstart, unsigned int curaddr,unsigned int func_end, 484153112Scognet int d) 485150861Scognet{ 486150861Scognet Elf32_Ehdr *eh; 487159901Scognet Elf32_Phdr phdr[64] /* XXX */, *php; 488159901Scognet Elf32_Shdr shdr[64] /* XXX */; 489150861Scognet int i,j; 490150861Scognet void *entry_point; 491153112Scognet int symtabindex = -1; 492153112Scognet int symstrindex = -1; 493150861Scognet vm_offset_t lastaddr = 0; 494188019Scognet Elf_Addr ssym = 0; 495150861Scognet Elf_Dyn *dp; 496150861Scognet 497150861Scognet eh = (Elf32_Ehdr *)kstart; 498188019Scognet ssym = 0; 499150861Scognet entry_point = (void*)eh->e_entry; 500150861Scognet memcpy(phdr, (void *)(kstart + eh->e_phoff ), 501150861Scognet eh->e_phnum * sizeof(phdr[0])); 502153549Scognet 503150861Scognet /* Determine lastaddr. */ 504150861Scognet for (i = 0; i < eh->e_phnum; i++) { 505150861Scognet if (lastaddr < (phdr[i].p_vaddr - KERNVIRTADDR + curaddr 506150861Scognet + phdr[i].p_memsz)) 507150861Scognet lastaddr = phdr[i].p_vaddr - KERNVIRTADDR + 508150861Scognet curaddr + phdr[i].p_memsz; 509150861Scognet } 510150861Scognet 511153112Scognet /* Save the symbol tables, as there're about to be scratched. */ 512153549Scognet memcpy(shdr, (void *)(kstart + eh->e_shoff), 513153549Scognet sizeof(*shdr) * eh->e_shnum); 514150861Scognet if (eh->e_shnum * eh->e_shentsize != 0 && 515150861Scognet eh->e_shoff != 0) { 516150861Scognet for (i = 0; i < eh->e_shnum; i++) { 517150861Scognet if (shdr[i].sh_type == SHT_SYMTAB) { 518150861Scognet for (j = 0; j < eh->e_phnum; j++) { 519150861Scognet if (phdr[j].p_type == PT_LOAD && 520150861Scognet shdr[i].sh_offset >= 521150861Scognet phdr[j].p_offset && 522236991Simp (shdr[i].sh_offset + 523150861Scognet shdr[i].sh_size <= 524150861Scognet phdr[j].p_offset + 525150861Scognet phdr[j].p_filesz)) { 526150861Scognet shdr[i].sh_offset = 0; 527150861Scognet shdr[i].sh_size = 0; 528150861Scognet j = eh->e_phnum; 529150861Scognet } 530150861Scognet } 531236991Simp if (shdr[i].sh_offset != 0 && 532150861Scognet shdr[i].sh_size != 0) { 533150861Scognet symtabindex = i; 534150861Scognet symstrindex = shdr[i].sh_link; 535150861Scognet } 536150861Scognet } 537150861Scognet } 538150861Scognet func_end = roundup(func_end, sizeof(long)); 539150861Scognet if (symtabindex >= 0 && symstrindex >= 0) { 540150861Scognet ssym = lastaddr; 541150861Scognet if (d) { 542150861Scognet memcpy((void *)func_end, (void *)( 543236991Simp shdr[symtabindex].sh_offset + kstart), 544150861Scognet shdr[symtabindex].sh_size); 545150861Scognet memcpy((void *)(func_end + 546150861Scognet shdr[symtabindex].sh_size), 547150861Scognet (void *)(shdr[symstrindex].sh_offset + 548150861Scognet kstart), shdr[symstrindex].sh_size); 549153112Scognet } else { 550153112Scognet lastaddr += shdr[symtabindex].sh_size; 551153112Scognet lastaddr = roundup(lastaddr, 552153112Scognet sizeof(shdr[symtabindex].sh_size)); 553153112Scognet lastaddr += sizeof(shdr[symstrindex].sh_size); 554153112Scognet lastaddr += shdr[symstrindex].sh_size; 555236991Simp lastaddr = roundup(lastaddr, 556153112Scognet sizeof(shdr[symstrindex].sh_size)); 557150861Scognet } 558150861Scognet 559150861Scognet } 560150861Scognet } 561150861Scognet if (!d) 562150861Scognet return ((void *)lastaddr); 563150861Scognet 564150861Scognet j = eh->e_phnum; 565150861Scognet for (i = 0; i < j; i++) { 566150861Scognet volatile char c; 567153112Scognet 568153112Scognet if (phdr[i].p_type != PT_LOAD) 569150861Scognet continue; 570150861Scognet memcpy((void *)(phdr[i].p_vaddr - KERNVIRTADDR + curaddr), 571150861Scognet (void*)(kstart + phdr[i].p_offset), phdr[i].p_filesz); 572150861Scognet /* Clean space from oversized segments, eg: bss. */ 573150861Scognet if (phdr[i].p_filesz < phdr[i].p_memsz) 574236991Simp bzero((void *)(phdr[i].p_vaddr - KERNVIRTADDR + 575150861Scognet curaddr + phdr[i].p_filesz), phdr[i].p_memsz - 576150861Scognet phdr[i].p_filesz); 577150861Scognet } 578150861Scognet /* Now grab the symbol tables. */ 579153112Scognet if (symtabindex >= 0 && symstrindex >= 0) { 580236991Simp *(Elf_Size *)lastaddr = 581153112Scognet shdr[symtabindex].sh_size; 582153112Scognet lastaddr += sizeof(shdr[symtabindex].sh_size); 583153112Scognet memcpy((void*)lastaddr, 584153112Scognet (void *)func_end, 585153112Scognet shdr[symtabindex].sh_size); 586153112Scognet lastaddr += shdr[symtabindex].sh_size; 587153112Scognet lastaddr = roundup(lastaddr, 588153112Scognet sizeof(shdr[symtabindex].sh_size)); 589153112Scognet *(Elf_Size *)lastaddr = 590153112Scognet shdr[symstrindex].sh_size; 591153112Scognet lastaddr += sizeof(shdr[symstrindex].sh_size); 592153112Scognet memcpy((void*)lastaddr, 593153112Scognet (void*)(func_end + 594153112Scognet shdr[symtabindex].sh_size), 595153112Scognet shdr[symstrindex].sh_size); 596153112Scognet lastaddr += shdr[symstrindex].sh_size; 597236991Simp lastaddr = roundup(lastaddr, 598153112Scognet sizeof(shdr[symstrindex].sh_size)); 599153112Scognet *(Elf_Addr *)curaddr = MAGIC_TRAMP_NUMBER; 600153112Scognet *((Elf_Addr *)curaddr + 1) = ssym - curaddr + KERNVIRTADDR; 601153112Scognet *((Elf_Addr *)curaddr + 2) = lastaddr - curaddr + KERNVIRTADDR; 602153112Scognet } else 603153112Scognet *(Elf_Addr *)curaddr = 0; 604153549Scognet /* Invalidate the instruction cache. */ 605153549Scognet __asm __volatile("mcr p15, 0, %0, c7, c5, 0\n" 606153549Scognet "mcr p15, 0, %0, c7, c10, 4\n" 607153549Scognet : : "r" (curaddr)); 608159758Scognet __asm __volatile("mrc p15, 0, %0, c1, c0, 0\n" 609159758Scognet "bic %0, %0, #1\n" /* MMU_ENABLE */ 610159758Scognet "mcr p15, 0, %0, c1, c0, 0\n" 611159758Scognet : "=r" (ssym)); 612150861Scognet /* Jump to the entry point. */ 613150861Scognet ((void(*)(void))(entry_point - KERNVIRTADDR + curaddr))(); 614150861Scognet __asm __volatile(".globl func_end\n" 615150861Scognet "func_end:"); 616150861Scognet 617252996Srpaulo /* NOTREACHED */ 618252996Srpaulo return NULL; 619150861Scognet} 620150861Scognet 621150861Scognetextern char func_end[]; 622150861Scognet 623154561Scognet 624171619Scognet#define PMAP_DOMAIN_KERNEL 0 /* 625154561Scognet * Just define it instead of including the 626154561Scognet * whole VM headers set. 627154561Scognet */ 628154561Scognetint __hack; 629154561Scognetstatic __inline void 630159758Scognetsetup_pagetables(unsigned int pt_addr, vm_paddr_t physstart, vm_paddr_t physend, 631159758Scognet int write_back) 632150861Scognet{ 633154561Scognet unsigned int *pd = (unsigned int *)pt_addr; 634154561Scognet vm_paddr_t addr; 635154561Scognet int domain = (DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | DOMAIN_CLIENT; 636154561Scognet int tmp; 637154561Scognet 638154561Scognet bzero(pd, L1_TABLE_SIZE); 639159758Scognet for (addr = physstart; addr < physend; addr += L1_S_SIZE) { 640154561Scognet pd[addr >> L1_S_SHIFT] = L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW)| 641154561Scognet L1_S_DOM(PMAP_DOMAIN_KERNEL) | addr; 642194609Scognet if (write_back && 0) 643159758Scognet pd[addr >> L1_S_SHIFT] |= L1_S_B; 644159758Scognet } 645154561Scognet /* XXX: See below */ 646154561Scognet if (0xfff00000 < physstart || 0xfff00000 > physend) 647154561Scognet pd[0xfff00000 >> L1_S_SHIFT] = L1_TYPE_S|L1_S_AP(AP_KRW)| 648154561Scognet L1_S_DOM(PMAP_DOMAIN_KERNEL)|physstart; 649154561Scognet __asm __volatile("mcr p15, 0, %1, c2, c0, 0\n" /* set TTB */ 650154561Scognet "mcr p15, 0, %1, c8, c7, 0\n" /* Flush TTB */ 651154561Scognet "mcr p15, 0, %2, c3, c0, 0\n" /* Set DAR */ 652154561Scognet "mrc p15, 0, %0, c1, c0, 0\n" 653154561Scognet "orr %0, %0, #1\n" /* MMU_ENABLE */ 654154561Scognet "mcr p15, 0, %0, c1, c0, 0\n" 655154561Scognet "mrc p15, 0, %0, c2, c0, 0\n" /* CPWAIT */ 656154561Scognet "mov r0, r0\n" 657154561Scognet "sub pc, pc, #4\n" : 658154561Scognet "=r" (tmp) : "r" (pd), "r" (domain)); 659154561Scognet 660236991Simp /* 661154561Scognet * XXX: This is the most stupid workaround I've ever wrote. 662154561Scognet * For some reason, the KB9202 won't boot the kernel unless 663236991Simp * we access an address which is not in the 664154561Scognet * 0x20000000 - 0x20ffffff range. I hope I'll understand 665154561Scognet * what's going on later. 666154561Scognet */ 667154561Scognet __hack = *(volatile int *)0xfffff21c; 668154561Scognet} 669154561Scognet 670154561Scognetvoid 671154561Scognet__start(void) 672154561Scognet{ 673150861Scognet void *curaddr; 674159084Scognet void *dst, *altdst; 675153112Scognet char *kernel = (char *)&kernel_start; 676159557Scognet int sp; 677159758Scognet int pt_addr; 678150861Scognet 679150861Scognet __asm __volatile("mov %0, pc" : 680150861Scognet "=r" (curaddr)); 681150861Scognet curaddr = (void*)((unsigned int)curaddr & 0xfff00000); 682153112Scognet#ifdef KZIP 683153112Scognet if (*kernel == 0x1f && kernel[1] == 0x8b) { 684236991Simp pt_addr = (((int)&_end + KERNSIZE + 0x100) & 685154561Scognet ~(L1_TABLE_SIZE - 1)) + L1_TABLE_SIZE; 686159084Scognet 687159557Scognet#ifdef CPU_ARM9 688159557Scognet /* So that idcache_wbinv works; */ 689159557Scognet if ((cpufunc_id() & 0x0000f000) == 0x00009000) 690159557Scognet arm9_setup(); 691159557Scognet#endif 692154561Scognet setup_pagetables(pt_addr, (vm_paddr_t)curaddr, 693159758Scognet (vm_paddr_t)curaddr + 0x10000000, 1); 694153112Scognet /* Gzipped kernel */ 695153112Scognet dst = inflate_kernel(kernel, &_end); 696153112Scognet kernel = (char *)&_end; 697236991Simp altdst = 4 + load_kernel((unsigned int)kernel, 698159084Scognet (unsigned int)curaddr, 699171619Scognet (unsigned int)&func_end + 800 , 0); 700159084Scognet if (altdst > dst) 701159084Scognet dst = altdst; 702234688Sstas 703234688Sstas /* 704234688Sstas * Disable MMU. Otherwise, setup_pagetables call below 705234688Sstas * might overwrite the L1 table we are currently using. 706234688Sstas */ 707234688Sstas cpu_idcache_wbinv_all(); 708234688Sstas cpu_l2cache_wbinv_all(); 709234688Sstas __asm __volatile("mrc p15, 0, %0, c1, c0, 0\n" 710234688Sstas "bic %0, %0, #1\n" /* MMU_DISABLE */ 711234688Sstas "mcr p15, 0, %0, c1, c0, 0\n" 712234688Sstas :"=r" (pt_addr)); 713153112Scognet } else 714153112Scognet#endif 715236991Simp dst = 4 + load_kernel((unsigned int)&kernel_start, 716236991Simp (unsigned int)curaddr, 717150861Scognet (unsigned int)&func_end, 0); 718159758Scognet dst = (void *)(((vm_offset_t)dst & ~3)); 719159758Scognet pt_addr = ((unsigned int)dst &~(L1_TABLE_SIZE - 1)) + L1_TABLE_SIZE; 720159758Scognet setup_pagetables(pt_addr, (vm_paddr_t)curaddr, 721159758Scognet (vm_paddr_t)curaddr + 0x10000000, 0); 722159758Scognet sp = pt_addr + L1_TABLE_SIZE + 8192; 723159758Scognet sp = sp &~3; 724159758Scognet dst = (void *)(sp + 4); 725236991Simp memcpy((void *)dst, (void *)&load_kernel, (unsigned int)&func_end - 726171619Scognet (unsigned int)&load_kernel + 800); 727236991Simp do_call(dst, kernel, dst + (unsigned int)(&func_end) - 728171619Scognet (unsigned int)(&load_kernel) + 800, sp); 729150861Scognet} 730248364Sandrew 731248364Sandrew#ifdef __ARM_EABI__ 732248364Sandrew/* We need to provide these functions but never call them */ 733248364Sandrewvoid __aeabi_unwind_cpp_pr0(void); 734248364Sandrewvoid __aeabi_unwind_cpp_pr1(void); 735248364Sandrewvoid __aeabi_unwind_cpp_pr2(void); 736248364Sandrew 737248364Sandrew__strong_reference(__aeabi_unwind_cpp_pr0, __aeabi_unwind_cpp_pr1); 738248364Sandrew__strong_reference(__aeabi_unwind_cpp_pr0, __aeabi_unwind_cpp_pr2); 739248364Sandrewvoid 740248364Sandrew__aeabi_unwind_cpp_pr0(void) 741248364Sandrew{ 742248364Sandrew} 743248364Sandrew#endif 744248364Sandrew 745