vmcs.h revision 268953
1/*- 2 * Copyright (c) 2011 NetApp, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: stable/10/sys/amd64/vmm/intel/vmcs.h 268953 2014-07-21 19:08:02Z jhb $ 27 */ 28 29#ifndef _VMCS_H_ 30#define _VMCS_H_ 31 32#ifdef _KERNEL 33struct vmcs { 34 uint32_t identifier; 35 uint32_t abort_code; 36 char _impl_specific[PAGE_SIZE - sizeof(uint32_t) * 2]; 37}; 38CTASSERT(sizeof(struct vmcs) == PAGE_SIZE); 39 40/* MSR save region is composed of an array of 'struct msr_entry' */ 41struct msr_entry { 42 uint32_t index; 43 uint32_t reserved; 44 uint64_t val; 45 46}; 47 48int vmcs_set_msr_save(struct vmcs *vmcs, u_long g_area, u_int g_count); 49int vmcs_init(struct vmcs *vmcs); 50int vmcs_getreg(struct vmcs *vmcs, int running, int ident, uint64_t *rv); 51int vmcs_setreg(struct vmcs *vmcs, int running, int ident, uint64_t val); 52int vmcs_getdesc(struct vmcs *vmcs, int running, int ident, 53 struct seg_desc *desc); 54int vmcs_setdesc(struct vmcs *vmcs, int running, int ident, 55 struct seg_desc *desc); 56 57static __inline uint64_t 58vmcs_read(uint32_t encoding) 59{ 60 int error; 61 uint64_t val; 62 63 error = vmread(encoding, &val); 64 KASSERT(error == 0, ("vmcs_read(%u) error %d", encoding, error)); 65 return (val); 66} 67 68static __inline void 69vmcs_write(uint32_t encoding, uint64_t val) 70{ 71 int error; 72 73 error = vmwrite(encoding, val); 74 KASSERT(error == 0, ("vmcs_write(%u) error %d", encoding, error)); 75} 76 77#define vmexit_instruction_length() vmcs_read(VMCS_EXIT_INSTRUCTION_LENGTH) 78#define vmcs_guest_rip() vmcs_read(VMCS_GUEST_RIP) 79#define vmcs_instruction_error() vmcs_read(VMCS_INSTRUCTION_ERROR) 80#define vmcs_exit_reason() (vmcs_read(VMCS_EXIT_REASON) & 0xffff) 81#define vmcs_exit_qualification() vmcs_read(VMCS_EXIT_QUALIFICATION) 82#define vmcs_guest_cr3() vmcs_read(VMCS_GUEST_CR3) 83#define vmcs_gpa() vmcs_read(VMCS_GUEST_PHYSICAL_ADDRESS) 84#define vmcs_gla() vmcs_read(VMCS_GUEST_LINEAR_ADDRESS) 85#define vmcs_idt_vectoring_info() vmcs_read(VMCS_IDT_VECTORING_INFO) 86#define vmcs_idt_vectoring_err() vmcs_read(VMCS_IDT_VECTORING_ERROR) 87 88#endif /* _KERNEL */ 89 90#define VMCS_INITIAL 0xffffffffffffffff 91 92#define VMCS_IDENT(encoding) ((encoding) | 0x80000000) 93/* 94 * VMCS field encodings from Appendix H, Intel Architecture Manual Vol3B. 95 */ 96#define VMCS_INVALID_ENCODING 0xffffffff 97 98/* 16-bit control fields */ 99#define VMCS_VPID 0x00000000 100#define VMCS_PIR_VECTOR 0x00000002 101 102/* 16-bit guest-state fields */ 103#define VMCS_GUEST_ES_SELECTOR 0x00000800 104#define VMCS_GUEST_CS_SELECTOR 0x00000802 105#define VMCS_GUEST_SS_SELECTOR 0x00000804 106#define VMCS_GUEST_DS_SELECTOR 0x00000806 107#define VMCS_GUEST_FS_SELECTOR 0x00000808 108#define VMCS_GUEST_GS_SELECTOR 0x0000080A 109#define VMCS_GUEST_LDTR_SELECTOR 0x0000080C 110#define VMCS_GUEST_TR_SELECTOR 0x0000080E 111#define VMCS_GUEST_INTR_STATUS 0x00000810 112 113/* 16-bit host-state fields */ 114#define VMCS_HOST_ES_SELECTOR 0x00000C00 115#define VMCS_HOST_CS_SELECTOR 0x00000C02 116#define VMCS_HOST_SS_SELECTOR 0x00000C04 117#define VMCS_HOST_DS_SELECTOR 0x00000C06 118#define VMCS_HOST_FS_SELECTOR 0x00000C08 119#define VMCS_HOST_GS_SELECTOR 0x00000C0A 120#define VMCS_HOST_TR_SELECTOR 0x00000C0C 121 122/* 64-bit control fields */ 123#define VMCS_IO_BITMAP_A 0x00002000 124#define VMCS_IO_BITMAP_B 0x00002002 125#define VMCS_MSR_BITMAP 0x00002004 126#define VMCS_EXIT_MSR_STORE 0x00002006 127#define VMCS_EXIT_MSR_LOAD 0x00002008 128#define VMCS_ENTRY_MSR_LOAD 0x0000200A 129#define VMCS_EXECUTIVE_VMCS 0x0000200C 130#define VMCS_TSC_OFFSET 0x00002010 131#define VMCS_VIRTUAL_APIC 0x00002012 132#define VMCS_APIC_ACCESS 0x00002014 133#define VMCS_PIR_DESC 0x00002016 134#define VMCS_EPTP 0x0000201A 135#define VMCS_EOI_EXIT0 0x0000201C 136#define VMCS_EOI_EXIT1 0x0000201E 137#define VMCS_EOI_EXIT2 0x00002020 138#define VMCS_EOI_EXIT3 0x00002022 139#define VMCS_EOI_EXIT(vector) (VMCS_EOI_EXIT0 + ((vector) / 64) * 2) 140 141/* 64-bit read-only fields */ 142#define VMCS_GUEST_PHYSICAL_ADDRESS 0x00002400 143 144/* 64-bit guest-state fields */ 145#define VMCS_LINK_POINTER 0x00002800 146#define VMCS_GUEST_IA32_DEBUGCTL 0x00002802 147#define VMCS_GUEST_IA32_PAT 0x00002804 148#define VMCS_GUEST_IA32_EFER 0x00002806 149#define VMCS_GUEST_IA32_PERF_GLOBAL_CTRL 0x00002808 150#define VMCS_GUEST_PDPTE0 0x0000280A 151#define VMCS_GUEST_PDPTE1 0x0000280C 152#define VMCS_GUEST_PDPTE2 0x0000280E 153#define VMCS_GUEST_PDPTE3 0x00002810 154 155/* 64-bit host-state fields */ 156#define VMCS_HOST_IA32_PAT 0x00002C00 157#define VMCS_HOST_IA32_EFER 0x00002C02 158#define VMCS_HOST_IA32_PERF_GLOBAL_CTRL 0x00002C04 159 160/* 32-bit control fields */ 161#define VMCS_PIN_BASED_CTLS 0x00004000 162#define VMCS_PRI_PROC_BASED_CTLS 0x00004002 163#define VMCS_EXCEPTION_BITMAP 0x00004004 164#define VMCS_PF_ERROR_MASK 0x00004006 165#define VMCS_PF_ERROR_MATCH 0x00004008 166#define VMCS_CR3_TARGET_COUNT 0x0000400A 167#define VMCS_EXIT_CTLS 0x0000400C 168#define VMCS_EXIT_MSR_STORE_COUNT 0x0000400E 169#define VMCS_EXIT_MSR_LOAD_COUNT 0x00004010 170#define VMCS_ENTRY_CTLS 0x00004012 171#define VMCS_ENTRY_MSR_LOAD_COUNT 0x00004014 172#define VMCS_ENTRY_INTR_INFO 0x00004016 173#define VMCS_ENTRY_EXCEPTION_ERROR 0x00004018 174#define VMCS_ENTRY_INST_LENGTH 0x0000401A 175#define VMCS_TPR_THRESHOLD 0x0000401C 176#define VMCS_SEC_PROC_BASED_CTLS 0x0000401E 177#define VMCS_PLE_GAP 0x00004020 178#define VMCS_PLE_WINDOW 0x00004022 179 180/* 32-bit read-only data fields */ 181#define VMCS_INSTRUCTION_ERROR 0x00004400 182#define VMCS_EXIT_REASON 0x00004402 183#define VMCS_EXIT_INTR_INFO 0x00004404 184#define VMCS_EXIT_INTR_ERRCODE 0x00004406 185#define VMCS_IDT_VECTORING_INFO 0x00004408 186#define VMCS_IDT_VECTORING_ERROR 0x0000440A 187#define VMCS_EXIT_INSTRUCTION_LENGTH 0x0000440C 188#define VMCS_EXIT_INSTRUCTION_INFO 0x0000440E 189 190/* 32-bit guest-state fields */ 191#define VMCS_GUEST_ES_LIMIT 0x00004800 192#define VMCS_GUEST_CS_LIMIT 0x00004802 193#define VMCS_GUEST_SS_LIMIT 0x00004804 194#define VMCS_GUEST_DS_LIMIT 0x00004806 195#define VMCS_GUEST_FS_LIMIT 0x00004808 196#define VMCS_GUEST_GS_LIMIT 0x0000480A 197#define VMCS_GUEST_LDTR_LIMIT 0x0000480C 198#define VMCS_GUEST_TR_LIMIT 0x0000480E 199#define VMCS_GUEST_GDTR_LIMIT 0x00004810 200#define VMCS_GUEST_IDTR_LIMIT 0x00004812 201#define VMCS_GUEST_ES_ACCESS_RIGHTS 0x00004814 202#define VMCS_GUEST_CS_ACCESS_RIGHTS 0x00004816 203#define VMCS_GUEST_SS_ACCESS_RIGHTS 0x00004818 204#define VMCS_GUEST_DS_ACCESS_RIGHTS 0x0000481A 205#define VMCS_GUEST_FS_ACCESS_RIGHTS 0x0000481C 206#define VMCS_GUEST_GS_ACCESS_RIGHTS 0x0000481E 207#define VMCS_GUEST_LDTR_ACCESS_RIGHTS 0x00004820 208#define VMCS_GUEST_TR_ACCESS_RIGHTS 0x00004822 209#define VMCS_GUEST_INTERRUPTIBILITY 0x00004824 210#define VMCS_GUEST_ACTIVITY 0x00004826 211#define VMCS_GUEST_SMBASE 0x00004828 212#define VMCS_GUEST_IA32_SYSENTER_CS 0x0000482A 213#define VMCS_PREEMPTION_TIMER_VALUE 0x0000482E 214 215/* 32-bit host state fields */ 216#define VMCS_HOST_IA32_SYSENTER_CS 0x00004C00 217 218/* Natural Width control fields */ 219#define VMCS_CR0_MASK 0x00006000 220#define VMCS_CR4_MASK 0x00006002 221#define VMCS_CR0_SHADOW 0x00006004 222#define VMCS_CR4_SHADOW 0x00006006 223#define VMCS_CR3_TARGET0 0x00006008 224#define VMCS_CR3_TARGET1 0x0000600A 225#define VMCS_CR3_TARGET2 0x0000600C 226#define VMCS_CR3_TARGET3 0x0000600E 227 228/* Natural Width read-only fields */ 229#define VMCS_EXIT_QUALIFICATION 0x00006400 230#define VMCS_IO_RCX 0x00006402 231#define VMCS_IO_RSI 0x00006404 232#define VMCS_IO_RDI 0x00006406 233#define VMCS_IO_RIP 0x00006408 234#define VMCS_GUEST_LINEAR_ADDRESS 0x0000640A 235 236/* Natural Width guest-state fields */ 237#define VMCS_GUEST_CR0 0x00006800 238#define VMCS_GUEST_CR3 0x00006802 239#define VMCS_GUEST_CR4 0x00006804 240#define VMCS_GUEST_ES_BASE 0x00006806 241#define VMCS_GUEST_CS_BASE 0x00006808 242#define VMCS_GUEST_SS_BASE 0x0000680A 243#define VMCS_GUEST_DS_BASE 0x0000680C 244#define VMCS_GUEST_FS_BASE 0x0000680E 245#define VMCS_GUEST_GS_BASE 0x00006810 246#define VMCS_GUEST_LDTR_BASE 0x00006812 247#define VMCS_GUEST_TR_BASE 0x00006814 248#define VMCS_GUEST_GDTR_BASE 0x00006816 249#define VMCS_GUEST_IDTR_BASE 0x00006818 250#define VMCS_GUEST_DR7 0x0000681A 251#define VMCS_GUEST_RSP 0x0000681C 252#define VMCS_GUEST_RIP 0x0000681E 253#define VMCS_GUEST_RFLAGS 0x00006820 254#define VMCS_GUEST_PENDING_DBG_EXCEPTIONS 0x00006822 255#define VMCS_GUEST_IA32_SYSENTER_ESP 0x00006824 256#define VMCS_GUEST_IA32_SYSENTER_EIP 0x00006826 257 258/* Natural Width host-state fields */ 259#define VMCS_HOST_CR0 0x00006C00 260#define VMCS_HOST_CR3 0x00006C02 261#define VMCS_HOST_CR4 0x00006C04 262#define VMCS_HOST_FS_BASE 0x00006C06 263#define VMCS_HOST_GS_BASE 0x00006C08 264#define VMCS_HOST_TR_BASE 0x00006C0A 265#define VMCS_HOST_GDTR_BASE 0x00006C0C 266#define VMCS_HOST_IDTR_BASE 0x00006C0E 267#define VMCS_HOST_IA32_SYSENTER_ESP 0x00006C10 268#define VMCS_HOST_IA32_SYSENTER_EIP 0x00006C12 269#define VMCS_HOST_RSP 0x00006C14 270#define VMCS_HOST_RIP 0x00006c16 271 272/* 273 * VM instruction error numbers 274 */ 275#define VMRESUME_WITH_NON_LAUNCHED_VMCS 5 276 277/* 278 * VMCS exit reasons 279 */ 280#define EXIT_REASON_EXCEPTION 0 281#define EXIT_REASON_EXT_INTR 1 282#define EXIT_REASON_TRIPLE_FAULT 2 283#define EXIT_REASON_INIT 3 284#define EXIT_REASON_SIPI 4 285#define EXIT_REASON_IO_SMI 5 286#define EXIT_REASON_SMI 6 287#define EXIT_REASON_INTR_WINDOW 7 288#define EXIT_REASON_NMI_WINDOW 8 289#define EXIT_REASON_TASK_SWITCH 9 290#define EXIT_REASON_CPUID 10 291#define EXIT_REASON_GETSEC 11 292#define EXIT_REASON_HLT 12 293#define EXIT_REASON_INVD 13 294#define EXIT_REASON_INVLPG 14 295#define EXIT_REASON_RDPMC 15 296#define EXIT_REASON_RDTSC 16 297#define EXIT_REASON_RSM 17 298#define EXIT_REASON_VMCALL 18 299#define EXIT_REASON_VMCLEAR 19 300#define EXIT_REASON_VMLAUNCH 20 301#define EXIT_REASON_VMPTRLD 21 302#define EXIT_REASON_VMPTRST 22 303#define EXIT_REASON_VMREAD 23 304#define EXIT_REASON_VMRESUME 24 305#define EXIT_REASON_VMWRITE 25 306#define EXIT_REASON_VMXOFF 26 307#define EXIT_REASON_VMXON 27 308#define EXIT_REASON_CR_ACCESS 28 309#define EXIT_REASON_DR_ACCESS 29 310#define EXIT_REASON_INOUT 30 311#define EXIT_REASON_RDMSR 31 312#define EXIT_REASON_WRMSR 32 313#define EXIT_REASON_INVAL_VMCS 33 314#define EXIT_REASON_INVAL_MSR 34 315#define EXIT_REASON_MWAIT 36 316#define EXIT_REASON_MTF 37 317#define EXIT_REASON_MONITOR 39 318#define EXIT_REASON_PAUSE 40 319#define EXIT_REASON_MCE 41 320#define EXIT_REASON_TPR 43 321#define EXIT_REASON_APIC_ACCESS 44 322#define EXIT_REASON_VIRTUALIZED_EOI 45 323#define EXIT_REASON_GDTR_IDTR 46 324#define EXIT_REASON_LDTR_TR 47 325#define EXIT_REASON_EPT_FAULT 48 326#define EXIT_REASON_EPT_MISCONFIG 49 327#define EXIT_REASON_INVEPT 50 328#define EXIT_REASON_RDTSCP 51 329#define EXIT_REASON_VMX_PREEMPT 52 330#define EXIT_REASON_INVVPID 53 331#define EXIT_REASON_WBINVD 54 332#define EXIT_REASON_XSETBV 55 333#define EXIT_REASON_APIC_WRITE 56 334 335/* 336 * NMI unblocking due to IRET. 337 * 338 * Applies to VM-exits due to hardware exception or EPT fault. 339 */ 340#define EXIT_QUAL_NMIUDTI (1 << 12) 341/* 342 * VMCS interrupt information fields 343 */ 344#define VMCS_INTR_VALID (1U << 31) 345#define VMCS_INTR_T_MASK 0x700 /* Interruption-info type */ 346#define VMCS_INTR_T_HWINTR (0 << 8) 347#define VMCS_INTR_T_NMI (2 << 8) 348#define VMCS_INTR_T_HWEXCEPTION (3 << 8) 349#define VMCS_INTR_DEL_ERRCODE (1 << 11) 350 351/* 352 * VMCS IDT-Vectoring information fields 353 */ 354#define VMCS_IDT_VEC_VALID (1U << 31) 355#define VMCS_IDT_VEC_ERRCODE_VALID (1 << 11) 356 357/* 358 * VMCS Guest interruptibility field 359 */ 360#define VMCS_INTERRUPTIBILITY_STI_BLOCKING (1 << 0) 361#define VMCS_INTERRUPTIBILITY_MOVSS_BLOCKING (1 << 1) 362#define VMCS_INTERRUPTIBILITY_SMI_BLOCKING (1 << 2) 363#define VMCS_INTERRUPTIBILITY_NMI_BLOCKING (1 << 3) 364 365/* 366 * Exit qualification for EXIT_REASON_INVAL_VMCS 367 */ 368#define EXIT_QUAL_NMI_WHILE_STI_BLOCKING 3 369 370/* 371 * Exit qualification for EPT violation 372 */ 373#define EPT_VIOLATION_DATA_READ (1UL << 0) 374#define EPT_VIOLATION_DATA_WRITE (1UL << 1) 375#define EPT_VIOLATION_INST_FETCH (1UL << 2) 376#define EPT_VIOLATION_GPA_READABLE (1UL << 3) 377#define EPT_VIOLATION_GPA_WRITEABLE (1UL << 4) 378#define EPT_VIOLATION_GPA_EXECUTABLE (1UL << 5) 379#define EPT_VIOLATION_GLA_VALID (1UL << 7) 380#define EPT_VIOLATION_XLAT_VALID (1UL << 8) 381 382/* 383 * Exit qualification for APIC-access VM exit 384 */ 385#define APIC_ACCESS_OFFSET(qual) ((qual) & 0xFFF) 386#define APIC_ACCESS_TYPE(qual) (((qual) >> 12) & 0xF) 387 388/* 389 * Exit qualification for APIC-write VM exit 390 */ 391#define APIC_WRITE_OFFSET(qual) ((qual) & 0xFFF) 392 393#endif 394