machdep.c revision 280973
1/*- 2 * Copyright (c) 2003 Peter Wemm. 3 * Copyright (c) 1992 Terrence R. Lambert. 4 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the University of 21 * California, Berkeley and its contributors. 22 * 4. Neither the name of the University nor the names of its contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 39 */ 40 41#include <sys/cdefs.h> 42__FBSDID("$FreeBSD: stable/10/sys/amd64/amd64/machdep.c 280973 2015-04-02 01:02:42Z jhb $"); 43 44#include "opt_atalk.h" 45#include "opt_atpic.h" 46#include "opt_compat.h" 47#include "opt_cpu.h" 48#include "opt_ddb.h" 49#include "opt_inet.h" 50#include "opt_ipx.h" 51#include "opt_isa.h" 52#include "opt_kstack_pages.h" 53#include "opt_maxmem.h" 54#include "opt_mp_watchdog.h" 55#include "opt_perfmon.h" 56#include "opt_platform.h" 57#include "opt_sched.h" 58#include "opt_kdtrace.h" 59 60#include <sys/param.h> 61#include <sys/proc.h> 62#include <sys/systm.h> 63#include <sys/bio.h> 64#include <sys/buf.h> 65#include <sys/bus.h> 66#include <sys/callout.h> 67#include <sys/cons.h> 68#include <sys/cpu.h> 69#include <sys/efi.h> 70#include <sys/eventhandler.h> 71#include <sys/exec.h> 72#include <sys/imgact.h> 73#include <sys/kdb.h> 74#include <sys/kernel.h> 75#include <sys/ktr.h> 76#include <sys/linker.h> 77#include <sys/lock.h> 78#include <sys/malloc.h> 79#include <sys/memrange.h> 80#include <sys/msgbuf.h> 81#include <sys/mutex.h> 82#include <sys/pcpu.h> 83#include <sys/ptrace.h> 84#include <sys/reboot.h> 85#include <sys/rwlock.h> 86#include <sys/sched.h> 87#include <sys/signalvar.h> 88#ifdef SMP 89#include <sys/smp.h> 90#endif 91#include <sys/syscallsubr.h> 92#include <sys/sysctl.h> 93#include <sys/sysent.h> 94#include <sys/sysproto.h> 95#include <sys/ucontext.h> 96#include <sys/vmmeter.h> 97 98#include <vm/vm.h> 99#include <vm/vm_extern.h> 100#include <vm/vm_kern.h> 101#include <vm/vm_page.h> 102#include <vm/vm_map.h> 103#include <vm/vm_object.h> 104#include <vm/vm_pager.h> 105#include <vm/vm_param.h> 106 107#ifdef DDB 108#ifndef KDB 109#error KDB must be enabled in order for DDB to work! 110#endif 111#include <ddb/ddb.h> 112#include <ddb/db_sym.h> 113#endif 114 115#include <net/netisr.h> 116 117#include <machine/clock.h> 118#include <machine/cpu.h> 119#include <machine/cputypes.h> 120#include <machine/intr_machdep.h> 121#include <x86/mca.h> 122#include <machine/md_var.h> 123#include <machine/metadata.h> 124#include <machine/mp_watchdog.h> 125#include <machine/pc/bios.h> 126#include <machine/pcb.h> 127#include <machine/proc.h> 128#include <machine/reg.h> 129#include <machine/sigframe.h> 130#include <machine/specialreg.h> 131#ifdef PERFMON 132#include <machine/perfmon.h> 133#endif 134#include <machine/tss.h> 135#ifdef SMP 136#include <machine/smp.h> 137#endif 138#ifdef FDT 139#include <x86/fdt.h> 140#endif 141 142#ifdef DEV_ATPIC 143#include <x86/isa/icu.h> 144#else 145#include <machine/apicvar.h> 146#endif 147 148#include <isa/isareg.h> 149#include <isa/rtc.h> 150 151/* Sanity check for __curthread() */ 152CTASSERT(offsetof(struct pcpu, pc_curthread) == 0); 153 154extern u_int64_t hammer_time(u_int64_t, u_int64_t); 155 156#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 157#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 158 159static void cpu_startup(void *); 160static void get_fpcontext(struct thread *td, mcontext_t *mcp, 161 char *xfpusave, size_t xfpusave_len); 162static int set_fpcontext(struct thread *td, mcontext_t *mcp, 163 char *xfpustate, size_t xfpustate_len); 164SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); 165 166/* 167 * The file "conf/ldscript.amd64" defines the symbol "kernphys". Its value is 168 * the physical address at which the kernel is loaded. 169 */ 170extern char kernphys[]; 171#ifdef DDB 172extern vm_offset_t ksym_start, ksym_end; 173#endif 174 175struct msgbuf *msgbufp; 176 177/* Intel ICH registers */ 178#define ICH_PMBASE 0x400 179#define ICH_SMI_EN ICH_PMBASE + 0x30 180 181int _udatasel, _ucodesel, _ucode32sel, _ufssel, _ugssel; 182 183int cold = 1; 184 185long Maxmem = 0; 186long realmem = 0; 187 188/* 189 * The number of PHYSMAP entries must be one less than the number of 190 * PHYSSEG entries because the PHYSMAP entry that spans the largest 191 * physical address that is accessible by ISA DMA is split into two 192 * PHYSSEG entries. 193 */ 194#define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1)) 195 196vm_paddr_t phys_avail[PHYSMAP_SIZE + 2]; 197vm_paddr_t dump_avail[PHYSMAP_SIZE + 2]; 198 199/* must be 2 less so 0 0 can signal end of chunks */ 200#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2) 201#define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2) 202 203struct kva_md_info kmi; 204 205static struct trapframe proc0_tf; 206struct region_descriptor r_gdt, r_idt; 207 208struct pcpu __pcpu[MAXCPU]; 209 210struct mtx icu_lock; 211 212struct mem_range_softc mem_range_softc; 213 214struct mtx dt_lock; /* lock for GDT and LDT */ 215 216void (*vmm_resume_p)(void); 217 218static void 219cpu_startup(dummy) 220 void *dummy; 221{ 222 uintmax_t memsize; 223 char *sysenv; 224 225 /* 226 * On MacBooks, we need to disallow the legacy USB circuit to 227 * generate an SMI# because this can cause several problems, 228 * namely: incorrect CPU frequency detection and failure to 229 * start the APs. 230 * We do this by disabling a bit in the SMI_EN (SMI Control and 231 * Enable register) of the Intel ICH LPC Interface Bridge. 232 */ 233 sysenv = getenv("smbios.system.product"); 234 if (sysenv != NULL) { 235 if (strncmp(sysenv, "MacBook1,1", 10) == 0 || 236 strncmp(sysenv, "MacBook3,1", 10) == 0 || 237 strncmp(sysenv, "MacBook4,1", 10) == 0 || 238 strncmp(sysenv, "MacBookPro1,1", 13) == 0 || 239 strncmp(sysenv, "MacBookPro1,2", 13) == 0 || 240 strncmp(sysenv, "MacBookPro3,1", 13) == 0 || 241 strncmp(sysenv, "MacBookPro4,1", 13) == 0 || 242 strncmp(sysenv, "Macmini1,1", 10) == 0) { 243 if (bootverbose) 244 printf("Disabling LEGACY_USB_EN bit on " 245 "Intel ICH.\n"); 246 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8); 247 } 248 freeenv(sysenv); 249 } 250 251 /* 252 * Good {morning,afternoon,evening,night}. 253 */ 254 startrtclock(); 255 printcpuinfo(); 256 panicifcpuunsupported(); 257#ifdef PERFMON 258 perfmon_init(); 259#endif 260 261 /* 262 * Display physical memory if SMBIOS reports reasonable amount. 263 */ 264 memsize = 0; 265 sysenv = getenv("smbios.memory.enabled"); 266 if (sysenv != NULL) { 267 memsize = (uintmax_t)strtoul(sysenv, (char **)NULL, 10) << 10; 268 freeenv(sysenv); 269 } 270 if (memsize < ptoa((uintmax_t)cnt.v_free_count)) 271 memsize = ptoa((uintmax_t)Maxmem); 272 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20); 273 realmem = atop(memsize); 274 275 /* 276 * Display any holes after the first chunk of extended memory. 277 */ 278 if (bootverbose) { 279 int indx; 280 281 printf("Physical memory chunk(s):\n"); 282 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 283 vm_paddr_t size; 284 285 size = phys_avail[indx + 1] - phys_avail[indx]; 286 printf( 287 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n", 288 (uintmax_t)phys_avail[indx], 289 (uintmax_t)phys_avail[indx + 1] - 1, 290 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE); 291 } 292 } 293 294 vm_ksubmap_init(&kmi); 295 296 printf("avail memory = %ju (%ju MB)\n", 297 ptoa((uintmax_t)cnt.v_free_count), 298 ptoa((uintmax_t)cnt.v_free_count) / 1048576); 299 300 /* 301 * Set up buffers, so they can be used to read disk labels. 302 */ 303 bufinit(); 304 vm_pager_bufferinit(); 305 306 cpu_setregs(); 307} 308 309/* 310 * Send an interrupt to process. 311 * 312 * Stack is set up to allow sigcode stored 313 * at top to call routine, followed by call 314 * to sigreturn routine below. After sigreturn 315 * resets the signal mask, the stack, and the 316 * frame pointer, it returns to the user 317 * specified pc, psl. 318 */ 319void 320sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 321{ 322 struct sigframe sf, *sfp; 323 struct pcb *pcb; 324 struct proc *p; 325 struct thread *td; 326 struct sigacts *psp; 327 char *sp; 328 struct trapframe *regs; 329 char *xfpusave; 330 size_t xfpusave_len; 331 int sig; 332 int oonstack; 333 334 td = curthread; 335 pcb = td->td_pcb; 336 p = td->td_proc; 337 PROC_LOCK_ASSERT(p, MA_OWNED); 338 sig = ksi->ksi_signo; 339 psp = p->p_sigacts; 340 mtx_assert(&psp->ps_mtx, MA_OWNED); 341 regs = td->td_frame; 342 oonstack = sigonstack(regs->tf_rsp); 343 344 if (cpu_max_ext_state_size > sizeof(struct savefpu) && use_xsave) { 345 xfpusave_len = cpu_max_ext_state_size - sizeof(struct savefpu); 346 xfpusave = __builtin_alloca(xfpusave_len); 347 } else { 348 xfpusave_len = 0; 349 xfpusave = NULL; 350 } 351 352 /* Save user context. */ 353 bzero(&sf, sizeof(sf)); 354 sf.sf_uc.uc_sigmask = *mask; 355 sf.sf_uc.uc_stack = td->td_sigstk; 356 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 357 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 358 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 359 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(*regs)); 360 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */ 361 get_fpcontext(td, &sf.sf_uc.uc_mcontext, xfpusave, xfpusave_len); 362 fpstate_drop(td); 363 sf.sf_uc.uc_mcontext.mc_fsbase = pcb->pcb_fsbase; 364 sf.sf_uc.uc_mcontext.mc_gsbase = pcb->pcb_gsbase; 365 bzero(sf.sf_uc.uc_mcontext.mc_spare, 366 sizeof(sf.sf_uc.uc_mcontext.mc_spare)); 367 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__)); 368 369 /* Allocate space for the signal handler context. */ 370 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 371 SIGISMEMBER(psp->ps_sigonstack, sig)) { 372 sp = td->td_sigstk.ss_sp + td->td_sigstk.ss_size; 373#if defined(COMPAT_43) 374 td->td_sigstk.ss_flags |= SS_ONSTACK; 375#endif 376 } else 377 sp = (char *)regs->tf_rsp - 128; 378 if (xfpusave != NULL) { 379 sp -= xfpusave_len; 380 sp = (char *)((unsigned long)sp & ~0x3Ful); 381 sf.sf_uc.uc_mcontext.mc_xfpustate = (register_t)sp; 382 } 383 sp -= sizeof(struct sigframe); 384 /* Align to 16 bytes. */ 385 sfp = (struct sigframe *)((unsigned long)sp & ~0xFul); 386 387 /* Translate the signal if appropriate. */ 388 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 389 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 390 391 /* Build the argument list for the signal handler. */ 392 regs->tf_rdi = sig; /* arg 1 in %rdi */ 393 regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */ 394 bzero(&sf.sf_si, sizeof(sf.sf_si)); 395 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 396 /* Signal handler installed with SA_SIGINFO. */ 397 regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */ 398 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 399 400 /* Fill in POSIX parts */ 401 sf.sf_si = ksi->ksi_info; 402 sf.sf_si.si_signo = sig; /* maybe a translated signal */ 403 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */ 404 } else { 405 /* Old FreeBSD-style arguments. */ 406 regs->tf_rsi = ksi->ksi_code; /* arg 2 in %rsi */ 407 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */ 408 sf.sf_ahu.sf_handler = catcher; 409 } 410 mtx_unlock(&psp->ps_mtx); 411 PROC_UNLOCK(p); 412 413 /* 414 * Copy the sigframe out to the user's stack. 415 */ 416 if (copyout(&sf, sfp, sizeof(*sfp)) != 0 || 417 (xfpusave != NULL && copyout(xfpusave, 418 (void *)sf.sf_uc.uc_mcontext.mc_xfpustate, xfpusave_len) 419 != 0)) { 420#ifdef DEBUG 421 printf("process %ld has trashed its stack\n", (long)p->p_pid); 422#endif 423 PROC_LOCK(p); 424 sigexit(td, SIGILL); 425 } 426 427 regs->tf_rsp = (long)sfp; 428 regs->tf_rip = p->p_sysent->sv_sigcode_base; 429 regs->tf_rflags &= ~(PSL_T | PSL_D); 430 regs->tf_cs = _ucodesel; 431 regs->tf_ds = _udatasel; 432 regs->tf_ss = _udatasel; 433 regs->tf_es = _udatasel; 434 regs->tf_fs = _ufssel; 435 regs->tf_gs = _ugssel; 436 regs->tf_flags = TF_HASSEGS; 437 set_pcb_flags(pcb, PCB_FULL_IRET); 438 PROC_LOCK(p); 439 mtx_lock(&psp->ps_mtx); 440} 441 442/* 443 * System call to cleanup state after a signal 444 * has been taken. Reset signal mask and 445 * stack state from context left by sendsig (above). 446 * Return to previous pc and psl as specified by 447 * context left by sendsig. Check carefully to 448 * make sure that the user has not modified the 449 * state to gain improper privileges. 450 * 451 * MPSAFE 452 */ 453int 454sys_sigreturn(td, uap) 455 struct thread *td; 456 struct sigreturn_args /* { 457 const struct __ucontext *sigcntxp; 458 } */ *uap; 459{ 460 ucontext_t uc; 461 struct pcb *pcb; 462 struct proc *p; 463 struct trapframe *regs; 464 ucontext_t *ucp; 465 char *xfpustate; 466 size_t xfpustate_len; 467 long rflags; 468 int cs, error, ret; 469 ksiginfo_t ksi; 470 471 pcb = td->td_pcb; 472 p = td->td_proc; 473 474 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 475 if (error != 0) { 476 uprintf("pid %d (%s): sigreturn copyin failed\n", 477 p->p_pid, td->td_name); 478 return (error); 479 } 480 ucp = &uc; 481 if ((ucp->uc_mcontext.mc_flags & ~_MC_FLAG_MASK) != 0) { 482 uprintf("pid %d (%s): sigreturn mc_flags %x\n", p->p_pid, 483 td->td_name, ucp->uc_mcontext.mc_flags); 484 return (EINVAL); 485 } 486 regs = td->td_frame; 487 rflags = ucp->uc_mcontext.mc_rflags; 488 /* 489 * Don't allow users to change privileged or reserved flags. 490 */ 491 if (!EFL_SECURE(rflags, regs->tf_rflags)) { 492 uprintf("pid %d (%s): sigreturn rflags = 0x%lx\n", p->p_pid, 493 td->td_name, rflags); 494 return (EINVAL); 495 } 496 497 /* 498 * Don't allow users to load a valid privileged %cs. Let the 499 * hardware check for invalid selectors, excess privilege in 500 * other selectors, invalid %eip's and invalid %esp's. 501 */ 502 cs = ucp->uc_mcontext.mc_cs; 503 if (!CS_SECURE(cs)) { 504 uprintf("pid %d (%s): sigreturn cs = 0x%x\n", p->p_pid, 505 td->td_name, cs); 506 ksiginfo_init_trap(&ksi); 507 ksi.ksi_signo = SIGBUS; 508 ksi.ksi_code = BUS_OBJERR; 509 ksi.ksi_trapno = T_PROTFLT; 510 ksi.ksi_addr = (void *)regs->tf_rip; 511 trapsignal(td, &ksi); 512 return (EINVAL); 513 } 514 515 if ((uc.uc_mcontext.mc_flags & _MC_HASFPXSTATE) != 0) { 516 xfpustate_len = uc.uc_mcontext.mc_xfpustate_len; 517 if (xfpustate_len > cpu_max_ext_state_size - 518 sizeof(struct savefpu)) { 519 uprintf("pid %d (%s): sigreturn xfpusave_len = 0x%zx\n", 520 p->p_pid, td->td_name, xfpustate_len); 521 return (EINVAL); 522 } 523 xfpustate = __builtin_alloca(xfpustate_len); 524 error = copyin((const void *)uc.uc_mcontext.mc_xfpustate, 525 xfpustate, xfpustate_len); 526 if (error != 0) { 527 uprintf( 528 "pid %d (%s): sigreturn copying xfpustate failed\n", 529 p->p_pid, td->td_name); 530 return (error); 531 } 532 } else { 533 xfpustate = NULL; 534 xfpustate_len = 0; 535 } 536 ret = set_fpcontext(td, &ucp->uc_mcontext, xfpustate, xfpustate_len); 537 if (ret != 0) { 538 uprintf("pid %d (%s): sigreturn set_fpcontext err %d\n", 539 p->p_pid, td->td_name, ret); 540 return (ret); 541 } 542 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(*regs)); 543 pcb->pcb_fsbase = ucp->uc_mcontext.mc_fsbase; 544 pcb->pcb_gsbase = ucp->uc_mcontext.mc_gsbase; 545 546#if defined(COMPAT_43) 547 if (ucp->uc_mcontext.mc_onstack & 1) 548 td->td_sigstk.ss_flags |= SS_ONSTACK; 549 else 550 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 551#endif 552 553 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0); 554 set_pcb_flags(pcb, PCB_FULL_IRET); 555 return (EJUSTRETURN); 556} 557 558#ifdef COMPAT_FREEBSD4 559int 560freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap) 561{ 562 563 return sys_sigreturn(td, (struct sigreturn_args *)uap); 564} 565#endif 566 567 568/* 569 * Machine dependent boot() routine 570 * 571 * I haven't seen anything to put here yet 572 * Possibly some stuff might be grafted back here from boot() 573 */ 574void 575cpu_boot(int howto) 576{ 577} 578 579/* 580 * Flush the D-cache for non-DMA I/O so that the I-cache can 581 * be made coherent later. 582 */ 583void 584cpu_flush_dcache(void *ptr, size_t len) 585{ 586 /* Not applicable */ 587} 588 589/* Get current clock frequency for the given cpu id. */ 590int 591cpu_est_clockrate(int cpu_id, uint64_t *rate) 592{ 593 uint64_t tsc1, tsc2; 594 uint64_t acnt, mcnt, perf; 595 register_t reg; 596 597 if (pcpu_find(cpu_id) == NULL || rate == NULL) 598 return (EINVAL); 599 600 /* 601 * If TSC is P-state invariant and APERF/MPERF MSRs do not exist, 602 * DELAY(9) based logic fails. 603 */ 604 if (tsc_is_invariant && !tsc_perf_stat) 605 return (EOPNOTSUPP); 606 607#ifdef SMP 608 if (smp_cpus > 1) { 609 /* Schedule ourselves on the indicated cpu. */ 610 thread_lock(curthread); 611 sched_bind(curthread, cpu_id); 612 thread_unlock(curthread); 613 } 614#endif 615 616 /* Calibrate by measuring a short delay. */ 617 reg = intr_disable(); 618 if (tsc_is_invariant) { 619 wrmsr(MSR_MPERF, 0); 620 wrmsr(MSR_APERF, 0); 621 tsc1 = rdtsc(); 622 DELAY(1000); 623 mcnt = rdmsr(MSR_MPERF); 624 acnt = rdmsr(MSR_APERF); 625 tsc2 = rdtsc(); 626 intr_restore(reg); 627 perf = 1000 * acnt / mcnt; 628 *rate = (tsc2 - tsc1) * perf; 629 } else { 630 tsc1 = rdtsc(); 631 DELAY(1000); 632 tsc2 = rdtsc(); 633 intr_restore(reg); 634 *rate = (tsc2 - tsc1) * 1000; 635 } 636 637#ifdef SMP 638 if (smp_cpus > 1) { 639 thread_lock(curthread); 640 sched_unbind(curthread); 641 thread_unlock(curthread); 642 } 643#endif 644 645 return (0); 646} 647 648/* 649 * Shutdown the CPU as much as possible 650 */ 651void 652cpu_halt(void) 653{ 654 for (;;) 655 halt(); 656} 657 658void (*cpu_idle_hook)(sbintime_t) = NULL; /* ACPI idle hook. */ 659static int cpu_ident_amdc1e = 0; /* AMD C1E supported. */ 660static int idle_mwait = 1; /* Use MONITOR/MWAIT for short idle. */ 661TUNABLE_INT("machdep.idle_mwait", &idle_mwait); 662SYSCTL_INT(_machdep, OID_AUTO, idle_mwait, CTLFLAG_RW, &idle_mwait, 663 0, "Use MONITOR/MWAIT for short idle"); 664 665#define STATE_RUNNING 0x0 666#define STATE_MWAIT 0x1 667#define STATE_SLEEPING 0x2 668 669static void 670cpu_idle_acpi(sbintime_t sbt) 671{ 672 int *state; 673 674 state = (int *)PCPU_PTR(monitorbuf); 675 *state = STATE_SLEEPING; 676 677 /* See comments in cpu_idle_hlt(). */ 678 disable_intr(); 679 if (sched_runnable()) 680 enable_intr(); 681 else if (cpu_idle_hook) 682 cpu_idle_hook(sbt); 683 else 684 __asm __volatile("sti; hlt"); 685 *state = STATE_RUNNING; 686} 687 688static void 689cpu_idle_hlt(sbintime_t sbt) 690{ 691 int *state; 692 693 state = (int *)PCPU_PTR(monitorbuf); 694 *state = STATE_SLEEPING; 695 696 /* 697 * Since we may be in a critical section from cpu_idle(), if 698 * an interrupt fires during that critical section we may have 699 * a pending preemption. If the CPU halts, then that thread 700 * may not execute until a later interrupt awakens the CPU. 701 * To handle this race, check for a runnable thread after 702 * disabling interrupts and immediately return if one is 703 * found. Also, we must absolutely guarentee that hlt is 704 * the next instruction after sti. This ensures that any 705 * interrupt that fires after the call to disable_intr() will 706 * immediately awaken the CPU from hlt. Finally, please note 707 * that on x86 this works fine because of interrupts enabled only 708 * after the instruction following sti takes place, while IF is set 709 * to 1 immediately, allowing hlt instruction to acknowledge the 710 * interrupt. 711 */ 712 disable_intr(); 713 if (sched_runnable()) 714 enable_intr(); 715 else 716 __asm __volatile("sti; hlt"); 717 *state = STATE_RUNNING; 718} 719 720/* 721 * MWAIT cpu power states. Lower 4 bits are sub-states. 722 */ 723#define MWAIT_C0 0xf0 724#define MWAIT_C1 0x00 725#define MWAIT_C2 0x10 726#define MWAIT_C3 0x20 727#define MWAIT_C4 0x30 728 729static void 730cpu_idle_mwait(sbintime_t sbt) 731{ 732 int *state; 733 734 state = (int *)PCPU_PTR(monitorbuf); 735 *state = STATE_MWAIT; 736 737 /* See comments in cpu_idle_hlt(). */ 738 disable_intr(); 739 if (sched_runnable()) { 740 enable_intr(); 741 *state = STATE_RUNNING; 742 return; 743 } 744 cpu_monitor(state, 0, 0); 745 if (*state == STATE_MWAIT) 746 __asm __volatile("sti; mwait" : : "a" (MWAIT_C1), "c" (0)); 747 else 748 enable_intr(); 749 *state = STATE_RUNNING; 750} 751 752static void 753cpu_idle_spin(sbintime_t sbt) 754{ 755 int *state; 756 int i; 757 758 state = (int *)PCPU_PTR(monitorbuf); 759 *state = STATE_RUNNING; 760 761 /* 762 * The sched_runnable() call is racy but as long as there is 763 * a loop missing it one time will have just a little impact if any 764 * (and it is much better than missing the check at all). 765 */ 766 for (i = 0; i < 1000; i++) { 767 if (sched_runnable()) 768 return; 769 cpu_spinwait(); 770 } 771} 772 773/* 774 * C1E renders the local APIC timer dead, so we disable it by 775 * reading the Interrupt Pending Message register and clearing 776 * both C1eOnCmpHalt (bit 28) and SmiOnCmpHalt (bit 27). 777 * 778 * Reference: 779 * "BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh Processors" 780 * #32559 revision 3.00+ 781 */ 782#define MSR_AMDK8_IPM 0xc0010055 783#define AMDK8_SMIONCMPHALT (1ULL << 27) 784#define AMDK8_C1EONCMPHALT (1ULL << 28) 785#define AMDK8_CMPHALT (AMDK8_SMIONCMPHALT | AMDK8_C1EONCMPHALT) 786 787static void 788cpu_probe_amdc1e(void) 789{ 790 791 /* 792 * Detect the presence of C1E capability mostly on latest 793 * dual-cores (or future) k8 family. 794 */ 795 if (cpu_vendor_id == CPU_VENDOR_AMD && 796 (cpu_id & 0x00000f00) == 0x00000f00 && 797 (cpu_id & 0x0fff0000) >= 0x00040000) { 798 cpu_ident_amdc1e = 1; 799 } 800} 801 802void (*cpu_idle_fn)(sbintime_t) = cpu_idle_acpi; 803 804void 805cpu_idle(int busy) 806{ 807 uint64_t msr; 808 sbintime_t sbt = -1; 809 810 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d", 811 busy, curcpu); 812#ifdef MP_WATCHDOG 813 ap_watchdog(PCPU_GET(cpuid)); 814#endif 815 /* If we are busy - try to use fast methods. */ 816 if (busy) { 817 if ((cpu_feature2 & CPUID2_MON) && idle_mwait) { 818 cpu_idle_mwait(busy); 819 goto out; 820 } 821 } 822 823 /* If we have time - switch timers into idle mode. */ 824 if (!busy) { 825 critical_enter(); 826 sbt = cpu_idleclock(); 827 } 828 829 /* Apply AMD APIC timer C1E workaround. */ 830 if (cpu_ident_amdc1e && cpu_disable_c3_sleep) { 831 msr = rdmsr(MSR_AMDK8_IPM); 832 if (msr & AMDK8_CMPHALT) 833 wrmsr(MSR_AMDK8_IPM, msr & ~AMDK8_CMPHALT); 834 } 835 836 /* Call main idle method. */ 837 cpu_idle_fn(sbt); 838 839 /* Switch timers mack into active mode. */ 840 if (!busy) { 841 cpu_activeclock(); 842 critical_exit(); 843 } 844out: 845 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done", 846 busy, curcpu); 847} 848 849int 850cpu_idle_wakeup(int cpu) 851{ 852 struct pcpu *pcpu; 853 int *state; 854 855 pcpu = pcpu_find(cpu); 856 state = (int *)pcpu->pc_monitorbuf; 857 /* 858 * This doesn't need to be atomic since missing the race will 859 * simply result in unnecessary IPIs. 860 */ 861 if (*state == STATE_SLEEPING) 862 return (0); 863 if (*state == STATE_MWAIT) 864 *state = STATE_RUNNING; 865 return (1); 866} 867 868/* 869 * Ordered by speed/power consumption. 870 */ 871struct { 872 void *id_fn; 873 char *id_name; 874} idle_tbl[] = { 875 { cpu_idle_spin, "spin" }, 876 { cpu_idle_mwait, "mwait" }, 877 { cpu_idle_hlt, "hlt" }, 878 { cpu_idle_acpi, "acpi" }, 879 { NULL, NULL } 880}; 881 882static int 883idle_sysctl_available(SYSCTL_HANDLER_ARGS) 884{ 885 char *avail, *p; 886 int error; 887 int i; 888 889 avail = malloc(256, M_TEMP, M_WAITOK); 890 p = avail; 891 for (i = 0; idle_tbl[i].id_name != NULL; i++) { 892 if (strstr(idle_tbl[i].id_name, "mwait") && 893 (cpu_feature2 & CPUID2_MON) == 0) 894 continue; 895 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 && 896 cpu_idle_hook == NULL) 897 continue; 898 p += sprintf(p, "%s%s", p != avail ? ", " : "", 899 idle_tbl[i].id_name); 900 } 901 error = sysctl_handle_string(oidp, avail, 0, req); 902 free(avail, M_TEMP); 903 return (error); 904} 905 906SYSCTL_PROC(_machdep, OID_AUTO, idle_available, CTLTYPE_STRING | CTLFLAG_RD, 907 0, 0, idle_sysctl_available, "A", "list of available idle functions"); 908 909static int 910idle_sysctl(SYSCTL_HANDLER_ARGS) 911{ 912 char buf[16]; 913 int error; 914 char *p; 915 int i; 916 917 p = "unknown"; 918 for (i = 0; idle_tbl[i].id_name != NULL; i++) { 919 if (idle_tbl[i].id_fn == cpu_idle_fn) { 920 p = idle_tbl[i].id_name; 921 break; 922 } 923 } 924 strncpy(buf, p, sizeof(buf)); 925 error = sysctl_handle_string(oidp, buf, sizeof(buf), req); 926 if (error != 0 || req->newptr == NULL) 927 return (error); 928 for (i = 0; idle_tbl[i].id_name != NULL; i++) { 929 if (strstr(idle_tbl[i].id_name, "mwait") && 930 (cpu_feature2 & CPUID2_MON) == 0) 931 continue; 932 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 && 933 cpu_idle_hook == NULL) 934 continue; 935 if (strcmp(idle_tbl[i].id_name, buf)) 936 continue; 937 cpu_idle_fn = idle_tbl[i].id_fn; 938 return (0); 939 } 940 return (EINVAL); 941} 942 943SYSCTL_PROC(_machdep, OID_AUTO, idle, CTLTYPE_STRING | CTLFLAG_RW, 0, 0, 944 idle_sysctl, "A", "currently selected idle function"); 945 946/* 947 * Reset registers to default values on exec. 948 */ 949void 950exec_setregs(struct thread *td, struct image_params *imgp, u_long stack) 951{ 952 struct trapframe *regs = td->td_frame; 953 struct pcb *pcb = td->td_pcb; 954 955 mtx_lock(&dt_lock); 956 if (td->td_proc->p_md.md_ldt != NULL) 957 user_ldt_free(td); 958 else 959 mtx_unlock(&dt_lock); 960 961 pcb->pcb_fsbase = 0; 962 pcb->pcb_gsbase = 0; 963 clear_pcb_flags(pcb, PCB_32BIT); 964 pcb->pcb_initial_fpucw = __INITIAL_FPUCW__; 965 set_pcb_flags(pcb, PCB_FULL_IRET); 966 967 bzero((char *)regs, sizeof(struct trapframe)); 968 regs->tf_rip = imgp->entry_addr; 969 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; 970 regs->tf_rdi = stack; /* argv */ 971 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T); 972 regs->tf_ss = _udatasel; 973 regs->tf_cs = _ucodesel; 974 regs->tf_ds = _udatasel; 975 regs->tf_es = _udatasel; 976 regs->tf_fs = _ufssel; 977 regs->tf_gs = _ugssel; 978 regs->tf_flags = TF_HASSEGS; 979 td->td_retval[1] = 0; 980 981 /* 982 * Reset the hardware debug registers if they were in use. 983 * They won't have any meaning for the newly exec'd process. 984 */ 985 if (pcb->pcb_flags & PCB_DBREGS) { 986 pcb->pcb_dr0 = 0; 987 pcb->pcb_dr1 = 0; 988 pcb->pcb_dr2 = 0; 989 pcb->pcb_dr3 = 0; 990 pcb->pcb_dr6 = 0; 991 pcb->pcb_dr7 = 0; 992 if (pcb == curpcb) { 993 /* 994 * Clear the debug registers on the running 995 * CPU, otherwise they will end up affecting 996 * the next process we switch to. 997 */ 998 reset_dbregs(); 999 } 1000 clear_pcb_flags(pcb, PCB_DBREGS); 1001 } 1002 1003 /* 1004 * Drop the FP state if we hold it, so that the process gets a 1005 * clean FP state if it uses the FPU again. 1006 */ 1007 fpstate_drop(td); 1008} 1009 1010void 1011cpu_setregs(void) 1012{ 1013 register_t cr0; 1014 1015 cr0 = rcr0(); 1016 /* 1017 * CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the 1018 * BSP. See the comments there about why we set them. 1019 */ 1020 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM; 1021 load_cr0(cr0); 1022} 1023 1024/* 1025 * Initialize amd64 and configure to run kernel 1026 */ 1027 1028/* 1029 * Initialize segments & interrupt table 1030 */ 1031 1032struct user_segment_descriptor gdt[NGDT * MAXCPU];/* global descriptor tables */ 1033static struct gate_descriptor idt0[NIDT]; 1034struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ 1035 1036static char dblfault_stack[PAGE_SIZE] __aligned(16); 1037 1038static char nmi0_stack[PAGE_SIZE] __aligned(16); 1039CTASSERT(sizeof(struct nmi_pcpu) == 16); 1040 1041struct amd64tss common_tss[MAXCPU]; 1042 1043/* 1044 * Software prototypes -- in more palatable form. 1045 * 1046 * Keep GUFS32, GUGS32, GUCODE32 and GUDATA at the same 1047 * slots as corresponding segments for i386 kernel. 1048 */ 1049struct soft_segment_descriptor gdt_segs[] = { 1050/* GNULL_SEL 0 Null Descriptor */ 1051{ .ssd_base = 0x0, 1052 .ssd_limit = 0x0, 1053 .ssd_type = 0, 1054 .ssd_dpl = 0, 1055 .ssd_p = 0, 1056 .ssd_long = 0, 1057 .ssd_def32 = 0, 1058 .ssd_gran = 0 }, 1059/* GNULL2_SEL 1 Null Descriptor */ 1060{ .ssd_base = 0x0, 1061 .ssd_limit = 0x0, 1062 .ssd_type = 0, 1063 .ssd_dpl = 0, 1064 .ssd_p = 0, 1065 .ssd_long = 0, 1066 .ssd_def32 = 0, 1067 .ssd_gran = 0 }, 1068/* GUFS32_SEL 2 32 bit %gs Descriptor for user */ 1069{ .ssd_base = 0x0, 1070 .ssd_limit = 0xfffff, 1071 .ssd_type = SDT_MEMRWA, 1072 .ssd_dpl = SEL_UPL, 1073 .ssd_p = 1, 1074 .ssd_long = 0, 1075 .ssd_def32 = 1, 1076 .ssd_gran = 1 }, 1077/* GUGS32_SEL 3 32 bit %fs Descriptor for user */ 1078{ .ssd_base = 0x0, 1079 .ssd_limit = 0xfffff, 1080 .ssd_type = SDT_MEMRWA, 1081 .ssd_dpl = SEL_UPL, 1082 .ssd_p = 1, 1083 .ssd_long = 0, 1084 .ssd_def32 = 1, 1085 .ssd_gran = 1 }, 1086/* GCODE_SEL 4 Code Descriptor for kernel */ 1087{ .ssd_base = 0x0, 1088 .ssd_limit = 0xfffff, 1089 .ssd_type = SDT_MEMERA, 1090 .ssd_dpl = SEL_KPL, 1091 .ssd_p = 1, 1092 .ssd_long = 1, 1093 .ssd_def32 = 0, 1094 .ssd_gran = 1 }, 1095/* GDATA_SEL 5 Data Descriptor for kernel */ 1096{ .ssd_base = 0x0, 1097 .ssd_limit = 0xfffff, 1098 .ssd_type = SDT_MEMRWA, 1099 .ssd_dpl = SEL_KPL, 1100 .ssd_p = 1, 1101 .ssd_long = 1, 1102 .ssd_def32 = 0, 1103 .ssd_gran = 1 }, 1104/* GUCODE32_SEL 6 32 bit Code Descriptor for user */ 1105{ .ssd_base = 0x0, 1106 .ssd_limit = 0xfffff, 1107 .ssd_type = SDT_MEMERA, 1108 .ssd_dpl = SEL_UPL, 1109 .ssd_p = 1, 1110 .ssd_long = 0, 1111 .ssd_def32 = 1, 1112 .ssd_gran = 1 }, 1113/* GUDATA_SEL 7 32/64 bit Data Descriptor for user */ 1114{ .ssd_base = 0x0, 1115 .ssd_limit = 0xfffff, 1116 .ssd_type = SDT_MEMRWA, 1117 .ssd_dpl = SEL_UPL, 1118 .ssd_p = 1, 1119 .ssd_long = 0, 1120 .ssd_def32 = 1, 1121 .ssd_gran = 1 }, 1122/* GUCODE_SEL 8 64 bit Code Descriptor for user */ 1123{ .ssd_base = 0x0, 1124 .ssd_limit = 0xfffff, 1125 .ssd_type = SDT_MEMERA, 1126 .ssd_dpl = SEL_UPL, 1127 .ssd_p = 1, 1128 .ssd_long = 1, 1129 .ssd_def32 = 0, 1130 .ssd_gran = 1 }, 1131/* GPROC0_SEL 9 Proc 0 Tss Descriptor */ 1132{ .ssd_base = 0x0, 1133 .ssd_limit = sizeof(struct amd64tss) + IOPAGES * PAGE_SIZE - 1, 1134 .ssd_type = SDT_SYSTSS, 1135 .ssd_dpl = SEL_KPL, 1136 .ssd_p = 1, 1137 .ssd_long = 0, 1138 .ssd_def32 = 0, 1139 .ssd_gran = 0 }, 1140/* Actually, the TSS is a system descriptor which is double size */ 1141{ .ssd_base = 0x0, 1142 .ssd_limit = 0x0, 1143 .ssd_type = 0, 1144 .ssd_dpl = 0, 1145 .ssd_p = 0, 1146 .ssd_long = 0, 1147 .ssd_def32 = 0, 1148 .ssd_gran = 0 }, 1149/* GUSERLDT_SEL 11 LDT Descriptor */ 1150{ .ssd_base = 0x0, 1151 .ssd_limit = 0x0, 1152 .ssd_type = 0, 1153 .ssd_dpl = 0, 1154 .ssd_p = 0, 1155 .ssd_long = 0, 1156 .ssd_def32 = 0, 1157 .ssd_gran = 0 }, 1158/* GUSERLDT_SEL 12 LDT Descriptor, double size */ 1159{ .ssd_base = 0x0, 1160 .ssd_limit = 0x0, 1161 .ssd_type = 0, 1162 .ssd_dpl = 0, 1163 .ssd_p = 0, 1164 .ssd_long = 0, 1165 .ssd_def32 = 0, 1166 .ssd_gran = 0 }, 1167}; 1168 1169void 1170setidt(idx, func, typ, dpl, ist) 1171 int idx; 1172 inthand_t *func; 1173 int typ; 1174 int dpl; 1175 int ist; 1176{ 1177 struct gate_descriptor *ip; 1178 1179 ip = idt + idx; 1180 ip->gd_looffset = (uintptr_t)func; 1181 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL); 1182 ip->gd_ist = ist; 1183 ip->gd_xx = 0; 1184 ip->gd_type = typ; 1185 ip->gd_dpl = dpl; 1186 ip->gd_p = 1; 1187 ip->gd_hioffset = ((uintptr_t)func)>>16 ; 1188} 1189 1190extern inthand_t 1191 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 1192 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 1193 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 1194 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 1195 IDTVEC(xmm), IDTVEC(dblfault), 1196#ifdef KDTRACE_HOOKS 1197 IDTVEC(dtrace_ret), 1198#endif 1199#ifdef XENHVM 1200 IDTVEC(xen_intr_upcall), 1201#endif 1202 IDTVEC(fast_syscall), IDTVEC(fast_syscall32); 1203 1204#ifdef DDB 1205/* 1206 * Display the index and function name of any IDT entries that don't use 1207 * the default 'rsvd' entry point. 1208 */ 1209DB_SHOW_COMMAND(idt, db_show_idt) 1210{ 1211 struct gate_descriptor *ip; 1212 int idx; 1213 uintptr_t func; 1214 1215 ip = idt; 1216 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) { 1217 func = ((long)ip->gd_hioffset << 16 | ip->gd_looffset); 1218 if (func != (uintptr_t)&IDTVEC(rsvd)) { 1219 db_printf("%3d\t", idx); 1220 db_printsym(func, DB_STGY_PROC); 1221 db_printf("\n"); 1222 } 1223 ip++; 1224 } 1225} 1226 1227/* Show privileged registers. */ 1228DB_SHOW_COMMAND(sysregs, db_show_sysregs) 1229{ 1230 struct { 1231 uint16_t limit; 1232 uint64_t base; 1233 } __packed idtr, gdtr; 1234 uint16_t ldt, tr; 1235 1236 __asm __volatile("sidt %0" : "=m" (idtr)); 1237 db_printf("idtr\t0x%016lx/%04x\n", 1238 (u_long)idtr.base, (u_int)idtr.limit); 1239 __asm __volatile("sgdt %0" : "=m" (gdtr)); 1240 db_printf("gdtr\t0x%016lx/%04x\n", 1241 (u_long)gdtr.base, (u_int)gdtr.limit); 1242 __asm __volatile("sldt %0" : "=r" (ldt)); 1243 db_printf("ldtr\t0x%04x\n", ldt); 1244 __asm __volatile("str %0" : "=r" (tr)); 1245 db_printf("tr\t0x%04x\n", tr); 1246 db_printf("cr0\t0x%016lx\n", rcr0()); 1247 db_printf("cr2\t0x%016lx\n", rcr2()); 1248 db_printf("cr3\t0x%016lx\n", rcr3()); 1249 db_printf("cr4\t0x%016lx\n", rcr4()); 1250 db_printf("EFER\t%016lx\n", rdmsr(MSR_EFER)); 1251 db_printf("FEATURES_CTL\t%016lx\n", rdmsr(MSR_IA32_FEATURE_CONTROL)); 1252 db_printf("DEBUG_CTL\t%016lx\n", rdmsr(MSR_DEBUGCTLMSR)); 1253 db_printf("PAT\t%016lx\n", rdmsr(MSR_PAT)); 1254 db_printf("GSBASE\t%016lx\n", rdmsr(MSR_GSBASE)); 1255} 1256#endif 1257 1258void 1259sdtossd(sd, ssd) 1260 struct user_segment_descriptor *sd; 1261 struct soft_segment_descriptor *ssd; 1262{ 1263 1264 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 1265 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 1266 ssd->ssd_type = sd->sd_type; 1267 ssd->ssd_dpl = sd->sd_dpl; 1268 ssd->ssd_p = sd->sd_p; 1269 ssd->ssd_long = sd->sd_long; 1270 ssd->ssd_def32 = sd->sd_def32; 1271 ssd->ssd_gran = sd->sd_gran; 1272} 1273 1274void 1275ssdtosd(ssd, sd) 1276 struct soft_segment_descriptor *ssd; 1277 struct user_segment_descriptor *sd; 1278{ 1279 1280 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 1281 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff; 1282 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 1283 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 1284 sd->sd_type = ssd->ssd_type; 1285 sd->sd_dpl = ssd->ssd_dpl; 1286 sd->sd_p = ssd->ssd_p; 1287 sd->sd_long = ssd->ssd_long; 1288 sd->sd_def32 = ssd->ssd_def32; 1289 sd->sd_gran = ssd->ssd_gran; 1290} 1291 1292void 1293ssdtosyssd(ssd, sd) 1294 struct soft_segment_descriptor *ssd; 1295 struct system_segment_descriptor *sd; 1296{ 1297 1298 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 1299 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful; 1300 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 1301 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 1302 sd->sd_type = ssd->ssd_type; 1303 sd->sd_dpl = ssd->ssd_dpl; 1304 sd->sd_p = ssd->ssd_p; 1305 sd->sd_gran = ssd->ssd_gran; 1306} 1307 1308#if !defined(DEV_ATPIC) && defined(DEV_ISA) 1309#include <isa/isavar.h> 1310#include <isa/isareg.h> 1311/* 1312 * Return a bitmap of the current interrupt requests. This is 8259-specific 1313 * and is only suitable for use at probe time. 1314 * This is only here to pacify sio. It is NOT FATAL if this doesn't work. 1315 * It shouldn't be here. There should probably be an APIC centric 1316 * implementation in the apic driver code, if at all. 1317 */ 1318intrmask_t 1319isa_irq_pending(void) 1320{ 1321 u_char irr1; 1322 u_char irr2; 1323 1324 irr1 = inb(IO_ICU1); 1325 irr2 = inb(IO_ICU2); 1326 return ((irr2 << 8) | irr1); 1327} 1328#endif 1329 1330u_int basemem; 1331 1332static int 1333add_physmap_entry(uint64_t base, uint64_t length, vm_paddr_t *physmap, 1334 int *physmap_idxp) 1335{ 1336 int i, insert_idx, physmap_idx; 1337 1338 physmap_idx = *physmap_idxp; 1339 1340 if (length == 0) 1341 return (1); 1342 1343 /* 1344 * Find insertion point while checking for overlap. Start off by 1345 * assuming the new entry will be added to the end. 1346 */ 1347 insert_idx = physmap_idx + 2; 1348 for (i = 0; i <= physmap_idx; i += 2) { 1349 if (base < physmap[i + 1]) { 1350 if (base + length <= physmap[i]) { 1351 insert_idx = i; 1352 break; 1353 } 1354 if (boothowto & RB_VERBOSE) 1355 printf( 1356 "Overlapping memory regions, ignoring second region\n"); 1357 return (1); 1358 } 1359 } 1360 1361 /* See if we can prepend to the next entry. */ 1362 if (insert_idx <= physmap_idx && base + length == physmap[insert_idx]) { 1363 physmap[insert_idx] = base; 1364 return (1); 1365 } 1366 1367 /* See if we can append to the previous entry. */ 1368 if (insert_idx > 0 && base == physmap[insert_idx - 1]) { 1369 physmap[insert_idx - 1] += length; 1370 return (1); 1371 } 1372 1373 physmap_idx += 2; 1374 *physmap_idxp = physmap_idx; 1375 if (physmap_idx == PHYSMAP_SIZE) { 1376 printf( 1377 "Too many segments in the physical address map, giving up\n"); 1378 return (0); 1379 } 1380 1381 /* 1382 * Move the last 'N' entries down to make room for the new 1383 * entry if needed. 1384 */ 1385 for (i = physmap_idx; i > insert_idx; i -= 2) { 1386 physmap[i] = physmap[i - 2]; 1387 physmap[i + 1] = physmap[i - 1]; 1388 } 1389 1390 /* Insert the new entry. */ 1391 physmap[insert_idx] = base; 1392 physmap[insert_idx + 1] = base + length; 1393 return (1); 1394} 1395 1396static void 1397add_smap_entries(struct bios_smap *smapbase, vm_paddr_t *physmap, 1398 int *physmap_idx) 1399{ 1400 struct bios_smap *smap, *smapend; 1401 u_int32_t smapsize; 1402 1403 /* 1404 * Memory map from INT 15:E820. 1405 * 1406 * subr_module.c says: 1407 * "Consumer may safely assume that size value precedes data." 1408 * ie: an int32_t immediately precedes smap. 1409 */ 1410 smapsize = *((u_int32_t *)smapbase - 1); 1411 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize); 1412 1413 for (smap = smapbase; smap < smapend; smap++) { 1414 if (boothowto & RB_VERBOSE) 1415 printf("SMAP type=%02x base=%016lx len=%016lx\n", 1416 smap->type, smap->base, smap->length); 1417 1418 if (smap->type != SMAP_TYPE_MEMORY) 1419 continue; 1420 1421 if (!add_physmap_entry(smap->base, smap->length, physmap, 1422 physmap_idx)) 1423 break; 1424 } 1425} 1426 1427#define efi_next_descriptor(ptr, size) \ 1428 ((struct efi_md *)(((uint8_t *) ptr) + size)) 1429 1430static void 1431add_efi_map_entries(struct efi_map_header *efihdr, vm_paddr_t *physmap, 1432 int *physmap_idx) 1433{ 1434 struct efi_md *map, *p; 1435 const char *type; 1436 size_t efisz; 1437 int ndesc, i; 1438 1439 static const char *types[] = { 1440 "Reserved", 1441 "LoaderCode", 1442 "LoaderData", 1443 "BootServicesCode", 1444 "BootServicesData", 1445 "RuntimeServicesCode", 1446 "RuntimeServicesData", 1447 "ConventionalMemory", 1448 "UnusableMemory", 1449 "ACPIReclaimMemory", 1450 "ACPIMemoryNVS", 1451 "MemoryMappedIO", 1452 "MemoryMappedIOPortSpace", 1453 "PalCode" 1454 }; 1455 1456 /* 1457 * Memory map data provided by UEFI via the GetMemoryMap 1458 * Boot Services API. 1459 */ 1460 efisz = (sizeof(struct efi_map_header) + 0xf) & ~0xf; 1461 map = (struct efi_md *)((uint8_t *)efihdr + efisz); 1462 1463 if (efihdr->descriptor_size == 0) 1464 return; 1465 ndesc = efihdr->memory_size / efihdr->descriptor_size; 1466 1467 if (boothowto & RB_VERBOSE) 1468 printf("%23s %12s %12s %8s %4s\n", 1469 "Type", "Physical", "Virtual", "#Pages", "Attr"); 1470 1471 for (i = 0, p = map; i < ndesc; i++, 1472 p = efi_next_descriptor(p, efihdr->descriptor_size)) { 1473 if (boothowto & RB_VERBOSE) { 1474 if (p->md_type <= EFI_MD_TYPE_PALCODE) 1475 type = types[p->md_type]; 1476 else 1477 type = "<INVALID>"; 1478 printf("%23s %012lx %12p %08lx ", type, p->md_phys, 1479 p->md_virt, p->md_pages); 1480 if (p->md_attr & EFI_MD_ATTR_UC) 1481 printf("UC "); 1482 if (p->md_attr & EFI_MD_ATTR_WC) 1483 printf("WC "); 1484 if (p->md_attr & EFI_MD_ATTR_WT) 1485 printf("WT "); 1486 if (p->md_attr & EFI_MD_ATTR_WB) 1487 printf("WB "); 1488 if (p->md_attr & EFI_MD_ATTR_UCE) 1489 printf("UCE "); 1490 if (p->md_attr & EFI_MD_ATTR_WP) 1491 printf("WP "); 1492 if (p->md_attr & EFI_MD_ATTR_RP) 1493 printf("RP "); 1494 if (p->md_attr & EFI_MD_ATTR_XP) 1495 printf("XP "); 1496 if (p->md_attr & EFI_MD_ATTR_RT) 1497 printf("RUNTIME"); 1498 printf("\n"); 1499 } 1500 1501 switch (p->md_type) { 1502 case EFI_MD_TYPE_CODE: 1503 case EFI_MD_TYPE_DATA: 1504 case EFI_MD_TYPE_BS_CODE: 1505 case EFI_MD_TYPE_BS_DATA: 1506 case EFI_MD_TYPE_FREE: 1507 /* 1508 * We're allowed to use any entry with these types. 1509 */ 1510 break; 1511 default: 1512 continue; 1513 } 1514 1515 if (!add_physmap_entry(p->md_phys, (p->md_pages * PAGE_SIZE), 1516 physmap, physmap_idx)) 1517 break; 1518 } 1519} 1520 1521static char bootmethod[16] = ""; 1522SYSCTL_STRING(_machdep, OID_AUTO, bootmethod, CTLFLAG_RD, bootmethod, 0, 1523 "System firmware boot method"); 1524 1525#define PAGES_PER_GB (1024 * 1024 * 1024 / PAGE_SIZE) 1526 1527/* 1528 * Populate the (physmap) array with base/bound pairs describing the 1529 * available physical memory in the system, then test this memory and 1530 * build the phys_avail array describing the actually-available memory. 1531 * 1532 * Total memory size may be set by the kernel environment variable 1533 * hw.physmem or the compile-time define MAXMEM. 1534 * 1535 * XXX first should be vm_paddr_t. 1536 */ 1537static void 1538getmemsize(caddr_t kmdp, u_int64_t first) 1539{ 1540 int i, physmap_idx, pa_indx, da_indx; 1541 vm_paddr_t pa, physmap[PHYSMAP_SIZE]; 1542 u_long physmem_start, physmem_tunable, memtest; 1543 pt_entry_t *pte; 1544 struct bios_smap *smapbase; 1545 struct efi_map_header *efihdr; 1546 quad_t dcons_addr, dcons_size; 1547 int page_counter; 1548 1549 bzero(physmap, sizeof(physmap)); 1550 basemem = 0; 1551 physmap_idx = 0; 1552 1553 efihdr = (struct efi_map_header *)preload_search_info(kmdp, 1554 MODINFO_METADATA | MODINFOMD_EFI_MAP); 1555 smapbase = (struct bios_smap *)preload_search_info(kmdp, 1556 MODINFO_METADATA | MODINFOMD_SMAP); 1557 1558 if (efihdr != NULL) { 1559 add_efi_map_entries(efihdr, physmap, &physmap_idx); 1560 strlcpy(bootmethod, "UEFI", sizeof(bootmethod)); 1561 } else if (smapbase != NULL) { 1562 add_smap_entries(smapbase, physmap, &physmap_idx); 1563 strlcpy(bootmethod, "BIOS", sizeof(bootmethod)); 1564 } else { 1565 panic("No BIOS smap or EFI map info from loader!"); 1566 } 1567 1568 /* 1569 * Find the 'base memory' segment for SMP 1570 */ 1571 basemem = 0; 1572 for (i = 0; i <= physmap_idx; i += 2) { 1573 if (physmap[i] == 0x00000000) { 1574 basemem = physmap[i + 1] / 1024; 1575 break; 1576 } 1577 } 1578 if (basemem == 0) 1579 panic("BIOS smap did not include a basemem segment!"); 1580 1581#ifdef SMP 1582 /* make hole for AP bootstrap code */ 1583 physmap[1] = mp_bootaddress(physmap[1] / 1024); 1584#endif 1585 1586 /* 1587 * Maxmem isn't the "maximum memory", it's one larger than the 1588 * highest page of the physical address space. It should be 1589 * called something like "Maxphyspage". We may adjust this 1590 * based on ``hw.physmem'' and the results of the memory test. 1591 */ 1592 Maxmem = atop(physmap[physmap_idx + 1]); 1593 1594#ifdef MAXMEM 1595 Maxmem = MAXMEM / 4; 1596#endif 1597 1598 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable)) 1599 Maxmem = atop(physmem_tunable); 1600 1601 /* 1602 * By default enable the memory test on real hardware, and disable 1603 * it if we appear to be running in a VM. This avoids touching all 1604 * pages unnecessarily, which doesn't matter on real hardware but is 1605 * bad for shared VM hosts. Use a general name so that 1606 * one could eventually do more with the code than just disable it. 1607 */ 1608 memtest = (vm_guest > VM_GUEST_NO) ? 0 : 1; 1609 TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest); 1610 1611 /* 1612 * Don't allow MAXMEM or hw.physmem to extend the amount of memory 1613 * in the system. 1614 */ 1615 if (Maxmem > atop(physmap[physmap_idx + 1])) 1616 Maxmem = atop(physmap[physmap_idx + 1]); 1617 1618 if (atop(physmap[physmap_idx + 1]) != Maxmem && 1619 (boothowto & RB_VERBOSE)) 1620 printf("Physical memory use set to %ldK\n", Maxmem * 4); 1621 1622 /* call pmap initialization to make new kernel address space */ 1623 pmap_bootstrap(&first); 1624 1625 /* 1626 * Size up each available chunk of physical memory. 1627 * 1628 * XXX Some BIOSes corrupt low 64KB between suspend and resume. 1629 * By default, mask off the first 16 pages unless we appear to be 1630 * running in a VM. 1631 */ 1632 physmem_start = (vm_guest > VM_GUEST_NO ? 1 : 16) << PAGE_SHIFT; 1633 TUNABLE_ULONG_FETCH("hw.physmem.start", &physmem_start); 1634 if (physmem_start < PAGE_SIZE) 1635 physmap[0] = PAGE_SIZE; 1636 else if (physmem_start >= physmap[1]) 1637 physmap[0] = round_page(physmap[1] - PAGE_SIZE); 1638 else 1639 physmap[0] = round_page(physmem_start); 1640 pa_indx = 0; 1641 da_indx = 1; 1642 phys_avail[pa_indx++] = physmap[0]; 1643 phys_avail[pa_indx] = physmap[0]; 1644 dump_avail[da_indx] = physmap[0]; 1645 pte = CMAP1; 1646 1647 /* 1648 * Get dcons buffer address 1649 */ 1650 if (getenv_quad("dcons.addr", &dcons_addr) == 0 || 1651 getenv_quad("dcons.size", &dcons_size) == 0) 1652 dcons_addr = 0; 1653 1654 /* 1655 * physmap is in bytes, so when converting to page boundaries, 1656 * round up the start address and round down the end address. 1657 */ 1658 page_counter = 0; 1659 if (memtest != 0) 1660 printf("Testing system memory"); 1661 for (i = 0; i <= physmap_idx; i += 2) { 1662 vm_paddr_t end; 1663 1664 end = ptoa((vm_paddr_t)Maxmem); 1665 if (physmap[i + 1] < end) 1666 end = trunc_page(physmap[i + 1]); 1667 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) { 1668 int tmp, page_bad, full; 1669 int *ptr = (int *)CADDR1; 1670 1671 full = FALSE; 1672 /* 1673 * block out kernel memory as not available. 1674 */ 1675 if (pa >= (vm_paddr_t)kernphys && pa < first) 1676 goto do_dump_avail; 1677 1678 /* 1679 * block out dcons buffer 1680 */ 1681 if (dcons_addr > 0 1682 && pa >= trunc_page(dcons_addr) 1683 && pa < dcons_addr + dcons_size) 1684 goto do_dump_avail; 1685 1686 page_bad = FALSE; 1687 if (memtest == 0) 1688 goto skip_memtest; 1689 1690 /* 1691 * Print a "." every GB to show we're making 1692 * progress. 1693 */ 1694 page_counter++; 1695 if ((page_counter % PAGES_PER_GB) == 0) 1696 printf("."); 1697 1698 /* 1699 * map page into kernel: valid, read/write,non-cacheable 1700 */ 1701 *pte = pa | PG_V | PG_RW | PG_NC_PWT | PG_NC_PCD; 1702 invltlb(); 1703 1704 tmp = *(int *)ptr; 1705 /* 1706 * Test for alternating 1's and 0's 1707 */ 1708 *(volatile int *)ptr = 0xaaaaaaaa; 1709 if (*(volatile int *)ptr != 0xaaaaaaaa) 1710 page_bad = TRUE; 1711 /* 1712 * Test for alternating 0's and 1's 1713 */ 1714 *(volatile int *)ptr = 0x55555555; 1715 if (*(volatile int *)ptr != 0x55555555) 1716 page_bad = TRUE; 1717 /* 1718 * Test for all 1's 1719 */ 1720 *(volatile int *)ptr = 0xffffffff; 1721 if (*(volatile int *)ptr != 0xffffffff) 1722 page_bad = TRUE; 1723 /* 1724 * Test for all 0's 1725 */ 1726 *(volatile int *)ptr = 0x0; 1727 if (*(volatile int *)ptr != 0x0) 1728 page_bad = TRUE; 1729 /* 1730 * Restore original value. 1731 */ 1732 *(int *)ptr = tmp; 1733 1734skip_memtest: 1735 /* 1736 * Adjust array of valid/good pages. 1737 */ 1738 if (page_bad == TRUE) 1739 continue; 1740 /* 1741 * If this good page is a continuation of the 1742 * previous set of good pages, then just increase 1743 * the end pointer. Otherwise start a new chunk. 1744 * Note that "end" points one higher than end, 1745 * making the range >= start and < end. 1746 * If we're also doing a speculative memory 1747 * test and we at or past the end, bump up Maxmem 1748 * so that we keep going. The first bad page 1749 * will terminate the loop. 1750 */ 1751 if (phys_avail[pa_indx] == pa) { 1752 phys_avail[pa_indx] += PAGE_SIZE; 1753 } else { 1754 pa_indx++; 1755 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1756 printf( 1757 "Too many holes in the physical address space, giving up\n"); 1758 pa_indx--; 1759 full = TRUE; 1760 goto do_dump_avail; 1761 } 1762 phys_avail[pa_indx++] = pa; /* start */ 1763 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */ 1764 } 1765 physmem++; 1766do_dump_avail: 1767 if (dump_avail[da_indx] == pa) { 1768 dump_avail[da_indx] += PAGE_SIZE; 1769 } else { 1770 da_indx++; 1771 if (da_indx == DUMP_AVAIL_ARRAY_END) { 1772 da_indx--; 1773 goto do_next; 1774 } 1775 dump_avail[da_indx++] = pa; /* start */ 1776 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */ 1777 } 1778do_next: 1779 if (full) 1780 break; 1781 } 1782 } 1783 *pte = 0; 1784 invltlb(); 1785 if (memtest != 0) 1786 printf("\n"); 1787 1788 /* 1789 * XXX 1790 * The last chunk must contain at least one page plus the message 1791 * buffer to avoid complicating other code (message buffer address 1792 * calculation, etc.). 1793 */ 1794 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1795 round_page(msgbufsize) >= phys_avail[pa_indx]) { 1796 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1797 phys_avail[pa_indx--] = 0; 1798 phys_avail[pa_indx--] = 0; 1799 } 1800 1801 Maxmem = atop(phys_avail[pa_indx]); 1802 1803 /* Trim off space for the message buffer. */ 1804 phys_avail[pa_indx] -= round_page(msgbufsize); 1805 1806 /* Map the message buffer. */ 1807 msgbufp = (struct msgbuf *)PHYS_TO_DMAP(phys_avail[pa_indx]); 1808} 1809 1810u_int64_t 1811hammer_time(u_int64_t modulep, u_int64_t physfree) 1812{ 1813 caddr_t kmdp; 1814 int gsel_tss, x; 1815 struct pcpu *pc; 1816 struct nmi_pcpu *np; 1817 struct xstate_hdr *xhdr; 1818 u_int64_t msr; 1819 char *env; 1820 size_t kstack0_sz; 1821 1822 thread0.td_kstack = physfree + KERNBASE; 1823 thread0.td_kstack_pages = KSTACK_PAGES; 1824 kstack0_sz = thread0.td_kstack_pages * PAGE_SIZE; 1825 bzero((void *)thread0.td_kstack, kstack0_sz); 1826 physfree += kstack0_sz; 1827 1828 /* 1829 * This may be done better later if it gets more high level 1830 * components in it. If so just link td->td_proc here. 1831 */ 1832 proc_linkup0(&proc0, &thread0); 1833 1834 preload_metadata = (caddr_t)(uintptr_t)(modulep + KERNBASE); 1835 preload_bootstrap_relocate(KERNBASE); 1836 kmdp = preload_search_by_type("elf kernel"); 1837 if (kmdp == NULL) 1838 kmdp = preload_search_by_type("elf64 kernel"); 1839 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int); 1840 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + KERNBASE; 1841#ifdef DDB 1842 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t); 1843 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t); 1844#endif 1845 1846 /* Init basic tunables, hz etc */ 1847 init_param1(); 1848 1849 /* 1850 * make gdt memory segments 1851 */ 1852 for (x = 0; x < NGDT; x++) { 1853 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1) && 1854 x != GUSERLDT_SEL && x != (GUSERLDT_SEL) + 1) 1855 ssdtosd(&gdt_segs[x], &gdt[x]); 1856 } 1857 gdt_segs[GPROC0_SEL].ssd_base = (uintptr_t)&common_tss[0]; 1858 ssdtosyssd(&gdt_segs[GPROC0_SEL], 1859 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]); 1860 1861 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1; 1862 r_gdt.rd_base = (long) gdt; 1863 lgdt(&r_gdt); 1864 pc = &__pcpu[0]; 1865 1866 wrmsr(MSR_FSBASE, 0); /* User value */ 1867 wrmsr(MSR_GSBASE, (u_int64_t)pc); 1868 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */ 1869 1870 pcpu_init(pc, 0, sizeof(struct pcpu)); 1871 dpcpu_init((void *)(physfree + KERNBASE), 0); 1872 physfree += DPCPU_SIZE; 1873 PCPU_SET(prvspace, pc); 1874 PCPU_SET(curthread, &thread0); 1875 PCPU_SET(tssp, &common_tss[0]); 1876 PCPU_SET(commontssp, &common_tss[0]); 1877 PCPU_SET(tss, (struct system_segment_descriptor *)&gdt[GPROC0_SEL]); 1878 PCPU_SET(ldt, (struct system_segment_descriptor *)&gdt[GUSERLDT_SEL]); 1879 PCPU_SET(fs32p, &gdt[GUFS32_SEL]); 1880 PCPU_SET(gs32p, &gdt[GUGS32_SEL]); 1881 1882 /* 1883 * Initialize mutexes. 1884 * 1885 * icu_lock: in order to allow an interrupt to occur in a critical 1886 * section, to set pcpu->ipending (etc...) properly, we 1887 * must be able to get the icu lock, so it can't be 1888 * under witness. 1889 */ 1890 mutex_init(); 1891 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS); 1892 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_DEF); 1893 1894 /* exceptions */ 1895 for (x = 0; x < NIDT; x++) 1896 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0); 1897 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0); 1898 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0); 1899 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 2); 1900 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0); 1901 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0); 1902 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0); 1903 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0); 1904 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0); 1905 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1); 1906 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0); 1907 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0); 1908 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0); 1909 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0); 1910 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0); 1911 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0); 1912 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0); 1913 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0); 1914 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0); 1915 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0); 1916#ifdef KDTRACE_HOOKS 1917 setidt(IDT_DTRACE_RET, &IDTVEC(dtrace_ret), SDT_SYSIGT, SEL_UPL, 0); 1918#endif 1919#ifdef XENHVM 1920 setidt(IDT_EVTCHN, &IDTVEC(xen_intr_upcall), SDT_SYSIGT, SEL_UPL, 0); 1921#endif 1922 1923 r_idt.rd_limit = sizeof(idt0) - 1; 1924 r_idt.rd_base = (long) idt; 1925 lidt(&r_idt); 1926 1927 /* 1928 * Initialize the i8254 before the console so that console 1929 * initialization can use DELAY(). 1930 */ 1931 i8254_init(); 1932 1933 /* 1934 * Use vt(4) by default for UEFI boot (during the sc(4)/vt(4) 1935 * transition). 1936 */ 1937 if (kmdp != NULL && preload_search_info(kmdp, 1938 MODINFO_METADATA | MODINFOMD_EFI_MAP) != NULL) 1939 vty_set_preferred(VTY_VT); 1940 1941 /* 1942 * Initialize the console before we print anything out. 1943 */ 1944 cninit(); 1945 1946#ifdef DEV_ISA 1947#ifdef DEV_ATPIC 1948 elcr_probe(); 1949 atpic_startup(); 1950#else 1951 /* Reset and mask the atpics and leave them shut down. */ 1952 atpic_reset(); 1953 1954 /* 1955 * Point the ICU spurious interrupt vectors at the APIC spurious 1956 * interrupt handler. 1957 */ 1958 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0); 1959 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0); 1960#endif 1961#else 1962#error "have you forgotten the isa device?"; 1963#endif 1964 1965 kdb_init(); 1966 1967#ifdef KDB 1968 if (boothowto & RB_KDB) 1969 kdb_enter(KDB_WHY_BOOTFLAGS, 1970 "Boot flags requested debugger"); 1971#endif 1972 1973 identify_cpu(); /* Final stage of CPU initialization */ 1974 initializecpu(); /* Initialize CPU registers */ 1975 initializecpucache(); 1976 1977 /* doublefault stack space, runs on ist1 */ 1978 common_tss[0].tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)]; 1979 1980 /* 1981 * NMI stack, runs on ist2. The pcpu pointer is stored just 1982 * above the start of the ist2 stack. 1983 */ 1984 np = ((struct nmi_pcpu *) &nmi0_stack[sizeof(nmi0_stack)]) - 1; 1985 np->np_pcpu = (register_t) pc; 1986 common_tss[0].tss_ist2 = (long) np; 1987 1988 /* Set the IO permission bitmap (empty due to tss seg limit) */ 1989 common_tss[0].tss_iobase = sizeof(struct amd64tss) + 1990 IOPAGES * PAGE_SIZE; 1991 1992 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 1993 ltr(gsel_tss); 1994 1995 /* Set up the fast syscall stuff */ 1996 msr = rdmsr(MSR_EFER) | EFER_SCE; 1997 wrmsr(MSR_EFER, msr); 1998 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall)); 1999 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32)); 2000 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) | 2001 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48); 2002 wrmsr(MSR_STAR, msr); 2003 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D); 2004 2005 getmemsize(kmdp, physfree); 2006 init_param2(physmem); 2007 2008 /* now running on new page tables, configured,and u/iom is accessible */ 2009 2010 msgbufinit(msgbufp, msgbufsize); 2011 fpuinit(); 2012 2013 /* 2014 * Set up thread0 pcb after fpuinit calculated pcb + fpu save 2015 * area size. Zero out the extended state header in fpu save 2016 * area. 2017 */ 2018 thread0.td_pcb = get_pcb_td(&thread0); 2019 bzero(get_pcb_user_save_td(&thread0), cpu_max_ext_state_size); 2020 if (use_xsave) { 2021 xhdr = (struct xstate_hdr *)(get_pcb_user_save_td(&thread0) + 2022 1); 2023 xhdr->xstate_bv = xsave_mask; 2024 } 2025 /* make an initial tss so cpu can get interrupt stack on syscall! */ 2026 common_tss[0].tss_rsp0 = (vm_offset_t)thread0.td_pcb; 2027 /* Ensure the stack is aligned to 16 bytes */ 2028 common_tss[0].tss_rsp0 &= ~0xFul; 2029 PCPU_SET(rsp0, common_tss[0].tss_rsp0); 2030 PCPU_SET(curpcb, thread0.td_pcb); 2031 2032 /* transfer to user mode */ 2033 2034 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL); 2035 _udatasel = GSEL(GUDATA_SEL, SEL_UPL); 2036 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL); 2037 _ufssel = GSEL(GUFS32_SEL, SEL_UPL); 2038 _ugssel = GSEL(GUGS32_SEL, SEL_UPL); 2039 2040 load_ds(_udatasel); 2041 load_es(_udatasel); 2042 load_fs(_ufssel); 2043 2044 /* setup proc 0's pcb */ 2045 thread0.td_pcb->pcb_flags = 0; 2046 thread0.td_pcb->pcb_cr3 = KPML4phys; /* PCID 0 is reserved for kernel */ 2047 thread0.td_frame = &proc0_tf; 2048 2049 env = getenv("kernelname"); 2050 if (env != NULL) 2051 strlcpy(kernelname, env, sizeof(kernelname)); 2052 2053 cpu_probe_amdc1e(); 2054 2055#ifdef FDT 2056 x86_init_fdt(); 2057#endif 2058 2059 /* Location of kernel stack for locore */ 2060 return ((u_int64_t)thread0.td_pcb); 2061} 2062 2063void 2064cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 2065{ 2066 2067 pcpu->pc_acpi_id = 0xffffffff; 2068} 2069 2070static int 2071smap_sysctl_handler(SYSCTL_HANDLER_ARGS) 2072{ 2073 struct bios_smap *smapbase; 2074 struct bios_smap_xattr smap; 2075 caddr_t kmdp; 2076 uint32_t *smapattr; 2077 int count, error, i; 2078 2079 /* Retrieve the system memory map from the loader. */ 2080 kmdp = preload_search_by_type("elf kernel"); 2081 if (kmdp == NULL) 2082 kmdp = preload_search_by_type("elf64 kernel"); 2083 smapbase = (struct bios_smap *)preload_search_info(kmdp, 2084 MODINFO_METADATA | MODINFOMD_SMAP); 2085 if (smapbase == NULL) 2086 return (0); 2087 smapattr = (uint32_t *)preload_search_info(kmdp, 2088 MODINFO_METADATA | MODINFOMD_SMAP_XATTR); 2089 count = *((uint32_t *)smapbase - 1) / sizeof(*smapbase); 2090 error = 0; 2091 for (i = 0; i < count; i++) { 2092 smap.base = smapbase[i].base; 2093 smap.length = smapbase[i].length; 2094 smap.type = smapbase[i].type; 2095 if (smapattr != NULL) 2096 smap.xattr = smapattr[i]; 2097 else 2098 smap.xattr = 0; 2099 error = SYSCTL_OUT(req, &smap, sizeof(smap)); 2100 } 2101 return (error); 2102} 2103SYSCTL_PROC(_machdep, OID_AUTO, smap, CTLTYPE_OPAQUE|CTLFLAG_RD, NULL, 0, 2104 smap_sysctl_handler, "S,bios_smap_xattr", "Raw BIOS SMAP data"); 2105 2106static int 2107efi_map_sysctl_handler(SYSCTL_HANDLER_ARGS) 2108{ 2109 struct efi_map_header *efihdr; 2110 caddr_t kmdp; 2111 uint32_t efisize; 2112 2113 kmdp = preload_search_by_type("elf kernel"); 2114 if (kmdp == NULL) 2115 kmdp = preload_search_by_type("elf64 kernel"); 2116 efihdr = (struct efi_map_header *)preload_search_info(kmdp, 2117 MODINFO_METADATA | MODINFOMD_EFI_MAP); 2118 if (efihdr == NULL) 2119 return (0); 2120 efisize = *((uint32_t *)efihdr - 1); 2121 return (SYSCTL_OUT(req, efihdr, efisize)); 2122} 2123SYSCTL_PROC(_machdep, OID_AUTO, efi_map, CTLTYPE_OPAQUE|CTLFLAG_RD, NULL, 0, 2124 efi_map_sysctl_handler, "S,efi_map_header", "Raw EFI Memory Map"); 2125 2126void 2127spinlock_enter(void) 2128{ 2129 struct thread *td; 2130 register_t flags; 2131 2132 td = curthread; 2133 if (td->td_md.md_spinlock_count == 0) { 2134 flags = intr_disable(); 2135 td->td_md.md_spinlock_count = 1; 2136 td->td_md.md_saved_flags = flags; 2137 } else 2138 td->td_md.md_spinlock_count++; 2139 critical_enter(); 2140} 2141 2142void 2143spinlock_exit(void) 2144{ 2145 struct thread *td; 2146 register_t flags; 2147 2148 td = curthread; 2149 critical_exit(); 2150 flags = td->td_md.md_saved_flags; 2151 td->td_md.md_spinlock_count--; 2152 if (td->td_md.md_spinlock_count == 0) 2153 intr_restore(flags); 2154} 2155 2156/* 2157 * Construct a PCB from a trapframe. This is called from kdb_trap() where 2158 * we want to start a backtrace from the function that caused us to enter 2159 * the debugger. We have the context in the trapframe, but base the trace 2160 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 2161 * enough for a backtrace. 2162 */ 2163void 2164makectx(struct trapframe *tf, struct pcb *pcb) 2165{ 2166 2167 pcb->pcb_r12 = tf->tf_r12; 2168 pcb->pcb_r13 = tf->tf_r13; 2169 pcb->pcb_r14 = tf->tf_r14; 2170 pcb->pcb_r15 = tf->tf_r15; 2171 pcb->pcb_rbp = tf->tf_rbp; 2172 pcb->pcb_rbx = tf->tf_rbx; 2173 pcb->pcb_rip = tf->tf_rip; 2174 pcb->pcb_rsp = tf->tf_rsp; 2175} 2176 2177int 2178ptrace_set_pc(struct thread *td, unsigned long addr) 2179{ 2180 2181 td->td_frame->tf_rip = addr; 2182 set_pcb_flags(td->td_pcb, PCB_FULL_IRET); 2183 return (0); 2184} 2185 2186int 2187ptrace_single_step(struct thread *td) 2188{ 2189 td->td_frame->tf_rflags |= PSL_T; 2190 return (0); 2191} 2192 2193int 2194ptrace_clear_single_step(struct thread *td) 2195{ 2196 td->td_frame->tf_rflags &= ~PSL_T; 2197 return (0); 2198} 2199 2200int 2201fill_regs(struct thread *td, struct reg *regs) 2202{ 2203 struct trapframe *tp; 2204 2205 tp = td->td_frame; 2206 return (fill_frame_regs(tp, regs)); 2207} 2208 2209int 2210fill_frame_regs(struct trapframe *tp, struct reg *regs) 2211{ 2212 regs->r_r15 = tp->tf_r15; 2213 regs->r_r14 = tp->tf_r14; 2214 regs->r_r13 = tp->tf_r13; 2215 regs->r_r12 = tp->tf_r12; 2216 regs->r_r11 = tp->tf_r11; 2217 regs->r_r10 = tp->tf_r10; 2218 regs->r_r9 = tp->tf_r9; 2219 regs->r_r8 = tp->tf_r8; 2220 regs->r_rdi = tp->tf_rdi; 2221 regs->r_rsi = tp->tf_rsi; 2222 regs->r_rbp = tp->tf_rbp; 2223 regs->r_rbx = tp->tf_rbx; 2224 regs->r_rdx = tp->tf_rdx; 2225 regs->r_rcx = tp->tf_rcx; 2226 regs->r_rax = tp->tf_rax; 2227 regs->r_rip = tp->tf_rip; 2228 regs->r_cs = tp->tf_cs; 2229 regs->r_rflags = tp->tf_rflags; 2230 regs->r_rsp = tp->tf_rsp; 2231 regs->r_ss = tp->tf_ss; 2232 if (tp->tf_flags & TF_HASSEGS) { 2233 regs->r_ds = tp->tf_ds; 2234 regs->r_es = tp->tf_es; 2235 regs->r_fs = tp->tf_fs; 2236 regs->r_gs = tp->tf_gs; 2237 } else { 2238 regs->r_ds = 0; 2239 regs->r_es = 0; 2240 regs->r_fs = 0; 2241 regs->r_gs = 0; 2242 } 2243 return (0); 2244} 2245 2246int 2247set_regs(struct thread *td, struct reg *regs) 2248{ 2249 struct trapframe *tp; 2250 register_t rflags; 2251 2252 tp = td->td_frame; 2253 rflags = regs->r_rflags & 0xffffffff; 2254 if (!EFL_SECURE(rflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs)) 2255 return (EINVAL); 2256 tp->tf_r15 = regs->r_r15; 2257 tp->tf_r14 = regs->r_r14; 2258 tp->tf_r13 = regs->r_r13; 2259 tp->tf_r12 = regs->r_r12; 2260 tp->tf_r11 = regs->r_r11; 2261 tp->tf_r10 = regs->r_r10; 2262 tp->tf_r9 = regs->r_r9; 2263 tp->tf_r8 = regs->r_r8; 2264 tp->tf_rdi = regs->r_rdi; 2265 tp->tf_rsi = regs->r_rsi; 2266 tp->tf_rbp = regs->r_rbp; 2267 tp->tf_rbx = regs->r_rbx; 2268 tp->tf_rdx = regs->r_rdx; 2269 tp->tf_rcx = regs->r_rcx; 2270 tp->tf_rax = regs->r_rax; 2271 tp->tf_rip = regs->r_rip; 2272 tp->tf_cs = regs->r_cs; 2273 tp->tf_rflags = rflags; 2274 tp->tf_rsp = regs->r_rsp; 2275 tp->tf_ss = regs->r_ss; 2276 if (0) { /* XXXKIB */ 2277 tp->tf_ds = regs->r_ds; 2278 tp->tf_es = regs->r_es; 2279 tp->tf_fs = regs->r_fs; 2280 tp->tf_gs = regs->r_gs; 2281 tp->tf_flags = TF_HASSEGS; 2282 } 2283 set_pcb_flags(td->td_pcb, PCB_FULL_IRET); 2284 return (0); 2285} 2286 2287/* XXX check all this stuff! */ 2288/* externalize from sv_xmm */ 2289static void 2290fill_fpregs_xmm(struct savefpu *sv_xmm, struct fpreg *fpregs) 2291{ 2292 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 2293 struct envxmm *penv_xmm = &sv_xmm->sv_env; 2294 int i; 2295 2296 /* pcb -> fpregs */ 2297 bzero(fpregs, sizeof(*fpregs)); 2298 2299 /* FPU control/status */ 2300 penv_fpreg->en_cw = penv_xmm->en_cw; 2301 penv_fpreg->en_sw = penv_xmm->en_sw; 2302 penv_fpreg->en_tw = penv_xmm->en_tw; 2303 penv_fpreg->en_opcode = penv_xmm->en_opcode; 2304 penv_fpreg->en_rip = penv_xmm->en_rip; 2305 penv_fpreg->en_rdp = penv_xmm->en_rdp; 2306 penv_fpreg->en_mxcsr = penv_xmm->en_mxcsr; 2307 penv_fpreg->en_mxcsr_mask = penv_xmm->en_mxcsr_mask; 2308 2309 /* FPU registers */ 2310 for (i = 0; i < 8; ++i) 2311 bcopy(sv_xmm->sv_fp[i].fp_acc.fp_bytes, fpregs->fpr_acc[i], 10); 2312 2313 /* SSE registers */ 2314 for (i = 0; i < 16; ++i) 2315 bcopy(sv_xmm->sv_xmm[i].xmm_bytes, fpregs->fpr_xacc[i], 16); 2316} 2317 2318/* internalize from fpregs into sv_xmm */ 2319static void 2320set_fpregs_xmm(struct fpreg *fpregs, struct savefpu *sv_xmm) 2321{ 2322 struct envxmm *penv_xmm = &sv_xmm->sv_env; 2323 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 2324 int i; 2325 2326 /* fpregs -> pcb */ 2327 /* FPU control/status */ 2328 penv_xmm->en_cw = penv_fpreg->en_cw; 2329 penv_xmm->en_sw = penv_fpreg->en_sw; 2330 penv_xmm->en_tw = penv_fpreg->en_tw; 2331 penv_xmm->en_opcode = penv_fpreg->en_opcode; 2332 penv_xmm->en_rip = penv_fpreg->en_rip; 2333 penv_xmm->en_rdp = penv_fpreg->en_rdp; 2334 penv_xmm->en_mxcsr = penv_fpreg->en_mxcsr; 2335 penv_xmm->en_mxcsr_mask = penv_fpreg->en_mxcsr_mask & cpu_mxcsr_mask; 2336 2337 /* FPU registers */ 2338 for (i = 0; i < 8; ++i) 2339 bcopy(fpregs->fpr_acc[i], sv_xmm->sv_fp[i].fp_acc.fp_bytes, 10); 2340 2341 /* SSE registers */ 2342 for (i = 0; i < 16; ++i) 2343 bcopy(fpregs->fpr_xacc[i], sv_xmm->sv_xmm[i].xmm_bytes, 16); 2344} 2345 2346/* externalize from td->pcb */ 2347int 2348fill_fpregs(struct thread *td, struct fpreg *fpregs) 2349{ 2350 2351 KASSERT(td == curthread || TD_IS_SUSPENDED(td) || 2352 P_SHOULDSTOP(td->td_proc), 2353 ("not suspended thread %p", td)); 2354 fpugetregs(td); 2355 fill_fpregs_xmm(get_pcb_user_save_td(td), fpregs); 2356 return (0); 2357} 2358 2359/* internalize to td->pcb */ 2360int 2361set_fpregs(struct thread *td, struct fpreg *fpregs) 2362{ 2363 2364 set_fpregs_xmm(fpregs, get_pcb_user_save_td(td)); 2365 fpuuserinited(td); 2366 return (0); 2367} 2368 2369/* 2370 * Get machine context. 2371 */ 2372int 2373get_mcontext(struct thread *td, mcontext_t *mcp, int flags) 2374{ 2375 struct pcb *pcb; 2376 struct trapframe *tp; 2377 2378 pcb = td->td_pcb; 2379 tp = td->td_frame; 2380 PROC_LOCK(curthread->td_proc); 2381 mcp->mc_onstack = sigonstack(tp->tf_rsp); 2382 PROC_UNLOCK(curthread->td_proc); 2383 mcp->mc_r15 = tp->tf_r15; 2384 mcp->mc_r14 = tp->tf_r14; 2385 mcp->mc_r13 = tp->tf_r13; 2386 mcp->mc_r12 = tp->tf_r12; 2387 mcp->mc_r11 = tp->tf_r11; 2388 mcp->mc_r10 = tp->tf_r10; 2389 mcp->mc_r9 = tp->tf_r9; 2390 mcp->mc_r8 = tp->tf_r8; 2391 mcp->mc_rdi = tp->tf_rdi; 2392 mcp->mc_rsi = tp->tf_rsi; 2393 mcp->mc_rbp = tp->tf_rbp; 2394 mcp->mc_rbx = tp->tf_rbx; 2395 mcp->mc_rcx = tp->tf_rcx; 2396 mcp->mc_rflags = tp->tf_rflags; 2397 if (flags & GET_MC_CLEAR_RET) { 2398 mcp->mc_rax = 0; 2399 mcp->mc_rdx = 0; 2400 mcp->mc_rflags &= ~PSL_C; 2401 } else { 2402 mcp->mc_rax = tp->tf_rax; 2403 mcp->mc_rdx = tp->tf_rdx; 2404 } 2405 mcp->mc_rip = tp->tf_rip; 2406 mcp->mc_cs = tp->tf_cs; 2407 mcp->mc_rsp = tp->tf_rsp; 2408 mcp->mc_ss = tp->tf_ss; 2409 mcp->mc_ds = tp->tf_ds; 2410 mcp->mc_es = tp->tf_es; 2411 mcp->mc_fs = tp->tf_fs; 2412 mcp->mc_gs = tp->tf_gs; 2413 mcp->mc_flags = tp->tf_flags; 2414 mcp->mc_len = sizeof(*mcp); 2415 get_fpcontext(td, mcp, NULL, 0); 2416 mcp->mc_fsbase = pcb->pcb_fsbase; 2417 mcp->mc_gsbase = pcb->pcb_gsbase; 2418 mcp->mc_xfpustate = 0; 2419 mcp->mc_xfpustate_len = 0; 2420 bzero(mcp->mc_spare, sizeof(mcp->mc_spare)); 2421 return (0); 2422} 2423 2424/* 2425 * Set machine context. 2426 * 2427 * However, we don't set any but the user modifiable flags, and we won't 2428 * touch the cs selector. 2429 */ 2430int 2431set_mcontext(struct thread *td, mcontext_t *mcp) 2432{ 2433 struct pcb *pcb; 2434 struct trapframe *tp; 2435 char *xfpustate; 2436 long rflags; 2437 int ret; 2438 2439 pcb = td->td_pcb; 2440 tp = td->td_frame; 2441 if (mcp->mc_len != sizeof(*mcp) || 2442 (mcp->mc_flags & ~_MC_FLAG_MASK) != 0) 2443 return (EINVAL); 2444 rflags = (mcp->mc_rflags & PSL_USERCHANGE) | 2445 (tp->tf_rflags & ~PSL_USERCHANGE); 2446 if (mcp->mc_flags & _MC_HASFPXSTATE) { 2447 if (mcp->mc_xfpustate_len > cpu_max_ext_state_size - 2448 sizeof(struct savefpu)) 2449 return (EINVAL); 2450 xfpustate = __builtin_alloca(mcp->mc_xfpustate_len); 2451 ret = copyin((void *)mcp->mc_xfpustate, xfpustate, 2452 mcp->mc_xfpustate_len); 2453 if (ret != 0) 2454 return (ret); 2455 } else 2456 xfpustate = NULL; 2457 ret = set_fpcontext(td, mcp, xfpustate, mcp->mc_xfpustate_len); 2458 if (ret != 0) 2459 return (ret); 2460 tp->tf_r15 = mcp->mc_r15; 2461 tp->tf_r14 = mcp->mc_r14; 2462 tp->tf_r13 = mcp->mc_r13; 2463 tp->tf_r12 = mcp->mc_r12; 2464 tp->tf_r11 = mcp->mc_r11; 2465 tp->tf_r10 = mcp->mc_r10; 2466 tp->tf_r9 = mcp->mc_r9; 2467 tp->tf_r8 = mcp->mc_r8; 2468 tp->tf_rdi = mcp->mc_rdi; 2469 tp->tf_rsi = mcp->mc_rsi; 2470 tp->tf_rbp = mcp->mc_rbp; 2471 tp->tf_rbx = mcp->mc_rbx; 2472 tp->tf_rdx = mcp->mc_rdx; 2473 tp->tf_rcx = mcp->mc_rcx; 2474 tp->tf_rax = mcp->mc_rax; 2475 tp->tf_rip = mcp->mc_rip; 2476 tp->tf_rflags = rflags; 2477 tp->tf_rsp = mcp->mc_rsp; 2478 tp->tf_ss = mcp->mc_ss; 2479 tp->tf_flags = mcp->mc_flags; 2480 if (tp->tf_flags & TF_HASSEGS) { 2481 tp->tf_ds = mcp->mc_ds; 2482 tp->tf_es = mcp->mc_es; 2483 tp->tf_fs = mcp->mc_fs; 2484 tp->tf_gs = mcp->mc_gs; 2485 } 2486 if (mcp->mc_flags & _MC_HASBASES) { 2487 pcb->pcb_fsbase = mcp->mc_fsbase; 2488 pcb->pcb_gsbase = mcp->mc_gsbase; 2489 } 2490 set_pcb_flags(pcb, PCB_FULL_IRET); 2491 return (0); 2492} 2493 2494static void 2495get_fpcontext(struct thread *td, mcontext_t *mcp, char *xfpusave, 2496 size_t xfpusave_len) 2497{ 2498 size_t max_len, len; 2499 2500 mcp->mc_ownedfp = fpugetregs(td); 2501 bcopy(get_pcb_user_save_td(td), &mcp->mc_fpstate[0], 2502 sizeof(mcp->mc_fpstate)); 2503 mcp->mc_fpformat = fpuformat(); 2504 if (!use_xsave || xfpusave_len == 0) 2505 return; 2506 max_len = cpu_max_ext_state_size - sizeof(struct savefpu); 2507 len = xfpusave_len; 2508 if (len > max_len) { 2509 len = max_len; 2510 bzero(xfpusave + max_len, len - max_len); 2511 } 2512 mcp->mc_flags |= _MC_HASFPXSTATE; 2513 mcp->mc_xfpustate_len = len; 2514 bcopy(get_pcb_user_save_td(td) + 1, xfpusave, len); 2515} 2516 2517static int 2518set_fpcontext(struct thread *td, mcontext_t *mcp, char *xfpustate, 2519 size_t xfpustate_len) 2520{ 2521 struct savefpu *fpstate; 2522 int error; 2523 2524 if (mcp->mc_fpformat == _MC_FPFMT_NODEV) 2525 return (0); 2526 else if (mcp->mc_fpformat != _MC_FPFMT_XMM) 2527 return (EINVAL); 2528 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) { 2529 /* We don't care what state is left in the FPU or PCB. */ 2530 fpstate_drop(td); 2531 error = 0; 2532 } else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU || 2533 mcp->mc_ownedfp == _MC_FPOWNED_PCB) { 2534 fpstate = (struct savefpu *)&mcp->mc_fpstate; 2535 fpstate->sv_env.en_mxcsr &= cpu_mxcsr_mask; 2536 error = fpusetregs(td, fpstate, xfpustate, xfpustate_len); 2537 } else 2538 return (EINVAL); 2539 return (error); 2540} 2541 2542void 2543fpstate_drop(struct thread *td) 2544{ 2545 2546 KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu")); 2547 critical_enter(); 2548 if (PCPU_GET(fpcurthread) == td) 2549 fpudrop(); 2550 /* 2551 * XXX force a full drop of the fpu. The above only drops it if we 2552 * owned it. 2553 * 2554 * XXX I don't much like fpugetuserregs()'s semantics of doing a full 2555 * drop. Dropping only to the pcb matches fnsave's behaviour. 2556 * We only need to drop to !PCB_INITDONE in sendsig(). But 2557 * sendsig() is the only caller of fpugetuserregs()... perhaps we just 2558 * have too many layers. 2559 */ 2560 clear_pcb_flags(curthread->td_pcb, 2561 PCB_FPUINITDONE | PCB_USERFPUINITDONE); 2562 critical_exit(); 2563} 2564 2565int 2566fill_dbregs(struct thread *td, struct dbreg *dbregs) 2567{ 2568 struct pcb *pcb; 2569 2570 if (td == NULL) { 2571 dbregs->dr[0] = rdr0(); 2572 dbregs->dr[1] = rdr1(); 2573 dbregs->dr[2] = rdr2(); 2574 dbregs->dr[3] = rdr3(); 2575 dbregs->dr[6] = rdr6(); 2576 dbregs->dr[7] = rdr7(); 2577 } else { 2578 pcb = td->td_pcb; 2579 dbregs->dr[0] = pcb->pcb_dr0; 2580 dbregs->dr[1] = pcb->pcb_dr1; 2581 dbregs->dr[2] = pcb->pcb_dr2; 2582 dbregs->dr[3] = pcb->pcb_dr3; 2583 dbregs->dr[6] = pcb->pcb_dr6; 2584 dbregs->dr[7] = pcb->pcb_dr7; 2585 } 2586 dbregs->dr[4] = 0; 2587 dbregs->dr[5] = 0; 2588 dbregs->dr[8] = 0; 2589 dbregs->dr[9] = 0; 2590 dbregs->dr[10] = 0; 2591 dbregs->dr[11] = 0; 2592 dbregs->dr[12] = 0; 2593 dbregs->dr[13] = 0; 2594 dbregs->dr[14] = 0; 2595 dbregs->dr[15] = 0; 2596 return (0); 2597} 2598 2599int 2600set_dbregs(struct thread *td, struct dbreg *dbregs) 2601{ 2602 struct pcb *pcb; 2603 int i; 2604 2605 if (td == NULL) { 2606 load_dr0(dbregs->dr[0]); 2607 load_dr1(dbregs->dr[1]); 2608 load_dr2(dbregs->dr[2]); 2609 load_dr3(dbregs->dr[3]); 2610 load_dr6(dbregs->dr[6]); 2611 load_dr7(dbregs->dr[7]); 2612 } else { 2613 /* 2614 * Don't let an illegal value for dr7 get set. Specifically, 2615 * check for undefined settings. Setting these bit patterns 2616 * result in undefined behaviour and can lead to an unexpected 2617 * TRCTRAP or a general protection fault right here. 2618 * Upper bits of dr6 and dr7 must not be set 2619 */ 2620 for (i = 0; i < 4; i++) { 2621 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02) 2622 return (EINVAL); 2623 if (td->td_frame->tf_cs == _ucode32sel && 2624 DBREG_DR7_LEN(dbregs->dr[7], i) == DBREG_DR7_LEN_8) 2625 return (EINVAL); 2626 } 2627 if ((dbregs->dr[6] & 0xffffffff00000000ul) != 0 || 2628 (dbregs->dr[7] & 0xffffffff00000000ul) != 0) 2629 return (EINVAL); 2630 2631 pcb = td->td_pcb; 2632 2633 /* 2634 * Don't let a process set a breakpoint that is not within the 2635 * process's address space. If a process could do this, it 2636 * could halt the system by setting a breakpoint in the kernel 2637 * (if ddb was enabled). Thus, we need to check to make sure 2638 * that no breakpoints are being enabled for addresses outside 2639 * process's address space. 2640 * 2641 * XXX - what about when the watched area of the user's 2642 * address space is written into from within the kernel 2643 * ... wouldn't that still cause a breakpoint to be generated 2644 * from within kernel mode? 2645 */ 2646 2647 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) { 2648 /* dr0 is enabled */ 2649 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS) 2650 return (EINVAL); 2651 } 2652 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) { 2653 /* dr1 is enabled */ 2654 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS) 2655 return (EINVAL); 2656 } 2657 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) { 2658 /* dr2 is enabled */ 2659 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS) 2660 return (EINVAL); 2661 } 2662 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) { 2663 /* dr3 is enabled */ 2664 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS) 2665 return (EINVAL); 2666 } 2667 2668 pcb->pcb_dr0 = dbregs->dr[0]; 2669 pcb->pcb_dr1 = dbregs->dr[1]; 2670 pcb->pcb_dr2 = dbregs->dr[2]; 2671 pcb->pcb_dr3 = dbregs->dr[3]; 2672 pcb->pcb_dr6 = dbregs->dr[6]; 2673 pcb->pcb_dr7 = dbregs->dr[7]; 2674 2675 set_pcb_flags(pcb, PCB_DBREGS); 2676 } 2677 2678 return (0); 2679} 2680 2681void 2682reset_dbregs(void) 2683{ 2684 2685 load_dr7(0); /* Turn off the control bits first */ 2686 load_dr0(0); 2687 load_dr1(0); 2688 load_dr2(0); 2689 load_dr3(0); 2690 load_dr6(0); 2691} 2692 2693/* 2694 * Return > 0 if a hardware breakpoint has been hit, and the 2695 * breakpoint was in user space. Return 0, otherwise. 2696 */ 2697int 2698user_dbreg_trap(void) 2699{ 2700 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */ 2701 u_int64_t bp; /* breakpoint bits extracted from dr6 */ 2702 int nbp; /* number of breakpoints that triggered */ 2703 caddr_t addr[4]; /* breakpoint addresses */ 2704 int i; 2705 2706 dr7 = rdr7(); 2707 if ((dr7 & 0x000000ff) == 0) { 2708 /* 2709 * all GE and LE bits in the dr7 register are zero, 2710 * thus the trap couldn't have been caused by the 2711 * hardware debug registers 2712 */ 2713 return 0; 2714 } 2715 2716 nbp = 0; 2717 dr6 = rdr6(); 2718 bp = dr6 & 0x0000000f; 2719 2720 if (!bp) { 2721 /* 2722 * None of the breakpoint bits are set meaning this 2723 * trap was not caused by any of the debug registers 2724 */ 2725 return 0; 2726 } 2727 2728 /* 2729 * at least one of the breakpoints were hit, check to see 2730 * which ones and if any of them are user space addresses 2731 */ 2732 2733 if (bp & 0x01) { 2734 addr[nbp++] = (caddr_t)rdr0(); 2735 } 2736 if (bp & 0x02) { 2737 addr[nbp++] = (caddr_t)rdr1(); 2738 } 2739 if (bp & 0x04) { 2740 addr[nbp++] = (caddr_t)rdr2(); 2741 } 2742 if (bp & 0x08) { 2743 addr[nbp++] = (caddr_t)rdr3(); 2744 } 2745 2746 for (i = 0; i < nbp; i++) { 2747 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) { 2748 /* 2749 * addr[i] is in user space 2750 */ 2751 return nbp; 2752 } 2753 } 2754 2755 /* 2756 * None of the breakpoints are in user space. 2757 */ 2758 return 0; 2759} 2760 2761#ifdef KDB 2762 2763/* 2764 * Provide inb() and outb() as functions. They are normally only available as 2765 * inline functions, thus cannot be called from the debugger. 2766 */ 2767 2768/* silence compiler warnings */ 2769u_char inb_(u_short); 2770void outb_(u_short, u_char); 2771 2772u_char 2773inb_(u_short port) 2774{ 2775 return inb(port); 2776} 2777 2778void 2779outb_(u_short port, u_char data) 2780{ 2781 outb(port, data); 2782} 2783 2784#endif /* KDB */ 2785