machdep.c revision 276070
1/*- 2 * Copyright (c) 2003 Peter Wemm. 3 * Copyright (c) 1992 Terrence R. Lambert. 4 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the University of 21 * California, Berkeley and its contributors. 22 * 4. Neither the name of the University nor the names of its contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 39 */ 40 41#include <sys/cdefs.h> 42__FBSDID("$FreeBSD: stable/10/sys/amd64/amd64/machdep.c 276070 2014-12-22 18:40:59Z jhb $"); 43 44#include "opt_atalk.h" 45#include "opt_atpic.h" 46#include "opt_compat.h" 47#include "opt_cpu.h" 48#include "opt_ddb.h" 49#include "opt_inet.h" 50#include "opt_ipx.h" 51#include "opt_isa.h" 52#include "opt_kstack_pages.h" 53#include "opt_maxmem.h" 54#include "opt_mp_watchdog.h" 55#include "opt_perfmon.h" 56#include "opt_platform.h" 57#include "opt_sched.h" 58#include "opt_kdtrace.h" 59 60#include <sys/param.h> 61#include <sys/proc.h> 62#include <sys/systm.h> 63#include <sys/bio.h> 64#include <sys/buf.h> 65#include <sys/bus.h> 66#include <sys/callout.h> 67#include <sys/cons.h> 68#include <sys/cpu.h> 69#include <sys/efi.h> 70#include <sys/eventhandler.h> 71#include <sys/exec.h> 72#include <sys/imgact.h> 73#include <sys/kdb.h> 74#include <sys/kernel.h> 75#include <sys/ktr.h> 76#include <sys/linker.h> 77#include <sys/lock.h> 78#include <sys/malloc.h> 79#include <sys/memrange.h> 80#include <sys/msgbuf.h> 81#include <sys/mutex.h> 82#include <sys/pcpu.h> 83#include <sys/ptrace.h> 84#include <sys/reboot.h> 85#include <sys/rwlock.h> 86#include <sys/sched.h> 87#include <sys/signalvar.h> 88#ifdef SMP 89#include <sys/smp.h> 90#endif 91#include <sys/syscallsubr.h> 92#include <sys/sysctl.h> 93#include <sys/sysent.h> 94#include <sys/sysproto.h> 95#include <sys/ucontext.h> 96#include <sys/vmmeter.h> 97 98#include <vm/vm.h> 99#include <vm/vm_extern.h> 100#include <vm/vm_kern.h> 101#include <vm/vm_page.h> 102#include <vm/vm_map.h> 103#include <vm/vm_object.h> 104#include <vm/vm_pager.h> 105#include <vm/vm_param.h> 106 107#ifdef DDB 108#ifndef KDB 109#error KDB must be enabled in order for DDB to work! 110#endif 111#include <ddb/ddb.h> 112#include <ddb/db_sym.h> 113#endif 114 115#include <net/netisr.h> 116 117#include <machine/clock.h> 118#include <machine/cpu.h> 119#include <machine/cputypes.h> 120#include <machine/intr_machdep.h> 121#include <x86/mca.h> 122#include <machine/md_var.h> 123#include <machine/metadata.h> 124#include <machine/mp_watchdog.h> 125#include <machine/pc/bios.h> 126#include <machine/pcb.h> 127#include <machine/proc.h> 128#include <machine/reg.h> 129#include <machine/sigframe.h> 130#include <machine/specialreg.h> 131#ifdef PERFMON 132#include <machine/perfmon.h> 133#endif 134#include <machine/tss.h> 135#ifdef SMP 136#include <machine/smp.h> 137#endif 138#ifdef FDT 139#include <x86/fdt.h> 140#endif 141 142#ifdef DEV_ATPIC 143#include <x86/isa/icu.h> 144#else 145#include <machine/apicvar.h> 146#endif 147 148#include <isa/isareg.h> 149#include <isa/rtc.h> 150 151/* Sanity check for __curthread() */ 152CTASSERT(offsetof(struct pcpu, pc_curthread) == 0); 153 154extern u_int64_t hammer_time(u_int64_t, u_int64_t); 155 156#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 157#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 158 159static void cpu_startup(void *); 160static void get_fpcontext(struct thread *td, mcontext_t *mcp, 161 char *xfpusave, size_t xfpusave_len); 162static int set_fpcontext(struct thread *td, const mcontext_t *mcp, 163 char *xfpustate, size_t xfpustate_len); 164SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); 165 166/* 167 * The file "conf/ldscript.amd64" defines the symbol "kernphys". Its value is 168 * the physical address at which the kernel is loaded. 169 */ 170extern char kernphys[]; 171#ifdef DDB 172extern vm_offset_t ksym_start, ksym_end; 173#endif 174 175struct msgbuf *msgbufp; 176 177/* Intel ICH registers */ 178#define ICH_PMBASE 0x400 179#define ICH_SMI_EN ICH_PMBASE + 0x30 180 181int _udatasel, _ucodesel, _ucode32sel, _ufssel, _ugssel; 182 183int cold = 1; 184 185long Maxmem = 0; 186long realmem = 0; 187 188/* 189 * The number of PHYSMAP entries must be one less than the number of 190 * PHYSSEG entries because the PHYSMAP entry that spans the largest 191 * physical address that is accessible by ISA DMA is split into two 192 * PHYSSEG entries. 193 */ 194#define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1)) 195 196vm_paddr_t phys_avail[PHYSMAP_SIZE + 2]; 197vm_paddr_t dump_avail[PHYSMAP_SIZE + 2]; 198 199/* must be 2 less so 0 0 can signal end of chunks */ 200#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2) 201#define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2) 202 203struct kva_md_info kmi; 204 205static struct trapframe proc0_tf; 206struct region_descriptor r_gdt, r_idt; 207 208struct pcpu __pcpu[MAXCPU]; 209 210struct mtx icu_lock; 211 212struct mem_range_softc mem_range_softc; 213 214struct mtx dt_lock; /* lock for GDT and LDT */ 215 216void (*vmm_resume_p)(void); 217 218static void 219cpu_startup(dummy) 220 void *dummy; 221{ 222 uintmax_t memsize; 223 char *sysenv; 224 225 /* 226 * On MacBooks, we need to disallow the legacy USB circuit to 227 * generate an SMI# because this can cause several problems, 228 * namely: incorrect CPU frequency detection and failure to 229 * start the APs. 230 * We do this by disabling a bit in the SMI_EN (SMI Control and 231 * Enable register) of the Intel ICH LPC Interface Bridge. 232 */ 233 sysenv = getenv("smbios.system.product"); 234 if (sysenv != NULL) { 235 if (strncmp(sysenv, "MacBook1,1", 10) == 0 || 236 strncmp(sysenv, "MacBook3,1", 10) == 0 || 237 strncmp(sysenv, "MacBook4,1", 10) == 0 || 238 strncmp(sysenv, "MacBookPro1,1", 13) == 0 || 239 strncmp(sysenv, "MacBookPro1,2", 13) == 0 || 240 strncmp(sysenv, "MacBookPro3,1", 13) == 0 || 241 strncmp(sysenv, "MacBookPro4,1", 13) == 0 || 242 strncmp(sysenv, "Macmini1,1", 10) == 0) { 243 if (bootverbose) 244 printf("Disabling LEGACY_USB_EN bit on " 245 "Intel ICH.\n"); 246 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8); 247 } 248 freeenv(sysenv); 249 } 250 251 /* 252 * Good {morning,afternoon,evening,night}. 253 */ 254 startrtclock(); 255 printcpuinfo(); 256 panicifcpuunsupported(); 257#ifdef PERFMON 258 perfmon_init(); 259#endif 260 261 /* 262 * Display physical memory if SMBIOS reports reasonable amount. 263 */ 264 memsize = 0; 265 sysenv = getenv("smbios.memory.enabled"); 266 if (sysenv != NULL) { 267 memsize = (uintmax_t)strtoul(sysenv, (char **)NULL, 10) << 10; 268 freeenv(sysenv); 269 } 270 if (memsize < ptoa((uintmax_t)cnt.v_free_count)) 271 memsize = ptoa((uintmax_t)Maxmem); 272 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20); 273 realmem = atop(memsize); 274 275 /* 276 * Display any holes after the first chunk of extended memory. 277 */ 278 if (bootverbose) { 279 int indx; 280 281 printf("Physical memory chunk(s):\n"); 282 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 283 vm_paddr_t size; 284 285 size = phys_avail[indx + 1] - phys_avail[indx]; 286 printf( 287 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n", 288 (uintmax_t)phys_avail[indx], 289 (uintmax_t)phys_avail[indx + 1] - 1, 290 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE); 291 } 292 } 293 294 vm_ksubmap_init(&kmi); 295 296 printf("avail memory = %ju (%ju MB)\n", 297 ptoa((uintmax_t)cnt.v_free_count), 298 ptoa((uintmax_t)cnt.v_free_count) / 1048576); 299 300 /* 301 * Set up buffers, so they can be used to read disk labels. 302 */ 303 bufinit(); 304 vm_pager_bufferinit(); 305 306 cpu_setregs(); 307} 308 309/* 310 * Send an interrupt to process. 311 * 312 * Stack is set up to allow sigcode stored 313 * at top to call routine, followed by call 314 * to sigreturn routine below. After sigreturn 315 * resets the signal mask, the stack, and the 316 * frame pointer, it returns to the user 317 * specified pc, psl. 318 */ 319void 320sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 321{ 322 struct sigframe sf, *sfp; 323 struct pcb *pcb; 324 struct proc *p; 325 struct thread *td; 326 struct sigacts *psp; 327 char *sp; 328 struct trapframe *regs; 329 char *xfpusave; 330 size_t xfpusave_len; 331 int sig; 332 int oonstack; 333 334 td = curthread; 335 pcb = td->td_pcb; 336 p = td->td_proc; 337 PROC_LOCK_ASSERT(p, MA_OWNED); 338 sig = ksi->ksi_signo; 339 psp = p->p_sigacts; 340 mtx_assert(&psp->ps_mtx, MA_OWNED); 341 regs = td->td_frame; 342 oonstack = sigonstack(regs->tf_rsp); 343 344 if (cpu_max_ext_state_size > sizeof(struct savefpu) && use_xsave) { 345 xfpusave_len = cpu_max_ext_state_size - sizeof(struct savefpu); 346 xfpusave = __builtin_alloca(xfpusave_len); 347 } else { 348 xfpusave_len = 0; 349 xfpusave = NULL; 350 } 351 352 /* Save user context. */ 353 bzero(&sf, sizeof(sf)); 354 sf.sf_uc.uc_sigmask = *mask; 355 sf.sf_uc.uc_stack = td->td_sigstk; 356 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 357 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 358 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 359 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(*regs)); 360 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */ 361 get_fpcontext(td, &sf.sf_uc.uc_mcontext, xfpusave, xfpusave_len); 362 fpstate_drop(td); 363 sf.sf_uc.uc_mcontext.mc_fsbase = pcb->pcb_fsbase; 364 sf.sf_uc.uc_mcontext.mc_gsbase = pcb->pcb_gsbase; 365 bzero(sf.sf_uc.uc_mcontext.mc_spare, 366 sizeof(sf.sf_uc.uc_mcontext.mc_spare)); 367 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__)); 368 369 /* Allocate space for the signal handler context. */ 370 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 371 SIGISMEMBER(psp->ps_sigonstack, sig)) { 372 sp = td->td_sigstk.ss_sp + td->td_sigstk.ss_size; 373#if defined(COMPAT_43) 374 td->td_sigstk.ss_flags |= SS_ONSTACK; 375#endif 376 } else 377 sp = (char *)regs->tf_rsp - 128; 378 if (xfpusave != NULL) { 379 sp -= xfpusave_len; 380 sp = (char *)((unsigned long)sp & ~0x3Ful); 381 sf.sf_uc.uc_mcontext.mc_xfpustate = (register_t)sp; 382 } 383 sp -= sizeof(struct sigframe); 384 /* Align to 16 bytes. */ 385 sfp = (struct sigframe *)((unsigned long)sp & ~0xFul); 386 387 /* Translate the signal if appropriate. */ 388 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 389 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 390 391 /* Build the argument list for the signal handler. */ 392 regs->tf_rdi = sig; /* arg 1 in %rdi */ 393 regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */ 394 bzero(&sf.sf_si, sizeof(sf.sf_si)); 395 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 396 /* Signal handler installed with SA_SIGINFO. */ 397 regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */ 398 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 399 400 /* Fill in POSIX parts */ 401 sf.sf_si = ksi->ksi_info; 402 sf.sf_si.si_signo = sig; /* maybe a translated signal */ 403 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */ 404 } else { 405 /* Old FreeBSD-style arguments. */ 406 regs->tf_rsi = ksi->ksi_code; /* arg 2 in %rsi */ 407 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */ 408 sf.sf_ahu.sf_handler = catcher; 409 } 410 mtx_unlock(&psp->ps_mtx); 411 PROC_UNLOCK(p); 412 413 /* 414 * Copy the sigframe out to the user's stack. 415 */ 416 if (copyout(&sf, sfp, sizeof(*sfp)) != 0 || 417 (xfpusave != NULL && copyout(xfpusave, 418 (void *)sf.sf_uc.uc_mcontext.mc_xfpustate, xfpusave_len) 419 != 0)) { 420#ifdef DEBUG 421 printf("process %ld has trashed its stack\n", (long)p->p_pid); 422#endif 423 PROC_LOCK(p); 424 sigexit(td, SIGILL); 425 } 426 427 regs->tf_rsp = (long)sfp; 428 regs->tf_rip = p->p_sysent->sv_sigcode_base; 429 regs->tf_rflags &= ~(PSL_T | PSL_D); 430 regs->tf_cs = _ucodesel; 431 regs->tf_ds = _udatasel; 432 regs->tf_es = _udatasel; 433 regs->tf_fs = _ufssel; 434 regs->tf_gs = _ugssel; 435 regs->tf_flags = TF_HASSEGS; 436 set_pcb_flags(pcb, PCB_FULL_IRET); 437 PROC_LOCK(p); 438 mtx_lock(&psp->ps_mtx); 439} 440 441/* 442 * System call to cleanup state after a signal 443 * has been taken. Reset signal mask and 444 * stack state from context left by sendsig (above). 445 * Return to previous pc and psl as specified by 446 * context left by sendsig. Check carefully to 447 * make sure that the user has not modified the 448 * state to gain improper privileges. 449 * 450 * MPSAFE 451 */ 452int 453sys_sigreturn(td, uap) 454 struct thread *td; 455 struct sigreturn_args /* { 456 const struct __ucontext *sigcntxp; 457 } */ *uap; 458{ 459 ucontext_t uc; 460 struct pcb *pcb; 461 struct proc *p; 462 struct trapframe *regs; 463 ucontext_t *ucp; 464 char *xfpustate; 465 size_t xfpustate_len; 466 long rflags; 467 int cs, error, ret; 468 ksiginfo_t ksi; 469 470 pcb = td->td_pcb; 471 p = td->td_proc; 472 473 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 474 if (error != 0) { 475 uprintf("pid %d (%s): sigreturn copyin failed\n", 476 p->p_pid, td->td_name); 477 return (error); 478 } 479 ucp = &uc; 480 if ((ucp->uc_mcontext.mc_flags & ~_MC_FLAG_MASK) != 0) { 481 uprintf("pid %d (%s): sigreturn mc_flags %x\n", p->p_pid, 482 td->td_name, ucp->uc_mcontext.mc_flags); 483 return (EINVAL); 484 } 485 regs = td->td_frame; 486 rflags = ucp->uc_mcontext.mc_rflags; 487 /* 488 * Don't allow users to change privileged or reserved flags. 489 */ 490 if (!EFL_SECURE(rflags, regs->tf_rflags)) { 491 uprintf("pid %d (%s): sigreturn rflags = 0x%lx\n", p->p_pid, 492 td->td_name, rflags); 493 return (EINVAL); 494 } 495 496 /* 497 * Don't allow users to load a valid privileged %cs. Let the 498 * hardware check for invalid selectors, excess privilege in 499 * other selectors, invalid %eip's and invalid %esp's. 500 */ 501 cs = ucp->uc_mcontext.mc_cs; 502 if (!CS_SECURE(cs)) { 503 uprintf("pid %d (%s): sigreturn cs = 0x%x\n", p->p_pid, 504 td->td_name, cs); 505 ksiginfo_init_trap(&ksi); 506 ksi.ksi_signo = SIGBUS; 507 ksi.ksi_code = BUS_OBJERR; 508 ksi.ksi_trapno = T_PROTFLT; 509 ksi.ksi_addr = (void *)regs->tf_rip; 510 trapsignal(td, &ksi); 511 return (EINVAL); 512 } 513 514 if ((uc.uc_mcontext.mc_flags & _MC_HASFPXSTATE) != 0) { 515 xfpustate_len = uc.uc_mcontext.mc_xfpustate_len; 516 if (xfpustate_len > cpu_max_ext_state_size - 517 sizeof(struct savefpu)) { 518 uprintf("pid %d (%s): sigreturn xfpusave_len = 0x%zx\n", 519 p->p_pid, td->td_name, xfpustate_len); 520 return (EINVAL); 521 } 522 xfpustate = __builtin_alloca(xfpustate_len); 523 error = copyin((const void *)uc.uc_mcontext.mc_xfpustate, 524 xfpustate, xfpustate_len); 525 if (error != 0) { 526 uprintf( 527 "pid %d (%s): sigreturn copying xfpustate failed\n", 528 p->p_pid, td->td_name); 529 return (error); 530 } 531 } else { 532 xfpustate = NULL; 533 xfpustate_len = 0; 534 } 535 ret = set_fpcontext(td, &ucp->uc_mcontext, xfpustate, xfpustate_len); 536 if (ret != 0) { 537 uprintf("pid %d (%s): sigreturn set_fpcontext err %d\n", 538 p->p_pid, td->td_name, ret); 539 return (ret); 540 } 541 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(*regs)); 542 pcb->pcb_fsbase = ucp->uc_mcontext.mc_fsbase; 543 pcb->pcb_gsbase = ucp->uc_mcontext.mc_gsbase; 544 545#if defined(COMPAT_43) 546 if (ucp->uc_mcontext.mc_onstack & 1) 547 td->td_sigstk.ss_flags |= SS_ONSTACK; 548 else 549 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 550#endif 551 552 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0); 553 set_pcb_flags(pcb, PCB_FULL_IRET); 554 return (EJUSTRETURN); 555} 556 557#ifdef COMPAT_FREEBSD4 558int 559freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap) 560{ 561 562 return sys_sigreturn(td, (struct sigreturn_args *)uap); 563} 564#endif 565 566 567/* 568 * Machine dependent boot() routine 569 * 570 * I haven't seen anything to put here yet 571 * Possibly some stuff might be grafted back here from boot() 572 */ 573void 574cpu_boot(int howto) 575{ 576} 577 578/* 579 * Flush the D-cache for non-DMA I/O so that the I-cache can 580 * be made coherent later. 581 */ 582void 583cpu_flush_dcache(void *ptr, size_t len) 584{ 585 /* Not applicable */ 586} 587 588/* Get current clock frequency for the given cpu id. */ 589int 590cpu_est_clockrate(int cpu_id, uint64_t *rate) 591{ 592 uint64_t tsc1, tsc2; 593 uint64_t acnt, mcnt, perf; 594 register_t reg; 595 596 if (pcpu_find(cpu_id) == NULL || rate == NULL) 597 return (EINVAL); 598 599 /* 600 * If TSC is P-state invariant and APERF/MPERF MSRs do not exist, 601 * DELAY(9) based logic fails. 602 */ 603 if (tsc_is_invariant && !tsc_perf_stat) 604 return (EOPNOTSUPP); 605 606#ifdef SMP 607 if (smp_cpus > 1) { 608 /* Schedule ourselves on the indicated cpu. */ 609 thread_lock(curthread); 610 sched_bind(curthread, cpu_id); 611 thread_unlock(curthread); 612 } 613#endif 614 615 /* Calibrate by measuring a short delay. */ 616 reg = intr_disable(); 617 if (tsc_is_invariant) { 618 wrmsr(MSR_MPERF, 0); 619 wrmsr(MSR_APERF, 0); 620 tsc1 = rdtsc(); 621 DELAY(1000); 622 mcnt = rdmsr(MSR_MPERF); 623 acnt = rdmsr(MSR_APERF); 624 tsc2 = rdtsc(); 625 intr_restore(reg); 626 perf = 1000 * acnt / mcnt; 627 *rate = (tsc2 - tsc1) * perf; 628 } else { 629 tsc1 = rdtsc(); 630 DELAY(1000); 631 tsc2 = rdtsc(); 632 intr_restore(reg); 633 *rate = (tsc2 - tsc1) * 1000; 634 } 635 636#ifdef SMP 637 if (smp_cpus > 1) { 638 thread_lock(curthread); 639 sched_unbind(curthread); 640 thread_unlock(curthread); 641 } 642#endif 643 644 return (0); 645} 646 647/* 648 * Shutdown the CPU as much as possible 649 */ 650void 651cpu_halt(void) 652{ 653 for (;;) 654 halt(); 655} 656 657void (*cpu_idle_hook)(sbintime_t) = NULL; /* ACPI idle hook. */ 658static int cpu_ident_amdc1e = 0; /* AMD C1E supported. */ 659static int idle_mwait = 1; /* Use MONITOR/MWAIT for short idle. */ 660TUNABLE_INT("machdep.idle_mwait", &idle_mwait); 661SYSCTL_INT(_machdep, OID_AUTO, idle_mwait, CTLFLAG_RW, &idle_mwait, 662 0, "Use MONITOR/MWAIT for short idle"); 663 664#define STATE_RUNNING 0x0 665#define STATE_MWAIT 0x1 666#define STATE_SLEEPING 0x2 667 668static void 669cpu_idle_acpi(sbintime_t sbt) 670{ 671 int *state; 672 673 state = (int *)PCPU_PTR(monitorbuf); 674 *state = STATE_SLEEPING; 675 676 /* See comments in cpu_idle_hlt(). */ 677 disable_intr(); 678 if (sched_runnable()) 679 enable_intr(); 680 else if (cpu_idle_hook) 681 cpu_idle_hook(sbt); 682 else 683 __asm __volatile("sti; hlt"); 684 *state = STATE_RUNNING; 685} 686 687static void 688cpu_idle_hlt(sbintime_t sbt) 689{ 690 int *state; 691 692 state = (int *)PCPU_PTR(monitorbuf); 693 *state = STATE_SLEEPING; 694 695 /* 696 * Since we may be in a critical section from cpu_idle(), if 697 * an interrupt fires during that critical section we may have 698 * a pending preemption. If the CPU halts, then that thread 699 * may not execute until a later interrupt awakens the CPU. 700 * To handle this race, check for a runnable thread after 701 * disabling interrupts and immediately return if one is 702 * found. Also, we must absolutely guarentee that hlt is 703 * the next instruction after sti. This ensures that any 704 * interrupt that fires after the call to disable_intr() will 705 * immediately awaken the CPU from hlt. Finally, please note 706 * that on x86 this works fine because of interrupts enabled only 707 * after the instruction following sti takes place, while IF is set 708 * to 1 immediately, allowing hlt instruction to acknowledge the 709 * interrupt. 710 */ 711 disable_intr(); 712 if (sched_runnable()) 713 enable_intr(); 714 else 715 __asm __volatile("sti; hlt"); 716 *state = STATE_RUNNING; 717} 718 719/* 720 * MWAIT cpu power states. Lower 4 bits are sub-states. 721 */ 722#define MWAIT_C0 0xf0 723#define MWAIT_C1 0x00 724#define MWAIT_C2 0x10 725#define MWAIT_C3 0x20 726#define MWAIT_C4 0x30 727 728static void 729cpu_idle_mwait(sbintime_t sbt) 730{ 731 int *state; 732 733 state = (int *)PCPU_PTR(monitorbuf); 734 *state = STATE_MWAIT; 735 736 /* See comments in cpu_idle_hlt(). */ 737 disable_intr(); 738 if (sched_runnable()) { 739 enable_intr(); 740 *state = STATE_RUNNING; 741 return; 742 } 743 cpu_monitor(state, 0, 0); 744 if (*state == STATE_MWAIT) 745 __asm __volatile("sti; mwait" : : "a" (MWAIT_C1), "c" (0)); 746 else 747 enable_intr(); 748 *state = STATE_RUNNING; 749} 750 751static void 752cpu_idle_spin(sbintime_t sbt) 753{ 754 int *state; 755 int i; 756 757 state = (int *)PCPU_PTR(monitorbuf); 758 *state = STATE_RUNNING; 759 760 /* 761 * The sched_runnable() call is racy but as long as there is 762 * a loop missing it one time will have just a little impact if any 763 * (and it is much better than missing the check at all). 764 */ 765 for (i = 0; i < 1000; i++) { 766 if (sched_runnable()) 767 return; 768 cpu_spinwait(); 769 } 770} 771 772/* 773 * C1E renders the local APIC timer dead, so we disable it by 774 * reading the Interrupt Pending Message register and clearing 775 * both C1eOnCmpHalt (bit 28) and SmiOnCmpHalt (bit 27). 776 * 777 * Reference: 778 * "BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh Processors" 779 * #32559 revision 3.00+ 780 */ 781#define MSR_AMDK8_IPM 0xc0010055 782#define AMDK8_SMIONCMPHALT (1ULL << 27) 783#define AMDK8_C1EONCMPHALT (1ULL << 28) 784#define AMDK8_CMPHALT (AMDK8_SMIONCMPHALT | AMDK8_C1EONCMPHALT) 785 786static void 787cpu_probe_amdc1e(void) 788{ 789 790 /* 791 * Detect the presence of C1E capability mostly on latest 792 * dual-cores (or future) k8 family. 793 */ 794 if (cpu_vendor_id == CPU_VENDOR_AMD && 795 (cpu_id & 0x00000f00) == 0x00000f00 && 796 (cpu_id & 0x0fff0000) >= 0x00040000) { 797 cpu_ident_amdc1e = 1; 798 } 799} 800 801void (*cpu_idle_fn)(sbintime_t) = cpu_idle_acpi; 802 803void 804cpu_idle(int busy) 805{ 806 uint64_t msr; 807 sbintime_t sbt = -1; 808 809 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d", 810 busy, curcpu); 811#ifdef MP_WATCHDOG 812 ap_watchdog(PCPU_GET(cpuid)); 813#endif 814 /* If we are busy - try to use fast methods. */ 815 if (busy) { 816 if ((cpu_feature2 & CPUID2_MON) && idle_mwait) { 817 cpu_idle_mwait(busy); 818 goto out; 819 } 820 } 821 822 /* If we have time - switch timers into idle mode. */ 823 if (!busy) { 824 critical_enter(); 825 sbt = cpu_idleclock(); 826 } 827 828 /* Apply AMD APIC timer C1E workaround. */ 829 if (cpu_ident_amdc1e && cpu_disable_deep_sleep) { 830 msr = rdmsr(MSR_AMDK8_IPM); 831 if (msr & AMDK8_CMPHALT) 832 wrmsr(MSR_AMDK8_IPM, msr & ~AMDK8_CMPHALT); 833 } 834 835 /* Call main idle method. */ 836 cpu_idle_fn(sbt); 837 838 /* Switch timers mack into active mode. */ 839 if (!busy) { 840 cpu_activeclock(); 841 critical_exit(); 842 } 843out: 844 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done", 845 busy, curcpu); 846} 847 848int 849cpu_idle_wakeup(int cpu) 850{ 851 struct pcpu *pcpu; 852 int *state; 853 854 pcpu = pcpu_find(cpu); 855 state = (int *)pcpu->pc_monitorbuf; 856 /* 857 * This doesn't need to be atomic since missing the race will 858 * simply result in unnecessary IPIs. 859 */ 860 if (*state == STATE_SLEEPING) 861 return (0); 862 if (*state == STATE_MWAIT) 863 *state = STATE_RUNNING; 864 return (1); 865} 866 867/* 868 * Ordered by speed/power consumption. 869 */ 870struct { 871 void *id_fn; 872 char *id_name; 873} idle_tbl[] = { 874 { cpu_idle_spin, "spin" }, 875 { cpu_idle_mwait, "mwait" }, 876 { cpu_idle_hlt, "hlt" }, 877 { cpu_idle_acpi, "acpi" }, 878 { NULL, NULL } 879}; 880 881static int 882idle_sysctl_available(SYSCTL_HANDLER_ARGS) 883{ 884 char *avail, *p; 885 int error; 886 int i; 887 888 avail = malloc(256, M_TEMP, M_WAITOK); 889 p = avail; 890 for (i = 0; idle_tbl[i].id_name != NULL; i++) { 891 if (strstr(idle_tbl[i].id_name, "mwait") && 892 (cpu_feature2 & CPUID2_MON) == 0) 893 continue; 894 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 && 895 cpu_idle_hook == NULL) 896 continue; 897 p += sprintf(p, "%s%s", p != avail ? ", " : "", 898 idle_tbl[i].id_name); 899 } 900 error = sysctl_handle_string(oidp, avail, 0, req); 901 free(avail, M_TEMP); 902 return (error); 903} 904 905SYSCTL_PROC(_machdep, OID_AUTO, idle_available, CTLTYPE_STRING | CTLFLAG_RD, 906 0, 0, idle_sysctl_available, "A", "list of available idle functions"); 907 908static int 909idle_sysctl(SYSCTL_HANDLER_ARGS) 910{ 911 char buf[16]; 912 int error; 913 char *p; 914 int i; 915 916 p = "unknown"; 917 for (i = 0; idle_tbl[i].id_name != NULL; i++) { 918 if (idle_tbl[i].id_fn == cpu_idle_fn) { 919 p = idle_tbl[i].id_name; 920 break; 921 } 922 } 923 strncpy(buf, p, sizeof(buf)); 924 error = sysctl_handle_string(oidp, buf, sizeof(buf), req); 925 if (error != 0 || req->newptr == NULL) 926 return (error); 927 for (i = 0; idle_tbl[i].id_name != NULL; i++) { 928 if (strstr(idle_tbl[i].id_name, "mwait") && 929 (cpu_feature2 & CPUID2_MON) == 0) 930 continue; 931 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 && 932 cpu_idle_hook == NULL) 933 continue; 934 if (strcmp(idle_tbl[i].id_name, buf)) 935 continue; 936 cpu_idle_fn = idle_tbl[i].id_fn; 937 return (0); 938 } 939 return (EINVAL); 940} 941 942SYSCTL_PROC(_machdep, OID_AUTO, idle, CTLTYPE_STRING | CTLFLAG_RW, 0, 0, 943 idle_sysctl, "A", "currently selected idle function"); 944 945/* 946 * Reset registers to default values on exec. 947 */ 948void 949exec_setregs(struct thread *td, struct image_params *imgp, u_long stack) 950{ 951 struct trapframe *regs = td->td_frame; 952 struct pcb *pcb = td->td_pcb; 953 954 mtx_lock(&dt_lock); 955 if (td->td_proc->p_md.md_ldt != NULL) 956 user_ldt_free(td); 957 else 958 mtx_unlock(&dt_lock); 959 960 pcb->pcb_fsbase = 0; 961 pcb->pcb_gsbase = 0; 962 clear_pcb_flags(pcb, PCB_32BIT); 963 pcb->pcb_initial_fpucw = __INITIAL_FPUCW__; 964 set_pcb_flags(pcb, PCB_FULL_IRET); 965 966 bzero((char *)regs, sizeof(struct trapframe)); 967 regs->tf_rip = imgp->entry_addr; 968 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; 969 regs->tf_rdi = stack; /* argv */ 970 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T); 971 regs->tf_ss = _udatasel; 972 regs->tf_cs = _ucodesel; 973 regs->tf_ds = _udatasel; 974 regs->tf_es = _udatasel; 975 regs->tf_fs = _ufssel; 976 regs->tf_gs = _ugssel; 977 regs->tf_flags = TF_HASSEGS; 978 td->td_retval[1] = 0; 979 980 /* 981 * Reset the hardware debug registers if they were in use. 982 * They won't have any meaning for the newly exec'd process. 983 */ 984 if (pcb->pcb_flags & PCB_DBREGS) { 985 pcb->pcb_dr0 = 0; 986 pcb->pcb_dr1 = 0; 987 pcb->pcb_dr2 = 0; 988 pcb->pcb_dr3 = 0; 989 pcb->pcb_dr6 = 0; 990 pcb->pcb_dr7 = 0; 991 if (pcb == curpcb) { 992 /* 993 * Clear the debug registers on the running 994 * CPU, otherwise they will end up affecting 995 * the next process we switch to. 996 */ 997 reset_dbregs(); 998 } 999 clear_pcb_flags(pcb, PCB_DBREGS); 1000 } 1001 1002 /* 1003 * Drop the FP state if we hold it, so that the process gets a 1004 * clean FP state if it uses the FPU again. 1005 */ 1006 fpstate_drop(td); 1007} 1008 1009void 1010cpu_setregs(void) 1011{ 1012 register_t cr0; 1013 1014 cr0 = rcr0(); 1015 /* 1016 * CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the 1017 * BSP. See the comments there about why we set them. 1018 */ 1019 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM; 1020 load_cr0(cr0); 1021} 1022 1023/* 1024 * Initialize amd64 and configure to run kernel 1025 */ 1026 1027/* 1028 * Initialize segments & interrupt table 1029 */ 1030 1031struct user_segment_descriptor gdt[NGDT * MAXCPU];/* global descriptor tables */ 1032static struct gate_descriptor idt0[NIDT]; 1033struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ 1034 1035static char dblfault_stack[PAGE_SIZE] __aligned(16); 1036 1037static char nmi0_stack[PAGE_SIZE] __aligned(16); 1038CTASSERT(sizeof(struct nmi_pcpu) == 16); 1039 1040struct amd64tss common_tss[MAXCPU]; 1041 1042/* 1043 * Software prototypes -- in more palatable form. 1044 * 1045 * Keep GUFS32, GUGS32, GUCODE32 and GUDATA at the same 1046 * slots as corresponding segments for i386 kernel. 1047 */ 1048struct soft_segment_descriptor gdt_segs[] = { 1049/* GNULL_SEL 0 Null Descriptor */ 1050{ .ssd_base = 0x0, 1051 .ssd_limit = 0x0, 1052 .ssd_type = 0, 1053 .ssd_dpl = 0, 1054 .ssd_p = 0, 1055 .ssd_long = 0, 1056 .ssd_def32 = 0, 1057 .ssd_gran = 0 }, 1058/* GNULL2_SEL 1 Null Descriptor */ 1059{ .ssd_base = 0x0, 1060 .ssd_limit = 0x0, 1061 .ssd_type = 0, 1062 .ssd_dpl = 0, 1063 .ssd_p = 0, 1064 .ssd_long = 0, 1065 .ssd_def32 = 0, 1066 .ssd_gran = 0 }, 1067/* GUFS32_SEL 2 32 bit %gs Descriptor for user */ 1068{ .ssd_base = 0x0, 1069 .ssd_limit = 0xfffff, 1070 .ssd_type = SDT_MEMRWA, 1071 .ssd_dpl = SEL_UPL, 1072 .ssd_p = 1, 1073 .ssd_long = 0, 1074 .ssd_def32 = 1, 1075 .ssd_gran = 1 }, 1076/* GUGS32_SEL 3 32 bit %fs Descriptor for user */ 1077{ .ssd_base = 0x0, 1078 .ssd_limit = 0xfffff, 1079 .ssd_type = SDT_MEMRWA, 1080 .ssd_dpl = SEL_UPL, 1081 .ssd_p = 1, 1082 .ssd_long = 0, 1083 .ssd_def32 = 1, 1084 .ssd_gran = 1 }, 1085/* GCODE_SEL 4 Code Descriptor for kernel */ 1086{ .ssd_base = 0x0, 1087 .ssd_limit = 0xfffff, 1088 .ssd_type = SDT_MEMERA, 1089 .ssd_dpl = SEL_KPL, 1090 .ssd_p = 1, 1091 .ssd_long = 1, 1092 .ssd_def32 = 0, 1093 .ssd_gran = 1 }, 1094/* GDATA_SEL 5 Data Descriptor for kernel */ 1095{ .ssd_base = 0x0, 1096 .ssd_limit = 0xfffff, 1097 .ssd_type = SDT_MEMRWA, 1098 .ssd_dpl = SEL_KPL, 1099 .ssd_p = 1, 1100 .ssd_long = 1, 1101 .ssd_def32 = 0, 1102 .ssd_gran = 1 }, 1103/* GUCODE32_SEL 6 32 bit Code Descriptor for user */ 1104{ .ssd_base = 0x0, 1105 .ssd_limit = 0xfffff, 1106 .ssd_type = SDT_MEMERA, 1107 .ssd_dpl = SEL_UPL, 1108 .ssd_p = 1, 1109 .ssd_long = 0, 1110 .ssd_def32 = 1, 1111 .ssd_gran = 1 }, 1112/* GUDATA_SEL 7 32/64 bit Data Descriptor for user */ 1113{ .ssd_base = 0x0, 1114 .ssd_limit = 0xfffff, 1115 .ssd_type = SDT_MEMRWA, 1116 .ssd_dpl = SEL_UPL, 1117 .ssd_p = 1, 1118 .ssd_long = 0, 1119 .ssd_def32 = 1, 1120 .ssd_gran = 1 }, 1121/* GUCODE_SEL 8 64 bit Code Descriptor for user */ 1122{ .ssd_base = 0x0, 1123 .ssd_limit = 0xfffff, 1124 .ssd_type = SDT_MEMERA, 1125 .ssd_dpl = SEL_UPL, 1126 .ssd_p = 1, 1127 .ssd_long = 1, 1128 .ssd_def32 = 0, 1129 .ssd_gran = 1 }, 1130/* GPROC0_SEL 9 Proc 0 Tss Descriptor */ 1131{ .ssd_base = 0x0, 1132 .ssd_limit = sizeof(struct amd64tss) + IOPAGES * PAGE_SIZE - 1, 1133 .ssd_type = SDT_SYSTSS, 1134 .ssd_dpl = SEL_KPL, 1135 .ssd_p = 1, 1136 .ssd_long = 0, 1137 .ssd_def32 = 0, 1138 .ssd_gran = 0 }, 1139/* Actually, the TSS is a system descriptor which is double size */ 1140{ .ssd_base = 0x0, 1141 .ssd_limit = 0x0, 1142 .ssd_type = 0, 1143 .ssd_dpl = 0, 1144 .ssd_p = 0, 1145 .ssd_long = 0, 1146 .ssd_def32 = 0, 1147 .ssd_gran = 0 }, 1148/* GUSERLDT_SEL 11 LDT Descriptor */ 1149{ .ssd_base = 0x0, 1150 .ssd_limit = 0x0, 1151 .ssd_type = 0, 1152 .ssd_dpl = 0, 1153 .ssd_p = 0, 1154 .ssd_long = 0, 1155 .ssd_def32 = 0, 1156 .ssd_gran = 0 }, 1157/* GUSERLDT_SEL 12 LDT Descriptor, double size */ 1158{ .ssd_base = 0x0, 1159 .ssd_limit = 0x0, 1160 .ssd_type = 0, 1161 .ssd_dpl = 0, 1162 .ssd_p = 0, 1163 .ssd_long = 0, 1164 .ssd_def32 = 0, 1165 .ssd_gran = 0 }, 1166}; 1167 1168void 1169setidt(idx, func, typ, dpl, ist) 1170 int idx; 1171 inthand_t *func; 1172 int typ; 1173 int dpl; 1174 int ist; 1175{ 1176 struct gate_descriptor *ip; 1177 1178 ip = idt + idx; 1179 ip->gd_looffset = (uintptr_t)func; 1180 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL); 1181 ip->gd_ist = ist; 1182 ip->gd_xx = 0; 1183 ip->gd_type = typ; 1184 ip->gd_dpl = dpl; 1185 ip->gd_p = 1; 1186 ip->gd_hioffset = ((uintptr_t)func)>>16 ; 1187} 1188 1189extern inthand_t 1190 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 1191 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 1192 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 1193 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 1194 IDTVEC(xmm), IDTVEC(dblfault), 1195#ifdef KDTRACE_HOOKS 1196 IDTVEC(dtrace_ret), 1197#endif 1198#ifdef XENHVM 1199 IDTVEC(xen_intr_upcall), 1200#endif 1201 IDTVEC(fast_syscall), IDTVEC(fast_syscall32); 1202 1203#ifdef DDB 1204/* 1205 * Display the index and function name of any IDT entries that don't use 1206 * the default 'rsvd' entry point. 1207 */ 1208DB_SHOW_COMMAND(idt, db_show_idt) 1209{ 1210 struct gate_descriptor *ip; 1211 int idx; 1212 uintptr_t func; 1213 1214 ip = idt; 1215 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) { 1216 func = ((long)ip->gd_hioffset << 16 | ip->gd_looffset); 1217 if (func != (uintptr_t)&IDTVEC(rsvd)) { 1218 db_printf("%3d\t", idx); 1219 db_printsym(func, DB_STGY_PROC); 1220 db_printf("\n"); 1221 } 1222 ip++; 1223 } 1224} 1225 1226/* Show privileged registers. */ 1227DB_SHOW_COMMAND(sysregs, db_show_sysregs) 1228{ 1229 struct { 1230 uint16_t limit; 1231 uint64_t base; 1232 } __packed idtr, gdtr; 1233 uint16_t ldt, tr; 1234 1235 __asm __volatile("sidt %0" : "=m" (idtr)); 1236 db_printf("idtr\t0x%016lx/%04x\n", 1237 (u_long)idtr.base, (u_int)idtr.limit); 1238 __asm __volatile("sgdt %0" : "=m" (gdtr)); 1239 db_printf("gdtr\t0x%016lx/%04x\n", 1240 (u_long)gdtr.base, (u_int)gdtr.limit); 1241 __asm __volatile("sldt %0" : "=r" (ldt)); 1242 db_printf("ldtr\t0x%04x\n", ldt); 1243 __asm __volatile("str %0" : "=r" (tr)); 1244 db_printf("tr\t0x%04x\n", tr); 1245 db_printf("cr0\t0x%016lx\n", rcr0()); 1246 db_printf("cr2\t0x%016lx\n", rcr2()); 1247 db_printf("cr3\t0x%016lx\n", rcr3()); 1248 db_printf("cr4\t0x%016lx\n", rcr4()); 1249 db_printf("EFER\t%016lx\n", rdmsr(MSR_EFER)); 1250 db_printf("FEATURES_CTL\t%016lx\n", rdmsr(MSR_IA32_FEATURE_CONTROL)); 1251 db_printf("DEBUG_CTL\t%016lx\n", rdmsr(MSR_DEBUGCTLMSR)); 1252 db_printf("PAT\t%016lx\n", rdmsr(MSR_PAT)); 1253 db_printf("GSBASE\t%016lx\n", rdmsr(MSR_GSBASE)); 1254} 1255#endif 1256 1257void 1258sdtossd(sd, ssd) 1259 struct user_segment_descriptor *sd; 1260 struct soft_segment_descriptor *ssd; 1261{ 1262 1263 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 1264 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 1265 ssd->ssd_type = sd->sd_type; 1266 ssd->ssd_dpl = sd->sd_dpl; 1267 ssd->ssd_p = sd->sd_p; 1268 ssd->ssd_long = sd->sd_long; 1269 ssd->ssd_def32 = sd->sd_def32; 1270 ssd->ssd_gran = sd->sd_gran; 1271} 1272 1273void 1274ssdtosd(ssd, sd) 1275 struct soft_segment_descriptor *ssd; 1276 struct user_segment_descriptor *sd; 1277{ 1278 1279 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 1280 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff; 1281 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 1282 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 1283 sd->sd_type = ssd->ssd_type; 1284 sd->sd_dpl = ssd->ssd_dpl; 1285 sd->sd_p = ssd->ssd_p; 1286 sd->sd_long = ssd->ssd_long; 1287 sd->sd_def32 = ssd->ssd_def32; 1288 sd->sd_gran = ssd->ssd_gran; 1289} 1290 1291void 1292ssdtosyssd(ssd, sd) 1293 struct soft_segment_descriptor *ssd; 1294 struct system_segment_descriptor *sd; 1295{ 1296 1297 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 1298 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful; 1299 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 1300 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 1301 sd->sd_type = ssd->ssd_type; 1302 sd->sd_dpl = ssd->ssd_dpl; 1303 sd->sd_p = ssd->ssd_p; 1304 sd->sd_gran = ssd->ssd_gran; 1305} 1306 1307#if !defined(DEV_ATPIC) && defined(DEV_ISA) 1308#include <isa/isavar.h> 1309#include <isa/isareg.h> 1310/* 1311 * Return a bitmap of the current interrupt requests. This is 8259-specific 1312 * and is only suitable for use at probe time. 1313 * This is only here to pacify sio. It is NOT FATAL if this doesn't work. 1314 * It shouldn't be here. There should probably be an APIC centric 1315 * implementation in the apic driver code, if at all. 1316 */ 1317intrmask_t 1318isa_irq_pending(void) 1319{ 1320 u_char irr1; 1321 u_char irr2; 1322 1323 irr1 = inb(IO_ICU1); 1324 irr2 = inb(IO_ICU2); 1325 return ((irr2 << 8) | irr1); 1326} 1327#endif 1328 1329u_int basemem; 1330 1331static int 1332add_physmap_entry(uint64_t base, uint64_t length, vm_paddr_t *physmap, 1333 int *physmap_idxp) 1334{ 1335 int i, insert_idx, physmap_idx; 1336 1337 physmap_idx = *physmap_idxp; 1338 1339 if (length == 0) 1340 return (1); 1341 1342 /* 1343 * Find insertion point while checking for overlap. Start off by 1344 * assuming the new entry will be added to the end. 1345 */ 1346 insert_idx = physmap_idx + 2; 1347 for (i = 0; i <= physmap_idx; i += 2) { 1348 if (base < physmap[i + 1]) { 1349 if (base + length <= physmap[i]) { 1350 insert_idx = i; 1351 break; 1352 } 1353 if (boothowto & RB_VERBOSE) 1354 printf( 1355 "Overlapping memory regions, ignoring second region\n"); 1356 return (1); 1357 } 1358 } 1359 1360 /* See if we can prepend to the next entry. */ 1361 if (insert_idx <= physmap_idx && base + length == physmap[insert_idx]) { 1362 physmap[insert_idx] = base; 1363 return (1); 1364 } 1365 1366 /* See if we can append to the previous entry. */ 1367 if (insert_idx > 0 && base == physmap[insert_idx - 1]) { 1368 physmap[insert_idx - 1] += length; 1369 return (1); 1370 } 1371 1372 physmap_idx += 2; 1373 *physmap_idxp = physmap_idx; 1374 if (physmap_idx == PHYSMAP_SIZE) { 1375 printf( 1376 "Too many segments in the physical address map, giving up\n"); 1377 return (0); 1378 } 1379 1380 /* 1381 * Move the last 'N' entries down to make room for the new 1382 * entry if needed. 1383 */ 1384 for (i = physmap_idx; i > insert_idx; i -= 2) { 1385 physmap[i] = physmap[i - 2]; 1386 physmap[i + 1] = physmap[i - 1]; 1387 } 1388 1389 /* Insert the new entry. */ 1390 physmap[insert_idx] = base; 1391 physmap[insert_idx + 1] = base + length; 1392 return (1); 1393} 1394 1395static void 1396add_smap_entries(struct bios_smap *smapbase, vm_paddr_t *physmap, 1397 int *physmap_idx) 1398{ 1399 struct bios_smap *smap, *smapend; 1400 u_int32_t smapsize; 1401 1402 /* 1403 * Memory map from INT 15:E820. 1404 * 1405 * subr_module.c says: 1406 * "Consumer may safely assume that size value precedes data." 1407 * ie: an int32_t immediately precedes smap. 1408 */ 1409 smapsize = *((u_int32_t *)smapbase - 1); 1410 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize); 1411 1412 for (smap = smapbase; smap < smapend; smap++) { 1413 if (boothowto & RB_VERBOSE) 1414 printf("SMAP type=%02x base=%016lx len=%016lx\n", 1415 smap->type, smap->base, smap->length); 1416 1417 if (smap->type != SMAP_TYPE_MEMORY) 1418 continue; 1419 1420 if (!add_physmap_entry(smap->base, smap->length, physmap, 1421 physmap_idx)) 1422 break; 1423 } 1424} 1425 1426#define efi_next_descriptor(ptr, size) \ 1427 ((struct efi_md *)(((uint8_t *) ptr) + size)) 1428 1429static void 1430add_efi_map_entries(struct efi_map_header *efihdr, vm_paddr_t *physmap, 1431 int *physmap_idx) 1432{ 1433 struct efi_md *map, *p; 1434 const char *type; 1435 size_t efisz; 1436 int ndesc, i; 1437 1438 static const char *types[] = { 1439 "Reserved", 1440 "LoaderCode", 1441 "LoaderData", 1442 "BootServicesCode", 1443 "BootServicesData", 1444 "RuntimeServicesCode", 1445 "RuntimeServicesData", 1446 "ConventionalMemory", 1447 "UnusableMemory", 1448 "ACPIReclaimMemory", 1449 "ACPIMemoryNVS", 1450 "MemoryMappedIO", 1451 "MemoryMappedIOPortSpace", 1452 "PalCode" 1453 }; 1454 1455 /* 1456 * Memory map data provided by UEFI via the GetMemoryMap 1457 * Boot Services API. 1458 */ 1459 efisz = (sizeof(struct efi_map_header) + 0xf) & ~0xf; 1460 map = (struct efi_md *)((uint8_t *)efihdr + efisz); 1461 1462 if (efihdr->descriptor_size == 0) 1463 return; 1464 ndesc = efihdr->memory_size / efihdr->descriptor_size; 1465 1466 if (boothowto & RB_VERBOSE) 1467 printf("%23s %12s %12s %8s %4s\n", 1468 "Type", "Physical", "Virtual", "#Pages", "Attr"); 1469 1470 for (i = 0, p = map; i < ndesc; i++, 1471 p = efi_next_descriptor(p, efihdr->descriptor_size)) { 1472 if (boothowto & RB_VERBOSE) { 1473 if (p->md_type <= EFI_MD_TYPE_PALCODE) 1474 type = types[p->md_type]; 1475 else 1476 type = "<INVALID>"; 1477 printf("%23s %012lx %12p %08lx ", type, p->md_phys, 1478 p->md_virt, p->md_pages); 1479 if (p->md_attr & EFI_MD_ATTR_UC) 1480 printf("UC "); 1481 if (p->md_attr & EFI_MD_ATTR_WC) 1482 printf("WC "); 1483 if (p->md_attr & EFI_MD_ATTR_WT) 1484 printf("WT "); 1485 if (p->md_attr & EFI_MD_ATTR_WB) 1486 printf("WB "); 1487 if (p->md_attr & EFI_MD_ATTR_UCE) 1488 printf("UCE "); 1489 if (p->md_attr & EFI_MD_ATTR_WP) 1490 printf("WP "); 1491 if (p->md_attr & EFI_MD_ATTR_RP) 1492 printf("RP "); 1493 if (p->md_attr & EFI_MD_ATTR_XP) 1494 printf("XP "); 1495 if (p->md_attr & EFI_MD_ATTR_RT) 1496 printf("RUNTIME"); 1497 printf("\n"); 1498 } 1499 1500 switch (p->md_type) { 1501 case EFI_MD_TYPE_CODE: 1502 case EFI_MD_TYPE_DATA: 1503 case EFI_MD_TYPE_BS_CODE: 1504 case EFI_MD_TYPE_BS_DATA: 1505 case EFI_MD_TYPE_FREE: 1506 /* 1507 * We're allowed to use any entry with these types. 1508 */ 1509 break; 1510 default: 1511 continue; 1512 } 1513 1514 if (!add_physmap_entry(p->md_phys, (p->md_pages * PAGE_SIZE), 1515 physmap, physmap_idx)) 1516 break; 1517 } 1518} 1519 1520static char bootmethod[16] = ""; 1521SYSCTL_STRING(_machdep, OID_AUTO, bootmethod, CTLFLAG_RD, bootmethod, 0, 1522 "System firmware boot method"); 1523 1524/* 1525 * Populate the (physmap) array with base/bound pairs describing the 1526 * available physical memory in the system, then test this memory and 1527 * build the phys_avail array describing the actually-available memory. 1528 * 1529 * Total memory size may be set by the kernel environment variable 1530 * hw.physmem or the compile-time define MAXMEM. 1531 * 1532 * XXX first should be vm_paddr_t. 1533 */ 1534static void 1535getmemsize(caddr_t kmdp, u_int64_t first) 1536{ 1537 int i, physmap_idx, pa_indx, da_indx; 1538 vm_paddr_t pa, physmap[PHYSMAP_SIZE]; 1539 u_long physmem_start, physmem_tunable, memtest; 1540 pt_entry_t *pte; 1541 struct bios_smap *smapbase; 1542 struct efi_map_header *efihdr; 1543 quad_t dcons_addr, dcons_size; 1544 1545 bzero(physmap, sizeof(physmap)); 1546 basemem = 0; 1547 physmap_idx = 0; 1548 1549 efihdr = (struct efi_map_header *)preload_search_info(kmdp, 1550 MODINFO_METADATA | MODINFOMD_EFI_MAP); 1551 smapbase = (struct bios_smap *)preload_search_info(kmdp, 1552 MODINFO_METADATA | MODINFOMD_SMAP); 1553 1554 if (efihdr != NULL) { 1555 add_efi_map_entries(efihdr, physmap, &physmap_idx); 1556 strlcpy(bootmethod, "UEFI", sizeof(bootmethod)); 1557 } else if (smapbase != NULL) { 1558 add_smap_entries(smapbase, physmap, &physmap_idx); 1559 strlcpy(bootmethod, "BIOS", sizeof(bootmethod)); 1560 } else { 1561 panic("No BIOS smap or EFI map info from loader!"); 1562 } 1563 1564 /* 1565 * Find the 'base memory' segment for SMP 1566 */ 1567 basemem = 0; 1568 for (i = 0; i <= physmap_idx; i += 2) { 1569 if (physmap[i] == 0x00000000) { 1570 basemem = physmap[i + 1] / 1024; 1571 break; 1572 } 1573 } 1574 if (basemem == 0) 1575 panic("BIOS smap did not include a basemem segment!"); 1576 1577#ifdef SMP 1578 /* make hole for AP bootstrap code */ 1579 physmap[1] = mp_bootaddress(physmap[1] / 1024); 1580#endif 1581 1582 /* 1583 * Maxmem isn't the "maximum memory", it's one larger than the 1584 * highest page of the physical address space. It should be 1585 * called something like "Maxphyspage". We may adjust this 1586 * based on ``hw.physmem'' and the results of the memory test. 1587 */ 1588 Maxmem = atop(physmap[physmap_idx + 1]); 1589 1590#ifdef MAXMEM 1591 Maxmem = MAXMEM / 4; 1592#endif 1593 1594 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable)) 1595 Maxmem = atop(physmem_tunable); 1596 1597 /* 1598 * By default enable the memory test on real hardware, and disable 1599 * it if we appear to be running in a VM. This avoids touching all 1600 * pages unnecessarily, which doesn't matter on real hardware but is 1601 * bad for shared VM hosts. Use a general name so that 1602 * one could eventually do more with the code than just disable it. 1603 */ 1604 memtest = (vm_guest > VM_GUEST_NO) ? 0 : 1; 1605 TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest); 1606 1607 /* 1608 * Don't allow MAXMEM or hw.physmem to extend the amount of memory 1609 * in the system. 1610 */ 1611 if (Maxmem > atop(physmap[physmap_idx + 1])) 1612 Maxmem = atop(physmap[physmap_idx + 1]); 1613 1614 if (atop(physmap[physmap_idx + 1]) != Maxmem && 1615 (boothowto & RB_VERBOSE)) 1616 printf("Physical memory use set to %ldK\n", Maxmem * 4); 1617 1618 /* call pmap initialization to make new kernel address space */ 1619 pmap_bootstrap(&first); 1620 1621 /* 1622 * Size up each available chunk of physical memory. 1623 * 1624 * XXX Some BIOSes corrupt low 64KB between suspend and resume. 1625 * By default, mask off the first 16 pages unless we appear to be 1626 * running in a VM. 1627 */ 1628 physmem_start = (vm_guest > VM_GUEST_NO ? 1 : 16) << PAGE_SHIFT; 1629 TUNABLE_ULONG_FETCH("hw.physmem.start", &physmem_start); 1630 if (physmem_start < PAGE_SIZE) 1631 physmap[0] = PAGE_SIZE; 1632 else if (physmem_start >= physmap[1]) 1633 physmap[0] = round_page(physmap[1] - PAGE_SIZE); 1634 else 1635 physmap[0] = round_page(physmem_start); 1636 pa_indx = 0; 1637 da_indx = 1; 1638 phys_avail[pa_indx++] = physmap[0]; 1639 phys_avail[pa_indx] = physmap[0]; 1640 dump_avail[da_indx] = physmap[0]; 1641 pte = CMAP1; 1642 1643 /* 1644 * Get dcons buffer address 1645 */ 1646 if (getenv_quad("dcons.addr", &dcons_addr) == 0 || 1647 getenv_quad("dcons.size", &dcons_size) == 0) 1648 dcons_addr = 0; 1649 1650 /* 1651 * physmap is in bytes, so when converting to page boundaries, 1652 * round up the start address and round down the end address. 1653 */ 1654 for (i = 0; i <= physmap_idx; i += 2) { 1655 vm_paddr_t end; 1656 1657 end = ptoa((vm_paddr_t)Maxmem); 1658 if (physmap[i + 1] < end) 1659 end = trunc_page(physmap[i + 1]); 1660 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) { 1661 int tmp, page_bad, full; 1662 int *ptr = (int *)CADDR1; 1663 1664 full = FALSE; 1665 /* 1666 * block out kernel memory as not available. 1667 */ 1668 if (pa >= (vm_paddr_t)kernphys && pa < first) 1669 goto do_dump_avail; 1670 1671 /* 1672 * block out dcons buffer 1673 */ 1674 if (dcons_addr > 0 1675 && pa >= trunc_page(dcons_addr) 1676 && pa < dcons_addr + dcons_size) 1677 goto do_dump_avail; 1678 1679 page_bad = FALSE; 1680 if (memtest == 0) 1681 goto skip_memtest; 1682 1683 /* 1684 * map page into kernel: valid, read/write,non-cacheable 1685 */ 1686 *pte = pa | PG_V | PG_RW | PG_NC_PWT | PG_NC_PCD; 1687 invltlb(); 1688 1689 tmp = *(int *)ptr; 1690 /* 1691 * Test for alternating 1's and 0's 1692 */ 1693 *(volatile int *)ptr = 0xaaaaaaaa; 1694 if (*(volatile int *)ptr != 0xaaaaaaaa) 1695 page_bad = TRUE; 1696 /* 1697 * Test for alternating 0's and 1's 1698 */ 1699 *(volatile int *)ptr = 0x55555555; 1700 if (*(volatile int *)ptr != 0x55555555) 1701 page_bad = TRUE; 1702 /* 1703 * Test for all 1's 1704 */ 1705 *(volatile int *)ptr = 0xffffffff; 1706 if (*(volatile int *)ptr != 0xffffffff) 1707 page_bad = TRUE; 1708 /* 1709 * Test for all 0's 1710 */ 1711 *(volatile int *)ptr = 0x0; 1712 if (*(volatile int *)ptr != 0x0) 1713 page_bad = TRUE; 1714 /* 1715 * Restore original value. 1716 */ 1717 *(int *)ptr = tmp; 1718 1719skip_memtest: 1720 /* 1721 * Adjust array of valid/good pages. 1722 */ 1723 if (page_bad == TRUE) 1724 continue; 1725 /* 1726 * If this good page is a continuation of the 1727 * previous set of good pages, then just increase 1728 * the end pointer. Otherwise start a new chunk. 1729 * Note that "end" points one higher than end, 1730 * making the range >= start and < end. 1731 * If we're also doing a speculative memory 1732 * test and we at or past the end, bump up Maxmem 1733 * so that we keep going. The first bad page 1734 * will terminate the loop. 1735 */ 1736 if (phys_avail[pa_indx] == pa) { 1737 phys_avail[pa_indx] += PAGE_SIZE; 1738 } else { 1739 pa_indx++; 1740 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1741 printf( 1742 "Too many holes in the physical address space, giving up\n"); 1743 pa_indx--; 1744 full = TRUE; 1745 goto do_dump_avail; 1746 } 1747 phys_avail[pa_indx++] = pa; /* start */ 1748 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */ 1749 } 1750 physmem++; 1751do_dump_avail: 1752 if (dump_avail[da_indx] == pa) { 1753 dump_avail[da_indx] += PAGE_SIZE; 1754 } else { 1755 da_indx++; 1756 if (da_indx == DUMP_AVAIL_ARRAY_END) { 1757 da_indx--; 1758 goto do_next; 1759 } 1760 dump_avail[da_indx++] = pa; /* start */ 1761 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */ 1762 } 1763do_next: 1764 if (full) 1765 break; 1766 } 1767 } 1768 *pte = 0; 1769 invltlb(); 1770 1771 /* 1772 * XXX 1773 * The last chunk must contain at least one page plus the message 1774 * buffer to avoid complicating other code (message buffer address 1775 * calculation, etc.). 1776 */ 1777 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1778 round_page(msgbufsize) >= phys_avail[pa_indx]) { 1779 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1780 phys_avail[pa_indx--] = 0; 1781 phys_avail[pa_indx--] = 0; 1782 } 1783 1784 Maxmem = atop(phys_avail[pa_indx]); 1785 1786 /* Trim off space for the message buffer. */ 1787 phys_avail[pa_indx] -= round_page(msgbufsize); 1788 1789 /* Map the message buffer. */ 1790 msgbufp = (struct msgbuf *)PHYS_TO_DMAP(phys_avail[pa_indx]); 1791} 1792 1793u_int64_t 1794hammer_time(u_int64_t modulep, u_int64_t physfree) 1795{ 1796 caddr_t kmdp; 1797 int gsel_tss, x; 1798 struct pcpu *pc; 1799 struct nmi_pcpu *np; 1800 struct xstate_hdr *xhdr; 1801 u_int64_t msr; 1802 char *env; 1803 size_t kstack0_sz; 1804 1805 thread0.td_kstack = physfree + KERNBASE; 1806 thread0.td_kstack_pages = KSTACK_PAGES; 1807 kstack0_sz = thread0.td_kstack_pages * PAGE_SIZE; 1808 bzero((void *)thread0.td_kstack, kstack0_sz); 1809 physfree += kstack0_sz; 1810 1811 /* 1812 * This may be done better later if it gets more high level 1813 * components in it. If so just link td->td_proc here. 1814 */ 1815 proc_linkup0(&proc0, &thread0); 1816 1817 preload_metadata = (caddr_t)(uintptr_t)(modulep + KERNBASE); 1818 preload_bootstrap_relocate(KERNBASE); 1819 kmdp = preload_search_by_type("elf kernel"); 1820 if (kmdp == NULL) 1821 kmdp = preload_search_by_type("elf64 kernel"); 1822 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int); 1823 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + KERNBASE; 1824#ifdef DDB 1825 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t); 1826 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t); 1827#endif 1828 1829 /* Init basic tunables, hz etc */ 1830 init_param1(); 1831 1832 /* 1833 * make gdt memory segments 1834 */ 1835 for (x = 0; x < NGDT; x++) { 1836 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1) && 1837 x != GUSERLDT_SEL && x != (GUSERLDT_SEL) + 1) 1838 ssdtosd(&gdt_segs[x], &gdt[x]); 1839 } 1840 gdt_segs[GPROC0_SEL].ssd_base = (uintptr_t)&common_tss[0]; 1841 ssdtosyssd(&gdt_segs[GPROC0_SEL], 1842 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]); 1843 1844 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1; 1845 r_gdt.rd_base = (long) gdt; 1846 lgdt(&r_gdt); 1847 pc = &__pcpu[0]; 1848 1849 wrmsr(MSR_FSBASE, 0); /* User value */ 1850 wrmsr(MSR_GSBASE, (u_int64_t)pc); 1851 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */ 1852 1853 pcpu_init(pc, 0, sizeof(struct pcpu)); 1854 dpcpu_init((void *)(physfree + KERNBASE), 0); 1855 physfree += DPCPU_SIZE; 1856 PCPU_SET(prvspace, pc); 1857 PCPU_SET(curthread, &thread0); 1858 PCPU_SET(tssp, &common_tss[0]); 1859 PCPU_SET(commontssp, &common_tss[0]); 1860 PCPU_SET(tss, (struct system_segment_descriptor *)&gdt[GPROC0_SEL]); 1861 PCPU_SET(ldt, (struct system_segment_descriptor *)&gdt[GUSERLDT_SEL]); 1862 PCPU_SET(fs32p, &gdt[GUFS32_SEL]); 1863 PCPU_SET(gs32p, &gdt[GUGS32_SEL]); 1864 1865 /* 1866 * Initialize mutexes. 1867 * 1868 * icu_lock: in order to allow an interrupt to occur in a critical 1869 * section, to set pcpu->ipending (etc...) properly, we 1870 * must be able to get the icu lock, so it can't be 1871 * under witness. 1872 */ 1873 mutex_init(); 1874 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS); 1875 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_DEF); 1876 1877 /* exceptions */ 1878 for (x = 0; x < NIDT; x++) 1879 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0); 1880 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0); 1881 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0); 1882 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 2); 1883 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0); 1884 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0); 1885 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0); 1886 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0); 1887 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0); 1888 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1); 1889 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0); 1890 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0); 1891 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0); 1892 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0); 1893 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0); 1894 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0); 1895 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0); 1896 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0); 1897 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0); 1898 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0); 1899#ifdef KDTRACE_HOOKS 1900 setidt(IDT_DTRACE_RET, &IDTVEC(dtrace_ret), SDT_SYSIGT, SEL_UPL, 0); 1901#endif 1902#ifdef XENHVM 1903 setidt(IDT_EVTCHN, &IDTVEC(xen_intr_upcall), SDT_SYSIGT, SEL_UPL, 0); 1904#endif 1905 1906 r_idt.rd_limit = sizeof(idt0) - 1; 1907 r_idt.rd_base = (long) idt; 1908 lidt(&r_idt); 1909 1910 /* 1911 * Initialize the i8254 before the console so that console 1912 * initialization can use DELAY(). 1913 */ 1914 i8254_init(); 1915 1916 /* 1917 * Use vt(4) by default for UEFI boot (during the sc(4)/vt(4) 1918 * transition). 1919 */ 1920 if (kmdp != NULL && preload_search_info(kmdp, 1921 MODINFO_METADATA | MODINFOMD_EFI_MAP) != NULL) 1922 vty_set_preferred(VTY_VT); 1923 1924 /* 1925 * Initialize the console before we print anything out. 1926 */ 1927 cninit(); 1928 1929#ifdef DEV_ISA 1930#ifdef DEV_ATPIC 1931 elcr_probe(); 1932 atpic_startup(); 1933#else 1934 /* Reset and mask the atpics and leave them shut down. */ 1935 atpic_reset(); 1936 1937 /* 1938 * Point the ICU spurious interrupt vectors at the APIC spurious 1939 * interrupt handler. 1940 */ 1941 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0); 1942 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0); 1943#endif 1944#else 1945#error "have you forgotten the isa device?"; 1946#endif 1947 1948 kdb_init(); 1949 1950#ifdef KDB 1951 if (boothowto & RB_KDB) 1952 kdb_enter(KDB_WHY_BOOTFLAGS, 1953 "Boot flags requested debugger"); 1954#endif 1955 1956 identify_cpu(); /* Final stage of CPU initialization */ 1957 initializecpu(); /* Initialize CPU registers */ 1958 initializecpucache(); 1959 1960 /* doublefault stack space, runs on ist1 */ 1961 common_tss[0].tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)]; 1962 1963 /* 1964 * NMI stack, runs on ist2. The pcpu pointer is stored just 1965 * above the start of the ist2 stack. 1966 */ 1967 np = ((struct nmi_pcpu *) &nmi0_stack[sizeof(nmi0_stack)]) - 1; 1968 np->np_pcpu = (register_t) pc; 1969 common_tss[0].tss_ist2 = (long) np; 1970 1971 /* Set the IO permission bitmap (empty due to tss seg limit) */ 1972 common_tss[0].tss_iobase = sizeof(struct amd64tss) + 1973 IOPAGES * PAGE_SIZE; 1974 1975 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 1976 ltr(gsel_tss); 1977 1978 /* Set up the fast syscall stuff */ 1979 msr = rdmsr(MSR_EFER) | EFER_SCE; 1980 wrmsr(MSR_EFER, msr); 1981 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall)); 1982 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32)); 1983 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) | 1984 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48); 1985 wrmsr(MSR_STAR, msr); 1986 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D); 1987 1988 getmemsize(kmdp, physfree); 1989 init_param2(physmem); 1990 1991 /* now running on new page tables, configured,and u/iom is accessible */ 1992 1993 msgbufinit(msgbufp, msgbufsize); 1994 fpuinit(); 1995 1996 /* 1997 * Set up thread0 pcb after fpuinit calculated pcb + fpu save 1998 * area size. Zero out the extended state header in fpu save 1999 * area. 2000 */ 2001 thread0.td_pcb = get_pcb_td(&thread0); 2002 bzero(get_pcb_user_save_td(&thread0), cpu_max_ext_state_size); 2003 if (use_xsave) { 2004 xhdr = (struct xstate_hdr *)(get_pcb_user_save_td(&thread0) + 2005 1); 2006 xhdr->xstate_bv = xsave_mask; 2007 } 2008 /* make an initial tss so cpu can get interrupt stack on syscall! */ 2009 common_tss[0].tss_rsp0 = (vm_offset_t)thread0.td_pcb; 2010 /* Ensure the stack is aligned to 16 bytes */ 2011 common_tss[0].tss_rsp0 &= ~0xFul; 2012 PCPU_SET(rsp0, common_tss[0].tss_rsp0); 2013 PCPU_SET(curpcb, thread0.td_pcb); 2014 2015 /* transfer to user mode */ 2016 2017 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL); 2018 _udatasel = GSEL(GUDATA_SEL, SEL_UPL); 2019 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL); 2020 _ufssel = GSEL(GUFS32_SEL, SEL_UPL); 2021 _ugssel = GSEL(GUGS32_SEL, SEL_UPL); 2022 2023 load_ds(_udatasel); 2024 load_es(_udatasel); 2025 load_fs(_ufssel); 2026 2027 /* setup proc 0's pcb */ 2028 thread0.td_pcb->pcb_flags = 0; 2029 thread0.td_pcb->pcb_cr3 = KPML4phys; /* PCID 0 is reserved for kernel */ 2030 thread0.td_frame = &proc0_tf; 2031 2032 env = getenv("kernelname"); 2033 if (env != NULL) 2034 strlcpy(kernelname, env, sizeof(kernelname)); 2035 2036 cpu_probe_amdc1e(); 2037 2038#ifdef FDT 2039 x86_init_fdt(); 2040#endif 2041 2042 /* Location of kernel stack for locore */ 2043 return ((u_int64_t)thread0.td_pcb); 2044} 2045 2046void 2047cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 2048{ 2049 2050 pcpu->pc_acpi_id = 0xffffffff; 2051} 2052 2053static int 2054smap_sysctl_handler(SYSCTL_HANDLER_ARGS) 2055{ 2056 struct bios_smap *smapbase; 2057 struct bios_smap_xattr smap; 2058 caddr_t kmdp; 2059 uint32_t *smapattr; 2060 int count, error, i; 2061 2062 /* Retrieve the system memory map from the loader. */ 2063 kmdp = preload_search_by_type("elf kernel"); 2064 if (kmdp == NULL) 2065 kmdp = preload_search_by_type("elf64 kernel"); 2066 smapbase = (struct bios_smap *)preload_search_info(kmdp, 2067 MODINFO_METADATA | MODINFOMD_SMAP); 2068 if (smapbase == NULL) 2069 return (0); 2070 smapattr = (uint32_t *)preload_search_info(kmdp, 2071 MODINFO_METADATA | MODINFOMD_SMAP_XATTR); 2072 count = *((uint32_t *)smapbase - 1) / sizeof(*smapbase); 2073 error = 0; 2074 for (i = 0; i < count; i++) { 2075 smap.base = smapbase[i].base; 2076 smap.length = smapbase[i].length; 2077 smap.type = smapbase[i].type; 2078 if (smapattr != NULL) 2079 smap.xattr = smapattr[i]; 2080 else 2081 smap.xattr = 0; 2082 error = SYSCTL_OUT(req, &smap, sizeof(smap)); 2083 } 2084 return (error); 2085} 2086SYSCTL_PROC(_machdep, OID_AUTO, smap, CTLTYPE_OPAQUE|CTLFLAG_RD, NULL, 0, 2087 smap_sysctl_handler, "S,bios_smap_xattr", "Raw BIOS SMAP data"); 2088 2089static int 2090efi_map_sysctl_handler(SYSCTL_HANDLER_ARGS) 2091{ 2092 struct efi_map_header *efihdr; 2093 caddr_t kmdp; 2094 uint32_t efisize; 2095 2096 kmdp = preload_search_by_type("elf kernel"); 2097 if (kmdp == NULL) 2098 kmdp = preload_search_by_type("elf64 kernel"); 2099 efihdr = (struct efi_map_header *)preload_search_info(kmdp, 2100 MODINFO_METADATA | MODINFOMD_EFI_MAP); 2101 if (efihdr == NULL) 2102 return (0); 2103 efisize = *((uint32_t *)efihdr - 1); 2104 return (SYSCTL_OUT(req, efihdr, efisize)); 2105} 2106SYSCTL_PROC(_machdep, OID_AUTO, efi_map, CTLTYPE_OPAQUE|CTLFLAG_RD, NULL, 0, 2107 efi_map_sysctl_handler, "S,efi_map_header", "Raw EFI Memory Map"); 2108 2109void 2110spinlock_enter(void) 2111{ 2112 struct thread *td; 2113 register_t flags; 2114 2115 td = curthread; 2116 if (td->td_md.md_spinlock_count == 0) { 2117 flags = intr_disable(); 2118 td->td_md.md_spinlock_count = 1; 2119 td->td_md.md_saved_flags = flags; 2120 } else 2121 td->td_md.md_spinlock_count++; 2122 critical_enter(); 2123} 2124 2125void 2126spinlock_exit(void) 2127{ 2128 struct thread *td; 2129 register_t flags; 2130 2131 td = curthread; 2132 critical_exit(); 2133 flags = td->td_md.md_saved_flags; 2134 td->td_md.md_spinlock_count--; 2135 if (td->td_md.md_spinlock_count == 0) 2136 intr_restore(flags); 2137} 2138 2139/* 2140 * Construct a PCB from a trapframe. This is called from kdb_trap() where 2141 * we want to start a backtrace from the function that caused us to enter 2142 * the debugger. We have the context in the trapframe, but base the trace 2143 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 2144 * enough for a backtrace. 2145 */ 2146void 2147makectx(struct trapframe *tf, struct pcb *pcb) 2148{ 2149 2150 pcb->pcb_r12 = tf->tf_r12; 2151 pcb->pcb_r13 = tf->tf_r13; 2152 pcb->pcb_r14 = tf->tf_r14; 2153 pcb->pcb_r15 = tf->tf_r15; 2154 pcb->pcb_rbp = tf->tf_rbp; 2155 pcb->pcb_rbx = tf->tf_rbx; 2156 pcb->pcb_rip = tf->tf_rip; 2157 pcb->pcb_rsp = tf->tf_rsp; 2158} 2159 2160int 2161ptrace_set_pc(struct thread *td, unsigned long addr) 2162{ 2163 2164 td->td_frame->tf_rip = addr; 2165 set_pcb_flags(td->td_pcb, PCB_FULL_IRET); 2166 return (0); 2167} 2168 2169int 2170ptrace_single_step(struct thread *td) 2171{ 2172 td->td_frame->tf_rflags |= PSL_T; 2173 return (0); 2174} 2175 2176int 2177ptrace_clear_single_step(struct thread *td) 2178{ 2179 td->td_frame->tf_rflags &= ~PSL_T; 2180 return (0); 2181} 2182 2183int 2184fill_regs(struct thread *td, struct reg *regs) 2185{ 2186 struct trapframe *tp; 2187 2188 tp = td->td_frame; 2189 return (fill_frame_regs(tp, regs)); 2190} 2191 2192int 2193fill_frame_regs(struct trapframe *tp, struct reg *regs) 2194{ 2195 regs->r_r15 = tp->tf_r15; 2196 regs->r_r14 = tp->tf_r14; 2197 regs->r_r13 = tp->tf_r13; 2198 regs->r_r12 = tp->tf_r12; 2199 regs->r_r11 = tp->tf_r11; 2200 regs->r_r10 = tp->tf_r10; 2201 regs->r_r9 = tp->tf_r9; 2202 regs->r_r8 = tp->tf_r8; 2203 regs->r_rdi = tp->tf_rdi; 2204 regs->r_rsi = tp->tf_rsi; 2205 regs->r_rbp = tp->tf_rbp; 2206 regs->r_rbx = tp->tf_rbx; 2207 regs->r_rdx = tp->tf_rdx; 2208 regs->r_rcx = tp->tf_rcx; 2209 regs->r_rax = tp->tf_rax; 2210 regs->r_rip = tp->tf_rip; 2211 regs->r_cs = tp->tf_cs; 2212 regs->r_rflags = tp->tf_rflags; 2213 regs->r_rsp = tp->tf_rsp; 2214 regs->r_ss = tp->tf_ss; 2215 if (tp->tf_flags & TF_HASSEGS) { 2216 regs->r_ds = tp->tf_ds; 2217 regs->r_es = tp->tf_es; 2218 regs->r_fs = tp->tf_fs; 2219 regs->r_gs = tp->tf_gs; 2220 } else { 2221 regs->r_ds = 0; 2222 regs->r_es = 0; 2223 regs->r_fs = 0; 2224 regs->r_gs = 0; 2225 } 2226 return (0); 2227} 2228 2229int 2230set_regs(struct thread *td, struct reg *regs) 2231{ 2232 struct trapframe *tp; 2233 register_t rflags; 2234 2235 tp = td->td_frame; 2236 rflags = regs->r_rflags & 0xffffffff; 2237 if (!EFL_SECURE(rflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs)) 2238 return (EINVAL); 2239 tp->tf_r15 = regs->r_r15; 2240 tp->tf_r14 = regs->r_r14; 2241 tp->tf_r13 = regs->r_r13; 2242 tp->tf_r12 = regs->r_r12; 2243 tp->tf_r11 = regs->r_r11; 2244 tp->tf_r10 = regs->r_r10; 2245 tp->tf_r9 = regs->r_r9; 2246 tp->tf_r8 = regs->r_r8; 2247 tp->tf_rdi = regs->r_rdi; 2248 tp->tf_rsi = regs->r_rsi; 2249 tp->tf_rbp = regs->r_rbp; 2250 tp->tf_rbx = regs->r_rbx; 2251 tp->tf_rdx = regs->r_rdx; 2252 tp->tf_rcx = regs->r_rcx; 2253 tp->tf_rax = regs->r_rax; 2254 tp->tf_rip = regs->r_rip; 2255 tp->tf_cs = regs->r_cs; 2256 tp->tf_rflags = rflags; 2257 tp->tf_rsp = regs->r_rsp; 2258 tp->tf_ss = regs->r_ss; 2259 if (0) { /* XXXKIB */ 2260 tp->tf_ds = regs->r_ds; 2261 tp->tf_es = regs->r_es; 2262 tp->tf_fs = regs->r_fs; 2263 tp->tf_gs = regs->r_gs; 2264 tp->tf_flags = TF_HASSEGS; 2265 } 2266 set_pcb_flags(td->td_pcb, PCB_FULL_IRET); 2267 return (0); 2268} 2269 2270/* XXX check all this stuff! */ 2271/* externalize from sv_xmm */ 2272static void 2273fill_fpregs_xmm(struct savefpu *sv_xmm, struct fpreg *fpregs) 2274{ 2275 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 2276 struct envxmm *penv_xmm = &sv_xmm->sv_env; 2277 int i; 2278 2279 /* pcb -> fpregs */ 2280 bzero(fpregs, sizeof(*fpregs)); 2281 2282 /* FPU control/status */ 2283 penv_fpreg->en_cw = penv_xmm->en_cw; 2284 penv_fpreg->en_sw = penv_xmm->en_sw; 2285 penv_fpreg->en_tw = penv_xmm->en_tw; 2286 penv_fpreg->en_opcode = penv_xmm->en_opcode; 2287 penv_fpreg->en_rip = penv_xmm->en_rip; 2288 penv_fpreg->en_rdp = penv_xmm->en_rdp; 2289 penv_fpreg->en_mxcsr = penv_xmm->en_mxcsr; 2290 penv_fpreg->en_mxcsr_mask = penv_xmm->en_mxcsr_mask; 2291 2292 /* FPU registers */ 2293 for (i = 0; i < 8; ++i) 2294 bcopy(sv_xmm->sv_fp[i].fp_acc.fp_bytes, fpregs->fpr_acc[i], 10); 2295 2296 /* SSE registers */ 2297 for (i = 0; i < 16; ++i) 2298 bcopy(sv_xmm->sv_xmm[i].xmm_bytes, fpregs->fpr_xacc[i], 16); 2299} 2300 2301/* internalize from fpregs into sv_xmm */ 2302static void 2303set_fpregs_xmm(struct fpreg *fpregs, struct savefpu *sv_xmm) 2304{ 2305 struct envxmm *penv_xmm = &sv_xmm->sv_env; 2306 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 2307 int i; 2308 2309 /* fpregs -> pcb */ 2310 /* FPU control/status */ 2311 penv_xmm->en_cw = penv_fpreg->en_cw; 2312 penv_xmm->en_sw = penv_fpreg->en_sw; 2313 penv_xmm->en_tw = penv_fpreg->en_tw; 2314 penv_xmm->en_opcode = penv_fpreg->en_opcode; 2315 penv_xmm->en_rip = penv_fpreg->en_rip; 2316 penv_xmm->en_rdp = penv_fpreg->en_rdp; 2317 penv_xmm->en_mxcsr = penv_fpreg->en_mxcsr; 2318 penv_xmm->en_mxcsr_mask = penv_fpreg->en_mxcsr_mask & cpu_mxcsr_mask; 2319 2320 /* FPU registers */ 2321 for (i = 0; i < 8; ++i) 2322 bcopy(fpregs->fpr_acc[i], sv_xmm->sv_fp[i].fp_acc.fp_bytes, 10); 2323 2324 /* SSE registers */ 2325 for (i = 0; i < 16; ++i) 2326 bcopy(fpregs->fpr_xacc[i], sv_xmm->sv_xmm[i].xmm_bytes, 16); 2327} 2328 2329/* externalize from td->pcb */ 2330int 2331fill_fpregs(struct thread *td, struct fpreg *fpregs) 2332{ 2333 2334 KASSERT(td == curthread || TD_IS_SUSPENDED(td) || 2335 P_SHOULDSTOP(td->td_proc), 2336 ("not suspended thread %p", td)); 2337 fpugetregs(td); 2338 fill_fpregs_xmm(get_pcb_user_save_td(td), fpregs); 2339 return (0); 2340} 2341 2342/* internalize to td->pcb */ 2343int 2344set_fpregs(struct thread *td, struct fpreg *fpregs) 2345{ 2346 2347 set_fpregs_xmm(fpregs, get_pcb_user_save_td(td)); 2348 fpuuserinited(td); 2349 return (0); 2350} 2351 2352/* 2353 * Get machine context. 2354 */ 2355int 2356get_mcontext(struct thread *td, mcontext_t *mcp, int flags) 2357{ 2358 struct pcb *pcb; 2359 struct trapframe *tp; 2360 2361 pcb = td->td_pcb; 2362 tp = td->td_frame; 2363 PROC_LOCK(curthread->td_proc); 2364 mcp->mc_onstack = sigonstack(tp->tf_rsp); 2365 PROC_UNLOCK(curthread->td_proc); 2366 mcp->mc_r15 = tp->tf_r15; 2367 mcp->mc_r14 = tp->tf_r14; 2368 mcp->mc_r13 = tp->tf_r13; 2369 mcp->mc_r12 = tp->tf_r12; 2370 mcp->mc_r11 = tp->tf_r11; 2371 mcp->mc_r10 = tp->tf_r10; 2372 mcp->mc_r9 = tp->tf_r9; 2373 mcp->mc_r8 = tp->tf_r8; 2374 mcp->mc_rdi = tp->tf_rdi; 2375 mcp->mc_rsi = tp->tf_rsi; 2376 mcp->mc_rbp = tp->tf_rbp; 2377 mcp->mc_rbx = tp->tf_rbx; 2378 mcp->mc_rcx = tp->tf_rcx; 2379 mcp->mc_rflags = tp->tf_rflags; 2380 if (flags & GET_MC_CLEAR_RET) { 2381 mcp->mc_rax = 0; 2382 mcp->mc_rdx = 0; 2383 mcp->mc_rflags &= ~PSL_C; 2384 } else { 2385 mcp->mc_rax = tp->tf_rax; 2386 mcp->mc_rdx = tp->tf_rdx; 2387 } 2388 mcp->mc_rip = tp->tf_rip; 2389 mcp->mc_cs = tp->tf_cs; 2390 mcp->mc_rsp = tp->tf_rsp; 2391 mcp->mc_ss = tp->tf_ss; 2392 mcp->mc_ds = tp->tf_ds; 2393 mcp->mc_es = tp->tf_es; 2394 mcp->mc_fs = tp->tf_fs; 2395 mcp->mc_gs = tp->tf_gs; 2396 mcp->mc_flags = tp->tf_flags; 2397 mcp->mc_len = sizeof(*mcp); 2398 get_fpcontext(td, mcp, NULL, 0); 2399 mcp->mc_fsbase = pcb->pcb_fsbase; 2400 mcp->mc_gsbase = pcb->pcb_gsbase; 2401 mcp->mc_xfpustate = 0; 2402 mcp->mc_xfpustate_len = 0; 2403 bzero(mcp->mc_spare, sizeof(mcp->mc_spare)); 2404 return (0); 2405} 2406 2407/* 2408 * Set machine context. 2409 * 2410 * However, we don't set any but the user modifiable flags, and we won't 2411 * touch the cs selector. 2412 */ 2413int 2414set_mcontext(struct thread *td, const mcontext_t *mcp) 2415{ 2416 struct pcb *pcb; 2417 struct trapframe *tp; 2418 char *xfpustate; 2419 long rflags; 2420 int ret; 2421 2422 pcb = td->td_pcb; 2423 tp = td->td_frame; 2424 if (mcp->mc_len != sizeof(*mcp) || 2425 (mcp->mc_flags & ~_MC_FLAG_MASK) != 0) 2426 return (EINVAL); 2427 rflags = (mcp->mc_rflags & PSL_USERCHANGE) | 2428 (tp->tf_rflags & ~PSL_USERCHANGE); 2429 if (mcp->mc_flags & _MC_HASFPXSTATE) { 2430 if (mcp->mc_xfpustate_len > cpu_max_ext_state_size - 2431 sizeof(struct savefpu)) 2432 return (EINVAL); 2433 xfpustate = __builtin_alloca(mcp->mc_xfpustate_len); 2434 ret = copyin((void *)mcp->mc_xfpustate, xfpustate, 2435 mcp->mc_xfpustate_len); 2436 if (ret != 0) 2437 return (ret); 2438 } else 2439 xfpustate = NULL; 2440 ret = set_fpcontext(td, mcp, xfpustate, mcp->mc_xfpustate_len); 2441 if (ret != 0) 2442 return (ret); 2443 tp->tf_r15 = mcp->mc_r15; 2444 tp->tf_r14 = mcp->mc_r14; 2445 tp->tf_r13 = mcp->mc_r13; 2446 tp->tf_r12 = mcp->mc_r12; 2447 tp->tf_r11 = mcp->mc_r11; 2448 tp->tf_r10 = mcp->mc_r10; 2449 tp->tf_r9 = mcp->mc_r9; 2450 tp->tf_r8 = mcp->mc_r8; 2451 tp->tf_rdi = mcp->mc_rdi; 2452 tp->tf_rsi = mcp->mc_rsi; 2453 tp->tf_rbp = mcp->mc_rbp; 2454 tp->tf_rbx = mcp->mc_rbx; 2455 tp->tf_rdx = mcp->mc_rdx; 2456 tp->tf_rcx = mcp->mc_rcx; 2457 tp->tf_rax = mcp->mc_rax; 2458 tp->tf_rip = mcp->mc_rip; 2459 tp->tf_rflags = rflags; 2460 tp->tf_rsp = mcp->mc_rsp; 2461 tp->tf_ss = mcp->mc_ss; 2462 tp->tf_flags = mcp->mc_flags; 2463 if (tp->tf_flags & TF_HASSEGS) { 2464 tp->tf_ds = mcp->mc_ds; 2465 tp->tf_es = mcp->mc_es; 2466 tp->tf_fs = mcp->mc_fs; 2467 tp->tf_gs = mcp->mc_gs; 2468 } 2469 if (mcp->mc_flags & _MC_HASBASES) { 2470 pcb->pcb_fsbase = mcp->mc_fsbase; 2471 pcb->pcb_gsbase = mcp->mc_gsbase; 2472 } 2473 set_pcb_flags(pcb, PCB_FULL_IRET); 2474 return (0); 2475} 2476 2477static void 2478get_fpcontext(struct thread *td, mcontext_t *mcp, char *xfpusave, 2479 size_t xfpusave_len) 2480{ 2481 size_t max_len, len; 2482 2483 mcp->mc_ownedfp = fpugetregs(td); 2484 bcopy(get_pcb_user_save_td(td), &mcp->mc_fpstate[0], 2485 sizeof(mcp->mc_fpstate)); 2486 mcp->mc_fpformat = fpuformat(); 2487 if (!use_xsave || xfpusave_len == 0) 2488 return; 2489 max_len = cpu_max_ext_state_size - sizeof(struct savefpu); 2490 len = xfpusave_len; 2491 if (len > max_len) { 2492 len = max_len; 2493 bzero(xfpusave + max_len, len - max_len); 2494 } 2495 mcp->mc_flags |= _MC_HASFPXSTATE; 2496 mcp->mc_xfpustate_len = len; 2497 bcopy(get_pcb_user_save_td(td) + 1, xfpusave, len); 2498} 2499 2500static int 2501set_fpcontext(struct thread *td, const mcontext_t *mcp, char *xfpustate, 2502 size_t xfpustate_len) 2503{ 2504 struct savefpu *fpstate; 2505 int error; 2506 2507 if (mcp->mc_fpformat == _MC_FPFMT_NODEV) 2508 return (0); 2509 else if (mcp->mc_fpformat != _MC_FPFMT_XMM) 2510 return (EINVAL); 2511 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) { 2512 /* We don't care what state is left in the FPU or PCB. */ 2513 fpstate_drop(td); 2514 error = 0; 2515 } else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU || 2516 mcp->mc_ownedfp == _MC_FPOWNED_PCB) { 2517 fpstate = (struct savefpu *)&mcp->mc_fpstate; 2518 fpstate->sv_env.en_mxcsr &= cpu_mxcsr_mask; 2519 error = fpusetregs(td, fpstate, xfpustate, xfpustate_len); 2520 } else 2521 return (EINVAL); 2522 return (error); 2523} 2524 2525void 2526fpstate_drop(struct thread *td) 2527{ 2528 2529 KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu")); 2530 critical_enter(); 2531 if (PCPU_GET(fpcurthread) == td) 2532 fpudrop(); 2533 /* 2534 * XXX force a full drop of the fpu. The above only drops it if we 2535 * owned it. 2536 * 2537 * XXX I don't much like fpugetuserregs()'s semantics of doing a full 2538 * drop. Dropping only to the pcb matches fnsave's behaviour. 2539 * We only need to drop to !PCB_INITDONE in sendsig(). But 2540 * sendsig() is the only caller of fpugetuserregs()... perhaps we just 2541 * have too many layers. 2542 */ 2543 clear_pcb_flags(curthread->td_pcb, 2544 PCB_FPUINITDONE | PCB_USERFPUINITDONE); 2545 critical_exit(); 2546} 2547 2548int 2549fill_dbregs(struct thread *td, struct dbreg *dbregs) 2550{ 2551 struct pcb *pcb; 2552 2553 if (td == NULL) { 2554 dbregs->dr[0] = rdr0(); 2555 dbregs->dr[1] = rdr1(); 2556 dbregs->dr[2] = rdr2(); 2557 dbregs->dr[3] = rdr3(); 2558 dbregs->dr[6] = rdr6(); 2559 dbregs->dr[7] = rdr7(); 2560 } else { 2561 pcb = td->td_pcb; 2562 dbregs->dr[0] = pcb->pcb_dr0; 2563 dbregs->dr[1] = pcb->pcb_dr1; 2564 dbregs->dr[2] = pcb->pcb_dr2; 2565 dbregs->dr[3] = pcb->pcb_dr3; 2566 dbregs->dr[6] = pcb->pcb_dr6; 2567 dbregs->dr[7] = pcb->pcb_dr7; 2568 } 2569 dbregs->dr[4] = 0; 2570 dbregs->dr[5] = 0; 2571 dbregs->dr[8] = 0; 2572 dbregs->dr[9] = 0; 2573 dbregs->dr[10] = 0; 2574 dbregs->dr[11] = 0; 2575 dbregs->dr[12] = 0; 2576 dbregs->dr[13] = 0; 2577 dbregs->dr[14] = 0; 2578 dbregs->dr[15] = 0; 2579 return (0); 2580} 2581 2582int 2583set_dbregs(struct thread *td, struct dbreg *dbregs) 2584{ 2585 struct pcb *pcb; 2586 int i; 2587 2588 if (td == NULL) { 2589 load_dr0(dbregs->dr[0]); 2590 load_dr1(dbregs->dr[1]); 2591 load_dr2(dbregs->dr[2]); 2592 load_dr3(dbregs->dr[3]); 2593 load_dr6(dbregs->dr[6]); 2594 load_dr7(dbregs->dr[7]); 2595 } else { 2596 /* 2597 * Don't let an illegal value for dr7 get set. Specifically, 2598 * check for undefined settings. Setting these bit patterns 2599 * result in undefined behaviour and can lead to an unexpected 2600 * TRCTRAP or a general protection fault right here. 2601 * Upper bits of dr6 and dr7 must not be set 2602 */ 2603 for (i = 0; i < 4; i++) { 2604 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02) 2605 return (EINVAL); 2606 if (td->td_frame->tf_cs == _ucode32sel && 2607 DBREG_DR7_LEN(dbregs->dr[7], i) == DBREG_DR7_LEN_8) 2608 return (EINVAL); 2609 } 2610 if ((dbregs->dr[6] & 0xffffffff00000000ul) != 0 || 2611 (dbregs->dr[7] & 0xffffffff00000000ul) != 0) 2612 return (EINVAL); 2613 2614 pcb = td->td_pcb; 2615 2616 /* 2617 * Don't let a process set a breakpoint that is not within the 2618 * process's address space. If a process could do this, it 2619 * could halt the system by setting a breakpoint in the kernel 2620 * (if ddb was enabled). Thus, we need to check to make sure 2621 * that no breakpoints are being enabled for addresses outside 2622 * process's address space. 2623 * 2624 * XXX - what about when the watched area of the user's 2625 * address space is written into from within the kernel 2626 * ... wouldn't that still cause a breakpoint to be generated 2627 * from within kernel mode? 2628 */ 2629 2630 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) { 2631 /* dr0 is enabled */ 2632 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS) 2633 return (EINVAL); 2634 } 2635 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) { 2636 /* dr1 is enabled */ 2637 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS) 2638 return (EINVAL); 2639 } 2640 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) { 2641 /* dr2 is enabled */ 2642 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS) 2643 return (EINVAL); 2644 } 2645 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) { 2646 /* dr3 is enabled */ 2647 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS) 2648 return (EINVAL); 2649 } 2650 2651 pcb->pcb_dr0 = dbregs->dr[0]; 2652 pcb->pcb_dr1 = dbregs->dr[1]; 2653 pcb->pcb_dr2 = dbregs->dr[2]; 2654 pcb->pcb_dr3 = dbregs->dr[3]; 2655 pcb->pcb_dr6 = dbregs->dr[6]; 2656 pcb->pcb_dr7 = dbregs->dr[7]; 2657 2658 set_pcb_flags(pcb, PCB_DBREGS); 2659 } 2660 2661 return (0); 2662} 2663 2664void 2665reset_dbregs(void) 2666{ 2667 2668 load_dr7(0); /* Turn off the control bits first */ 2669 load_dr0(0); 2670 load_dr1(0); 2671 load_dr2(0); 2672 load_dr3(0); 2673 load_dr6(0); 2674} 2675 2676/* 2677 * Return > 0 if a hardware breakpoint has been hit, and the 2678 * breakpoint was in user space. Return 0, otherwise. 2679 */ 2680int 2681user_dbreg_trap(void) 2682{ 2683 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */ 2684 u_int64_t bp; /* breakpoint bits extracted from dr6 */ 2685 int nbp; /* number of breakpoints that triggered */ 2686 caddr_t addr[4]; /* breakpoint addresses */ 2687 int i; 2688 2689 dr7 = rdr7(); 2690 if ((dr7 & 0x000000ff) == 0) { 2691 /* 2692 * all GE and LE bits in the dr7 register are zero, 2693 * thus the trap couldn't have been caused by the 2694 * hardware debug registers 2695 */ 2696 return 0; 2697 } 2698 2699 nbp = 0; 2700 dr6 = rdr6(); 2701 bp = dr6 & 0x0000000f; 2702 2703 if (!bp) { 2704 /* 2705 * None of the breakpoint bits are set meaning this 2706 * trap was not caused by any of the debug registers 2707 */ 2708 return 0; 2709 } 2710 2711 /* 2712 * at least one of the breakpoints were hit, check to see 2713 * which ones and if any of them are user space addresses 2714 */ 2715 2716 if (bp & 0x01) { 2717 addr[nbp++] = (caddr_t)rdr0(); 2718 } 2719 if (bp & 0x02) { 2720 addr[nbp++] = (caddr_t)rdr1(); 2721 } 2722 if (bp & 0x04) { 2723 addr[nbp++] = (caddr_t)rdr2(); 2724 } 2725 if (bp & 0x08) { 2726 addr[nbp++] = (caddr_t)rdr3(); 2727 } 2728 2729 for (i = 0; i < nbp; i++) { 2730 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) { 2731 /* 2732 * addr[i] is in user space 2733 */ 2734 return nbp; 2735 } 2736 } 2737 2738 /* 2739 * None of the breakpoints are in user space. 2740 */ 2741 return 0; 2742} 2743 2744#ifdef KDB 2745 2746/* 2747 * Provide inb() and outb() as functions. They are normally only available as 2748 * inline functions, thus cannot be called from the debugger. 2749 */ 2750 2751/* silence compiler warnings */ 2752u_char inb_(u_short); 2753void outb_(u_short, u_char); 2754 2755u_char 2756inb_(u_short port) 2757{ 2758 return inb(port); 2759} 2760 2761void 2762outb_(u_short port, u_char data) 2763{ 2764 outb(port, data); 2765} 2766 2767#endif /* KDB */ 2768